drivers/gpu/drm/nouveau/dispnv50/disp.h

   1 #ifndef __NV50_KMS_H__
   2 #define __NV50_KMS_H__
   3 #include <nvif/mem.h>
   4
   5 #include "nouveau_display.h"
   6
   7 struct nv50_msto;
   8
   9 struct nv50_disp {
  10         struct nvif_disp *disp;
  11         struct nv50_core *core;
  12
  13 #define NV50_DISP_SYNC(c, o)                                ((c) * 0x040 + (o))
  14 #define NV50_DISP_CORE_NTFY                       NV50_DISP_SYNC(0      , 0x00)
  15 #define NV50_DISP_WNDW_SEM0(c)                    NV50_DISP_SYNC(1 + (c), 0x00)
  16 #define NV50_DISP_WNDW_SEM1(c)                    NV50_DISP_SYNC(1 + (c), 0x10)
  17 #define NV50_DISP_WNDW_NTFY(c)                    NV50_DISP_SYNC(1 + (c), 0x20)
  18 #define NV50_DISP_BASE_SEM0(c)                    NV50_DISP_WNDW_SEM0(0 + (c))
  19 #define NV50_DISP_BASE_SEM1(c)                    NV50_DISP_WNDW_SEM1(0 + (c))
  20 #define NV50_DISP_BASE_NTFY(c)                    NV50_DISP_WNDW_NTFY(0 + (c))
  21 #define NV50_DISP_OVLY_SEM0(c)                    NV50_DISP_WNDW_SEM0(4 + (c))
  22 #define NV50_DISP_OVLY_SEM1(c)                    NV50_DISP_WNDW_SEM1(4 + (c))
  23 #define NV50_DISP_OVLY_NTFY(c)                    NV50_DISP_WNDW_NTFY(4 + (c))
  24         struct nouveau_bo *sync;
  25
  26         struct mutex mutex;
  27 };
  28
  29 static inline struct nv50_disp *
  30 nv50_disp(struct drm_device *dev)
  31 {
  32         return nouveau_display(dev)->priv;
  33 }
  34
  35 struct nv50_disp_interlock {
  36         enum nv50_disp_interlock_type {
  37                 NV50_DISP_INTERLOCK_CORE = 0,
  38                 NV50_DISP_INTERLOCK_CURS,
  39                 NV50_DISP_INTERLOCK_BASE,
  40                 NV50_DISP_INTERLOCK_OVLY,
  41                 NV50_DISP_INTERLOCK_WNDW,
  42                 NV50_DISP_INTERLOCK_WIMM,
  43                 NV50_DISP_INTERLOCK__SIZE
  44         } type;
  45         u32 data;
  46         u32 wimm;
  47 };
  48
  49 void corec37d_ntfy_init(struct nouveau_bo *, u32);
  50
  51 void head907d_olut_load(struct drm_color_lut *, int size, void __iomem *);
  52
  53 struct nv50_chan {
  54         struct nvif_object user;
  55         struct nvif_device *device;
  56 };
  57
  58 struct nv50_dmac {
  59         struct nv50_chan base;
  60
  61         struct nvif_mem push;
  62         u32 *ptr;
  63
  64         struct nvif_object sync;
  65         struct nvif_object vram;
  66
  67         /* Protects against concurrent pushbuf access to this channel, lock is
  68          * grabbed by evo_wait (if the pushbuf reservation is successful) and
  69          * dropped again by evo_kick. */
  70         struct mutex lock;
  71 };
  72
  73 int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
  74                      const s32 *oclass, u8 head, void *data, u32 size,
  75                      u64 syncbuf, struct nv50_dmac *dmac);
  76 void nv50_dmac_destroy(struct nv50_dmac *);
  77
  78 u32 *evo_wait(struct nv50_dmac *, int nr);
  79 void evo_kick(u32 *, struct nv50_dmac *);
  80
  81 #define evo_mthd(p, m, s) do {                                          \
  82         const u32 _m = (m), _s = (s);                                   \
  83         if (drm_debug_enabled(DRM_UT_KMS))                              \
  84                 pr_err("%04x %d %s\n", _m, _s, __func__);               \
  85         *((p)++) = ((_s << 18) | _m);                                   \
  86 } while(0)
  87
  88 #define evo_data(p, d) do {                                             \
  89         const u32 _d = (d);                                             \
  90         if (drm_debug_enabled(DRM_UT_KMS))                              \
  91                 pr_err("\t%08x\n", _d);                                 \
  92         *((p)++) = _d;                                                  \
  93 } while(0)
  94 #endif