drivers/gpu/drm/nouveau/include/nvif/if000c.h

   1 #ifndef __NVIF_IF000C_H__
   2 #define __NVIF_IF000C_H__
   3 struct nvif_vmm_v0 {
   4         __u8  version;
   5         __u8  page_nr;
   6         __u8  managed;
   7         __u8  pad03[5];
   8         __u64 addr;
   9         __u64 size;
  10         __u8  data[];
  11 };
  12
  13 #define NVIF_VMM_V0_PAGE                                                   0x00
  14 #define NVIF_VMM_V0_GET                                                    0x01
  15 #define NVIF_VMM_V0_PUT                                                    0x02
  16 #define NVIF_VMM_V0_MAP                                                    0x03
  17 #define NVIF_VMM_V0_UNMAP                                                  0x04
  18 #define NVIF_VMM_V0_PFNMAP                                                 0x05
  19 #define NVIF_VMM_V0_PFNCLR                                                 0x06
  20
  21 struct nvif_vmm_page_v0 {
  22         __u8  version;
  23         __u8  index;
  24         __u8  shift;
  25         __u8  sparse;
  26         __u8  vram;
  27         __u8  host;
  28         __u8  comp;
  29         __u8  pad07[1];
  30 };
  31
  32 struct nvif_vmm_get_v0 {
  33         __u8  version;
  34 #define NVIF_VMM_GET_V0_ADDR                                               0x00
  35 #define NVIF_VMM_GET_V0_PTES                                               0x01
  36 #define NVIF_VMM_GET_V0_LAZY                                               0x02
  37         __u8  type;
  38         __u8  sparse;
  39         __u8  page;
  40         __u8  align;
  41         __u8  pad05[3];
  42         __u64 size;
  43         __u64 addr;
  44 };
  45
  46 struct nvif_vmm_put_v0 {
  47         __u8  version;
  48         __u8  pad01[7];
  49         __u64 addr;
  50 };
  51
  52 struct nvif_vmm_map_v0 {
  53         __u8  version;
  54         __u8  pad01[7];
  55         __u64 addr;
  56         __u64 size;
  57         __u64 memory;
  58         __u64 offset;
  59         __u8  data[];
  60 };
  61
  62 struct nvif_vmm_unmap_v0 {
  63         __u8  version;
  64         __u8  pad01[7];
  65         __u64 addr;
  66 };
  67
  68 struct nvif_vmm_pfnmap_v0 {
  69         __u8  version;
  70         __u8  page;
  71         __u8  pad02[6];
  72         __u64 addr;
  73         __u64 size;
  74 #define NVIF_VMM_PFNMAP_V0_ADDR                           0xfffffffffffff000ULL
  75 #define NVIF_VMM_PFNMAP_V0_ADDR_SHIFT                                        12
  76 #define NVIF_VMM_PFNMAP_V0_APER                           0x00000000000000f0ULL
  77 #define NVIF_VMM_PFNMAP_V0_HOST                           0x0000000000000000ULL
  78 #define NVIF_VMM_PFNMAP_V0_VRAM                           0x0000000000000010ULL
  79 #define NVIF_VMM_PFNMAP_V0_W                              0x0000000000000002ULL
  80 #define NVIF_VMM_PFNMAP_V0_V                              0x0000000000000001ULL
  81 #define NVIF_VMM_PFNMAP_V0_NONE                           0x0000000000000000ULL
  82         __u64 phys[];
  83 };
  84
  85 struct nvif_vmm_pfnclr_v0 {
  86         __u8  version;
  87         __u8  pad01[7];
  88         __u64 addr;
  89         __u64 size;
  90 };
  91 #endif