2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
33 #include <drm/drm_crtc_helper.h>
35 #include <core/gpuobj.h>
36 #include <core/option.h>
38 #include <core/tegra.h>
40 #include <nvif/driver.h>
41 #include <nvif/fifo.h>
42 #include <nvif/user.h>
44 #include <nvif/class.h>
45 #include <nvif/cl0002.h>
46 #include <nvif/cla06f.h>
48 #include "nouveau_drv.h"
49 #include "nouveau_dma.h"
50 #include "nouveau_ttm.h"
51 #include "nouveau_gem.h"
52 #include "nouveau_vga.h"
53 #include "nouveau_led.h"
54 #include "nouveau_hwmon.h"
55 #include "nouveau_acpi.h"
56 #include "nouveau_bios.h"
57 #include "nouveau_ioctl.h"
58 #include "nouveau_abi16.h"
59 #include "nouveau_fbcon.h"
60 #include "nouveau_fence.h"
61 #include "nouveau_debugfs.h"
62 #include "nouveau_usif.h"
63 #include "nouveau_connector.h"
64 #include "nouveau_platform.h"
65 #include "nouveau_svm.h"
66 #include "nouveau_dmem.h"
68 MODULE_PARM_DESC(config, "option string to pass to driver core");
69 static char *nouveau_config;
70 module_param_named(config, nouveau_config, charp, 0400);
72 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
73 static char *nouveau_debug;
74 module_param_named(debug, nouveau_debug, charp, 0400);
76 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
77 static int nouveau_noaccel = 0;
78 module_param_named(noaccel, nouveau_noaccel, int, 0400);
80 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
81 "0 = disabled, 1 = enabled, 2 = headless)");
82 int nouveau_modeset = -1;
83 module_param_named(modeset, nouveau_modeset, int, 0400);
85 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
86 static int nouveau_atomic = 0;
87 module_param_named(atomic, nouveau_atomic, int, 0400);
89 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
90 static int nouveau_runtime_pm = -1;
91 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
93 static struct drm_driver driver_stub;
94 static struct drm_driver driver_pci;
95 static struct drm_driver driver_platform;
98 nouveau_pci_name(struct pci_dev *pdev)
100 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
101 name |= pdev->bus->number << 16;
102 name |= PCI_SLOT(pdev->devfn) << 8;
103 return name | PCI_FUNC(pdev->devfn);
107 nouveau_platform_name(struct platform_device *platformdev)
109 return platformdev->id;
113 nouveau_name(struct drm_device *dev)
116 return nouveau_pci_name(dev->pdev);
118 return nouveau_platform_name(to_platform_device(dev->dev));
122 nouveau_cli_work_ready(struct dma_fence *fence)
124 if (!dma_fence_is_signaled(fence))
126 dma_fence_put(fence);
131 nouveau_cli_work(struct work_struct *w)
133 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
134 struct nouveau_cli_work *work, *wtmp;
135 mutex_lock(&cli->lock);
136 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
137 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
138 list_del(&work->head);
142 mutex_unlock(&cli->lock);
146 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
148 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
149 schedule_work(&work->cli->work);
153 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
154 struct nouveau_cli_work *work)
156 work->fence = dma_fence_get(fence);
158 mutex_lock(&cli->lock);
159 list_add_tail(&work->head, &cli->worker);
160 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
161 nouveau_cli_work_fence(fence, &work->cb);
162 mutex_unlock(&cli->lock);
166 nouveau_cli_fini(struct nouveau_cli *cli)
168 /* All our channels are dead now, which means all the fences they
169 * own are signalled, and all callback functions have been called.
171 * So, after flushing the workqueue, there should be nothing left.
173 flush_work(&cli->work);
174 WARN_ON(!list_empty(&cli->worker));
176 usif_client_fini(cli);
177 nouveau_vmm_fini(&cli->svm);
178 nouveau_vmm_fini(&cli->vmm);
179 nvif_mmu_fini(&cli->mmu);
180 nvif_device_fini(&cli->device);
181 mutex_lock(&cli->drm->master.lock);
182 nvif_client_fini(&cli->base);
183 mutex_unlock(&cli->drm->master.lock);
187 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
188 struct nouveau_cli *cli)
190 static const struct nvif_mclass
192 { NVIF_CLASS_MEM_GF100, -1 },
193 { NVIF_CLASS_MEM_NV50 , -1 },
194 { NVIF_CLASS_MEM_NV04 , -1 },
197 static const struct nvif_mclass
199 { NVIF_CLASS_MMU_GF100, -1 },
200 { NVIF_CLASS_MMU_NV50 , -1 },
201 { NVIF_CLASS_MMU_NV04 , -1 },
204 static const struct nvif_mclass
206 { NVIF_CLASS_VMM_GP100, -1 },
207 { NVIF_CLASS_VMM_GM200, -1 },
208 { NVIF_CLASS_VMM_GF100, -1 },
209 { NVIF_CLASS_VMM_NV50 , -1 },
210 { NVIF_CLASS_VMM_NV04 , -1 },
213 u64 device = nouveau_name(drm->dev);
216 snprintf(cli->name, sizeof(cli->name), "%s", sname);
218 mutex_init(&cli->mutex);
219 usif_client_init(cli);
221 INIT_WORK(&cli->work, nouveau_cli_work);
222 INIT_LIST_HEAD(&cli->worker);
223 mutex_init(&cli->lock);
225 if (cli == &drm->master) {
226 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
227 cli->name, device, &cli->base);
229 mutex_lock(&drm->master.lock);
230 ret = nvif_client_init(&drm->master.base, cli->name, device,
232 mutex_unlock(&drm->master.lock);
235 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
239 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
240 &(struct nv_device_v0) {
242 }, sizeof(struct nv_device_v0),
245 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
249 ret = nvif_mclass(&cli->device.object, mmus);
251 NV_PRINTK(err, cli, "No supported MMU class\n");
255 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
257 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
261 ret = nvif_mclass(&cli->mmu.object, vmms);
263 NV_PRINTK(err, cli, "No supported VMM class\n");
267 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
269 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
273 ret = nvif_mclass(&cli->mmu.object, mems);
275 NV_PRINTK(err, cli, "No supported MEM class\n");
279 cli->mem = &mems[ret];
283 nouveau_cli_fini(cli);
288 nouveau_accel_ce_fini(struct nouveau_drm *drm)
290 nouveau_channel_idle(drm->cechan);
291 nvif_object_fini(&drm->ttm.copy);
292 nouveau_channel_del(&drm->cechan);
296 nouveau_accel_ce_init(struct nouveau_drm *drm)
298 struct nvif_device *device = &drm->client.device;
301 /* Allocate channel that has access to a (preferably async) copy
302 * engine, to use for TTM buffer moves.
304 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
305 ret = nouveau_channel_new(drm, device,
306 nvif_fifo_runlist_ce(device), 0,
309 if (device->info.chipset >= 0xa3 &&
310 device->info.chipset != 0xaa &&
311 device->info.chipset != 0xac) {
312 /* Prior to Kepler, there's only a single runlist, so all
313 * engines can be accessed from any channel.
315 * We still want to use a separate channel though.
317 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
322 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
326 nouveau_accel_gr_fini(struct nouveau_drm *drm)
328 nouveau_channel_idle(drm->channel);
329 nvif_object_fini(&drm->ntfy);
330 nvkm_gpuobj_del(&drm->notify);
331 nvif_object_fini(&drm->nvsw);
332 nouveau_channel_del(&drm->channel);
336 nouveau_accel_gr_init(struct nouveau_drm *drm)
338 struct nvif_device *device = &drm->client.device;
342 /* Allocate channel that has access to the graphics engine. */
343 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
344 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
351 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
354 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
355 nouveau_accel_gr_fini(drm);
359 /* A SW class is used on pre-NV50 HW to assist with handling the
360 * synchronisation of page flips, as well as to implement fences
361 * on TNT/TNT2 HW that lacks any kind of support in host.
363 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
364 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
365 nouveau_abi16_swclass(drm), NULL, 0,
368 ret = RING_SPACE(drm->channel, 2);
370 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
371 OUT_RING (drm->channel, drm->nvsw.handle);
376 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
377 nouveau_accel_gr_fini(drm);
382 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
383 * even if notification is never requested, so, allocate a ctxdma on
384 * any GPU where it's possible we'll end up using M2MF for BO moves.
386 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
387 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
390 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
391 nouveau_accel_gr_fini(drm);
395 ret = nvif_object_init(&drm->channel->user, NvNotify0,
397 &(struct nv_dma_v0) {
398 .target = NV_DMA_V0_TARGET_VRAM,
399 .access = NV_DMA_V0_ACCESS_RDWR,
400 .start = drm->notify->addr,
401 .limit = drm->notify->addr + 31
402 }, sizeof(struct nv_dma_v0),
405 nouveau_accel_gr_fini(drm);
412 nouveau_accel_fini(struct nouveau_drm *drm)
414 nouveau_accel_ce_fini(drm);
415 nouveau_accel_gr_fini(drm);
417 nouveau_fence(drm)->dtor(drm);
421 nouveau_accel_init(struct nouveau_drm *drm)
423 struct nvif_device *device = &drm->client.device;
424 struct nvif_sclass *sclass;
430 /* Initialise global support for channels, and synchronisation. */
431 ret = nouveau_channels_init(drm);
435 /*XXX: this is crap, but the fence/channel stuff is a little
436 * backwards in some places. this will be fixed.
438 ret = n = nvif_object_sclass_get(&device->object, &sclass);
442 for (ret = -ENOSYS, i = 0; i < n; i++) {
443 switch (sclass[i].oclass) {
444 case NV03_CHANNEL_DMA:
445 ret = nv04_fence_create(drm);
447 case NV10_CHANNEL_DMA:
448 ret = nv10_fence_create(drm);
450 case NV17_CHANNEL_DMA:
451 case NV40_CHANNEL_DMA:
452 ret = nv17_fence_create(drm);
454 case NV50_CHANNEL_GPFIFO:
455 ret = nv50_fence_create(drm);
457 case G82_CHANNEL_GPFIFO:
458 ret = nv84_fence_create(drm);
460 case FERMI_CHANNEL_GPFIFO:
461 case KEPLER_CHANNEL_GPFIFO_A:
462 case KEPLER_CHANNEL_GPFIFO_B:
463 case MAXWELL_CHANNEL_GPFIFO_A:
464 case PASCAL_CHANNEL_GPFIFO_A:
465 case VOLTA_CHANNEL_GPFIFO_A:
466 case TURING_CHANNEL_GPFIFO_A:
467 ret = nvc0_fence_create(drm);
474 nvif_object_sclass_put(&sclass);
476 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
477 nouveau_accel_fini(drm);
481 /* Volta requires access to a doorbell register for kickoff. */
482 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
483 ret = nvif_user_init(device);
488 /* Allocate channels we need to support various functions. */
489 nouveau_accel_gr_init(drm);
490 nouveau_accel_ce_init(drm);
492 /* Initialise accelerated TTM buffer moves. */
493 nouveau_bo_move_init(drm);
497 nouveau_drm_device_init(struct drm_device *dev)
499 struct nouveau_drm *drm;
502 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
504 dev->dev_private = drm;
507 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
511 ret = nouveau_cli_init(drm, "DRM", &drm->client);
515 dev->irq_enabled = true;
517 nvxx_client(&drm->client.base)->debug =
518 nvkm_dbgopt(nouveau_debug, "DRM");
520 INIT_LIST_HEAD(&drm->clients);
521 spin_lock_init(&drm->tile.lock);
523 /* workaround an odd issue on nvc1 by disabling the device's
524 * nosnoop capability. hopefully won't cause issues until a
525 * better fix is found - assuming there is one...
527 if (drm->client.device.info.chipset == 0xc1)
528 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
530 nouveau_vga_init(drm);
532 ret = nouveau_ttm_init(drm);
536 ret = nouveau_bios_init(dev);
540 nouveau_accel_init(drm);
542 ret = nouveau_display_create(dev);
546 if (dev->mode_config.num_crtc) {
547 ret = nouveau_display_init(dev, false, false);
552 nouveau_debugfs_init(drm);
553 nouveau_hwmon_init(dev);
554 nouveau_svm_init(drm);
555 nouveau_dmem_init(drm);
556 nouveau_fbcon_init(dev);
557 nouveau_led_init(dev);
559 if (nouveau_pmops_runtime()) {
560 pm_runtime_use_autosuspend(dev->dev);
561 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
562 pm_runtime_set_active(dev->dev);
563 pm_runtime_allow(dev->dev);
564 pm_runtime_mark_last_busy(dev->dev);
565 pm_runtime_put(dev->dev);
571 nouveau_display_destroy(dev);
573 nouveau_accel_fini(drm);
574 nouveau_bios_takedown(dev);
576 nouveau_ttm_fini(drm);
578 nouveau_vga_fini(drm);
579 nouveau_cli_fini(&drm->client);
581 nouveau_cli_fini(&drm->master);
588 nouveau_drm_device_fini(struct drm_device *dev)
590 struct nouveau_drm *drm = nouveau_drm(dev);
592 if (nouveau_pmops_runtime()) {
593 pm_runtime_get_sync(dev->dev);
594 pm_runtime_forbid(dev->dev);
597 nouveau_led_fini(dev);
598 nouveau_fbcon_fini(dev);
599 nouveau_dmem_fini(drm);
600 nouveau_svm_fini(drm);
601 nouveau_hwmon_fini(dev);
602 nouveau_debugfs_fini(drm);
604 if (dev->mode_config.num_crtc)
605 nouveau_display_fini(dev, false, false);
606 nouveau_display_destroy(dev);
608 nouveau_accel_fini(drm);
609 nouveau_bios_takedown(dev);
611 nouveau_ttm_fini(drm);
612 nouveau_vga_fini(drm);
614 nouveau_cli_fini(&drm->client);
615 nouveau_cli_fini(&drm->master);
619 static int nouveau_drm_probe(struct pci_dev *pdev,
620 const struct pci_device_id *pent)
622 struct nvkm_device *device;
623 struct drm_device *drm_dev;
624 struct apertures_struct *aper;
628 if (vga_switcheroo_client_probe_defer(pdev))
629 return -EPROBE_DEFER;
631 /* We need to check that the chipset is supported before booting
632 * fbdev off the hardware, as there's no way to put it back.
634 ret = nvkm_device_pci_new(pdev, nouveau_config, "error",
635 true, false, 0, &device);
639 nvkm_device_del(&device);
641 /* Remove conflicting drivers (vesafb, efifb etc). */
642 aper = alloc_apertures(3);
646 aper->ranges[0].base = pci_resource_start(pdev, 1);
647 aper->ranges[0].size = pci_resource_len(pdev, 1);
650 if (pci_resource_len(pdev, 2)) {
651 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
652 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
656 if (pci_resource_len(pdev, 3)) {
657 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
658 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
663 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
665 if (nouveau_modeset != 2)
666 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
669 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
670 true, true, ~0ULL, &device);
674 pci_set_master(pdev);
677 driver_pci.driver_features |= DRIVER_ATOMIC;
679 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
680 if (IS_ERR(drm_dev)) {
681 ret = PTR_ERR(drm_dev);
685 ret = pci_enable_device(pdev);
689 drm_dev->pdev = pdev;
690 pci_set_drvdata(pdev, drm_dev);
692 ret = nouveau_drm_device_init(drm_dev);
696 ret = drm_dev_register(drm_dev, pent->driver_data);
698 goto fail_drm_dev_init;
703 nouveau_drm_device_fini(drm_dev);
705 pci_disable_device(pdev);
707 drm_dev_put(drm_dev);
709 nvkm_device_del(&device);
714 nouveau_drm_device_remove(struct drm_device *dev)
716 struct pci_dev *pdev = dev->pdev;
717 struct nouveau_drm *drm = nouveau_drm(dev);
718 struct nvkm_client *client;
719 struct nvkm_device *device;
721 drm_dev_unregister(dev);
723 dev->irq_enabled = false;
724 client = nvxx_client(&drm->client.base);
725 device = nvkm_device_find(client->device);
727 nouveau_drm_device_fini(dev);
728 pci_disable_device(pdev);
730 nvkm_device_del(&device);
734 nouveau_drm_remove(struct pci_dev *pdev)
736 struct drm_device *dev = pci_get_drvdata(pdev);
738 nouveau_drm_device_remove(dev);
742 nouveau_do_suspend(struct drm_device *dev, bool runtime)
744 struct nouveau_drm *drm = nouveau_drm(dev);
747 nouveau_svm_suspend(drm);
748 nouveau_dmem_suspend(drm);
749 nouveau_led_suspend(dev);
751 if (dev->mode_config.num_crtc) {
752 NV_DEBUG(drm, "suspending console...\n");
753 nouveau_fbcon_set_suspend(dev, 1);
754 NV_DEBUG(drm, "suspending display...\n");
755 ret = nouveau_display_suspend(dev, runtime);
760 NV_DEBUG(drm, "evicting buffers...\n");
761 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
763 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
765 ret = nouveau_channel_idle(drm->cechan);
771 ret = nouveau_channel_idle(drm->channel);
776 NV_DEBUG(drm, "suspending fence...\n");
777 if (drm->fence && nouveau_fence(drm)->suspend) {
778 if (!nouveau_fence(drm)->suspend(drm)) {
784 NV_DEBUG(drm, "suspending object tree...\n");
785 ret = nvif_client_suspend(&drm->master.base);
792 if (drm->fence && nouveau_fence(drm)->resume)
793 nouveau_fence(drm)->resume(drm);
796 if (dev->mode_config.num_crtc) {
797 NV_DEBUG(drm, "resuming display...\n");
798 nouveau_display_resume(dev, runtime);
804 nouveau_do_resume(struct drm_device *dev, bool runtime)
807 struct nouveau_drm *drm = nouveau_drm(dev);
809 NV_DEBUG(drm, "resuming object tree...\n");
810 ret = nvif_client_resume(&drm->master.base);
812 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
816 NV_DEBUG(drm, "resuming fence...\n");
817 if (drm->fence && nouveau_fence(drm)->resume)
818 nouveau_fence(drm)->resume(drm);
820 nouveau_run_vbios_init(dev);
822 if (dev->mode_config.num_crtc) {
823 NV_DEBUG(drm, "resuming display...\n");
824 nouveau_display_resume(dev, runtime);
825 NV_DEBUG(drm, "resuming console...\n");
826 nouveau_fbcon_set_suspend(dev, 0);
829 nouveau_led_resume(dev);
830 nouveau_dmem_resume(drm);
831 nouveau_svm_resume(drm);
836 nouveau_pmops_suspend(struct device *dev)
838 struct pci_dev *pdev = to_pci_dev(dev);
839 struct drm_device *drm_dev = pci_get_drvdata(pdev);
842 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
843 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
846 ret = nouveau_do_suspend(drm_dev, false);
850 pci_save_state(pdev);
851 pci_disable_device(pdev);
852 pci_set_power_state(pdev, PCI_D3hot);
858 nouveau_pmops_resume(struct device *dev)
860 struct pci_dev *pdev = to_pci_dev(dev);
861 struct drm_device *drm_dev = pci_get_drvdata(pdev);
864 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
865 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
868 pci_set_power_state(pdev, PCI_D0);
869 pci_restore_state(pdev);
870 ret = pci_enable_device(pdev);
873 pci_set_master(pdev);
875 ret = nouveau_do_resume(drm_dev, false);
877 /* Monitors may have been connected / disconnected during suspend */
878 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
884 nouveau_pmops_freeze(struct device *dev)
886 struct pci_dev *pdev = to_pci_dev(dev);
887 struct drm_device *drm_dev = pci_get_drvdata(pdev);
888 return nouveau_do_suspend(drm_dev, false);
892 nouveau_pmops_thaw(struct device *dev)
894 struct pci_dev *pdev = to_pci_dev(dev);
895 struct drm_device *drm_dev = pci_get_drvdata(pdev);
896 return nouveau_do_resume(drm_dev, false);
900 nouveau_pmops_runtime(void)
902 if (nouveau_runtime_pm == -1)
903 return nouveau_is_optimus() || nouveau_is_v1_dsm();
904 return nouveau_runtime_pm == 1;
908 nouveau_pmops_runtime_suspend(struct device *dev)
910 struct pci_dev *pdev = to_pci_dev(dev);
911 struct drm_device *drm_dev = pci_get_drvdata(pdev);
914 if (!nouveau_pmops_runtime()) {
915 pm_runtime_forbid(dev);
919 nouveau_switcheroo_optimus_dsm();
920 ret = nouveau_do_suspend(drm_dev, true);
921 pci_save_state(pdev);
922 pci_disable_device(pdev);
923 pci_ignore_hotplug(pdev);
924 pci_set_power_state(pdev, PCI_D3cold);
925 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
930 nouveau_pmops_runtime_resume(struct device *dev)
932 struct pci_dev *pdev = to_pci_dev(dev);
933 struct drm_device *drm_dev = pci_get_drvdata(pdev);
934 struct nouveau_drm *drm = nouveau_drm(drm_dev);
935 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
938 if (!nouveau_pmops_runtime()) {
939 pm_runtime_forbid(dev);
943 pci_set_power_state(pdev, PCI_D0);
944 pci_restore_state(pdev);
945 ret = pci_enable_device(pdev);
948 pci_set_master(pdev);
950 ret = nouveau_do_resume(drm_dev, true);
952 NV_ERROR(drm, "resume failed with: %d\n", ret);
957 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
958 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
960 /* Monitors may have been connected / disconnected during suspend */
961 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
967 nouveau_pmops_runtime_idle(struct device *dev)
969 if (!nouveau_pmops_runtime()) {
970 pm_runtime_forbid(dev);
974 pm_runtime_mark_last_busy(dev);
975 pm_runtime_autosuspend(dev);
976 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
981 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
983 struct nouveau_drm *drm = nouveau_drm(dev);
984 struct nouveau_cli *cli;
985 char name[32], tmpname[TASK_COMM_LEN];
988 /* need to bring up power immediately if opening device */
989 ret = pm_runtime_get_sync(dev->dev);
990 if (ret < 0 && ret != -EACCES)
993 get_task_comm(tmpname, current);
994 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
996 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1001 ret = nouveau_cli_init(drm, name, cli);
1005 cli->base.super = false;
1007 fpriv->driver_priv = cli;
1009 mutex_lock(&drm->client.mutex);
1010 list_add(&cli->head, &drm->clients);
1011 mutex_unlock(&drm->client.mutex);
1015 nouveau_cli_fini(cli);
1019 pm_runtime_mark_last_busy(dev->dev);
1020 pm_runtime_put_autosuspend(dev->dev);
1025 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1027 struct nouveau_cli *cli = nouveau_cli(fpriv);
1028 struct nouveau_drm *drm = nouveau_drm(dev);
1030 pm_runtime_get_sync(dev->dev);
1032 mutex_lock(&cli->mutex);
1034 nouveau_abi16_fini(cli->abi16);
1035 mutex_unlock(&cli->mutex);
1037 mutex_lock(&drm->client.mutex);
1038 list_del(&cli->head);
1039 mutex_unlock(&drm->client.mutex);
1041 nouveau_cli_fini(cli);
1043 pm_runtime_mark_last_busy(dev->dev);
1044 pm_runtime_put_autosuspend(dev->dev);
1047 static const struct drm_ioctl_desc
1048 nouveau_ioctls[] = {
1049 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1050 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1051 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1052 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1053 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1054 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1055 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1056 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1057 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1058 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1059 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1060 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1061 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1062 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1066 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1068 struct drm_file *filp = file->private_data;
1069 struct drm_device *dev = filp->minor->dev;
1072 ret = pm_runtime_get_sync(dev->dev);
1073 if (ret < 0 && ret != -EACCES)
1076 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1077 case DRM_NOUVEAU_NVIF:
1078 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1081 ret = drm_ioctl(file, cmd, arg);
1085 pm_runtime_mark_last_busy(dev->dev);
1086 pm_runtime_put_autosuspend(dev->dev);
1090 static const struct file_operations
1091 nouveau_driver_fops = {
1092 .owner = THIS_MODULE,
1094 .release = drm_release,
1095 .unlocked_ioctl = nouveau_drm_ioctl,
1096 .mmap = nouveau_ttm_mmap,
1099 #if defined(CONFIG_COMPAT)
1100 .compat_ioctl = nouveau_compat_ioctl,
1102 .llseek = noop_llseek,
1105 static struct drm_driver
1108 DRIVER_GEM | DRIVER_MODESET | DRIVER_RENDER
1109 #if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
1110 | DRIVER_KMS_LEGACY_CONTEXT
1114 .open = nouveau_drm_open,
1115 .postclose = nouveau_drm_postclose,
1116 .lastclose = nouveau_vga_lastclose,
1118 #if defined(CONFIG_DEBUG_FS)
1119 .debugfs_init = nouveau_drm_debugfs_init,
1122 .enable_vblank = nouveau_display_vblank_enable,
1123 .disable_vblank = nouveau_display_vblank_disable,
1124 .get_scanout_position = nouveau_display_scanoutpos,
1125 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
1127 .ioctls = nouveau_ioctls,
1128 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1129 .fops = &nouveau_driver_fops,
1131 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1132 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1133 .gem_prime_pin = nouveau_gem_prime_pin,
1134 .gem_prime_unpin = nouveau_gem_prime_unpin,
1135 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1136 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1137 .gem_prime_vmap = nouveau_gem_prime_vmap,
1138 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1140 .gem_free_object_unlocked = nouveau_gem_object_del,
1141 .gem_open_object = nouveau_gem_object_open,
1142 .gem_close_object = nouveau_gem_object_close,
1144 .dumb_create = nouveau_display_dumb_create,
1145 .dumb_map_offset = nouveau_display_dumb_map_offset,
1147 .name = DRIVER_NAME,
1148 .desc = DRIVER_DESC,
1150 .date = GIT_REVISION,
1152 .date = DRIVER_DATE,
1154 .major = DRIVER_MAJOR,
1155 .minor = DRIVER_MINOR,
1156 .patchlevel = DRIVER_PATCHLEVEL,
1159 static struct pci_device_id
1160 nouveau_drm_pci_table[] = {
1162 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1163 .class = PCI_BASE_CLASS_DISPLAY << 16,
1164 .class_mask = 0xff << 16,
1167 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1168 .class = PCI_BASE_CLASS_DISPLAY << 16,
1169 .class_mask = 0xff << 16,
1174 static void nouveau_display_options(void)
1176 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1178 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1179 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1180 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1181 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1182 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1183 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1184 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1185 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1186 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1187 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1188 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1191 static const struct dev_pm_ops nouveau_pm_ops = {
1192 .suspend = nouveau_pmops_suspend,
1193 .resume = nouveau_pmops_resume,
1194 .freeze = nouveau_pmops_freeze,
1195 .thaw = nouveau_pmops_thaw,
1196 .poweroff = nouveau_pmops_freeze,
1197 .restore = nouveau_pmops_resume,
1198 .runtime_suspend = nouveau_pmops_runtime_suspend,
1199 .runtime_resume = nouveau_pmops_runtime_resume,
1200 .runtime_idle = nouveau_pmops_runtime_idle,
1203 static struct pci_driver
1204 nouveau_drm_pci_driver = {
1206 .id_table = nouveau_drm_pci_table,
1207 .probe = nouveau_drm_probe,
1208 .remove = nouveau_drm_remove,
1209 .driver.pm = &nouveau_pm_ops,
1213 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1214 struct platform_device *pdev,
1215 struct nvkm_device **pdevice)
1217 struct drm_device *drm;
1220 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1221 true, true, ~0ULL, pdevice);
1225 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1231 err = nouveau_drm_device_init(drm);
1235 platform_set_drvdata(pdev, drm);
1242 nvkm_device_del(pdevice);
1244 return ERR_PTR(err);
1248 nouveau_drm_init(void)
1250 driver_pci = driver_stub;
1251 driver_platform = driver_stub;
1253 nouveau_display_options();
1255 if (nouveau_modeset == -1) {
1256 if (vgacon_text_force())
1257 nouveau_modeset = 0;
1260 if (!nouveau_modeset)
1263 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1264 platform_driver_register(&nouveau_platform_driver);
1267 nouveau_register_dsm_handler();
1268 nouveau_backlight_ctor();
1271 return pci_register_driver(&nouveau_drm_pci_driver);
1278 nouveau_drm_exit(void)
1280 if (!nouveau_modeset)
1284 pci_unregister_driver(&nouveau_drm_pci_driver);
1286 nouveau_backlight_dtor();
1287 nouveau_unregister_dsm_handler();
1289 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1290 platform_driver_unregister(&nouveau_platform_driver);
1294 module_init(nouveau_drm_init);
1295 module_exit(nouveau_drm_exit);
1297 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1298 MODULE_AUTHOR(DRIVER_AUTHOR);
1299 MODULE_DESCRIPTION(DRIVER_DESC);
1300 MODULE_LICENSE("GPL and additional rights");