2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/vga_switcheroo.h>
33 #include <drm/drm_crtc_helper.h>
35 #include <core/gpuobj.h>
36 #include <core/option.h>
38 #include <core/tegra.h>
40 #include <nvif/driver.h>
41 #include <nvif/fifo.h>
42 #include <nvif/user.h>
44 #include <nvif/class.h>
45 #include <nvif/cl0002.h>
46 #include <nvif/cla06f.h>
48 #include "nouveau_drv.h"
49 #include "nouveau_dma.h"
50 #include "nouveau_ttm.h"
51 #include "nouveau_gem.h"
52 #include "nouveau_vga.h"
53 #include "nouveau_led.h"
54 #include "nouveau_hwmon.h"
55 #include "nouveau_acpi.h"
56 #include "nouveau_bios.h"
57 #include "nouveau_ioctl.h"
58 #include "nouveau_abi16.h"
59 #include "nouveau_fbcon.h"
60 #include "nouveau_fence.h"
61 #include "nouveau_debugfs.h"
62 #include "nouveau_usif.h"
63 #include "nouveau_connector.h"
64 #include "nouveau_platform.h"
66 MODULE_PARM_DESC(config, "option string to pass to driver core");
67 static char *nouveau_config;
68 module_param_named(config, nouveau_config, charp, 0400);
70 MODULE_PARM_DESC(debug, "debug string to pass to driver core");
71 static char *nouveau_debug;
72 module_param_named(debug, nouveau_debug, charp, 0400);
74 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
75 static int nouveau_noaccel = 0;
76 module_param_named(noaccel, nouveau_noaccel, int, 0400);
78 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
79 "0 = disabled, 1 = enabled, 2 = headless)");
80 int nouveau_modeset = -1;
81 module_param_named(modeset, nouveau_modeset, int, 0400);
83 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
84 static int nouveau_atomic = 0;
85 module_param_named(atomic, nouveau_atomic, int, 0400);
87 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
88 static int nouveau_runtime_pm = -1;
89 module_param_named(runpm, nouveau_runtime_pm, int, 0400);
91 static struct drm_driver driver_stub;
92 static struct drm_driver driver_pci;
93 static struct drm_driver driver_platform;
96 nouveau_pci_name(struct pci_dev *pdev)
98 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
99 name |= pdev->bus->number << 16;
100 name |= PCI_SLOT(pdev->devfn) << 8;
101 return name | PCI_FUNC(pdev->devfn);
105 nouveau_platform_name(struct platform_device *platformdev)
107 return platformdev->id;
111 nouveau_name(struct drm_device *dev)
114 return nouveau_pci_name(dev->pdev);
116 return nouveau_platform_name(to_platform_device(dev->dev));
120 nouveau_cli_work_ready(struct dma_fence *fence)
122 if (!dma_fence_is_signaled(fence))
124 dma_fence_put(fence);
129 nouveau_cli_work(struct work_struct *w)
131 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
132 struct nouveau_cli_work *work, *wtmp;
133 mutex_lock(&cli->lock);
134 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
135 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
136 list_del(&work->head);
140 mutex_unlock(&cli->lock);
144 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
146 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
147 schedule_work(&work->cli->work);
151 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
152 struct nouveau_cli_work *work)
154 work->fence = dma_fence_get(fence);
156 mutex_lock(&cli->lock);
157 list_add_tail(&work->head, &cli->worker);
158 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
159 nouveau_cli_work_fence(fence, &work->cb);
160 mutex_unlock(&cli->lock);
164 nouveau_cli_fini(struct nouveau_cli *cli)
166 /* All our channels are dead now, which means all the fences they
167 * own are signalled, and all callback functions have been called.
169 * So, after flushing the workqueue, there should be nothing left.
171 flush_work(&cli->work);
172 WARN_ON(!list_empty(&cli->worker));
174 usif_client_fini(cli);
175 nouveau_vmm_fini(&cli->vmm);
176 nvif_mmu_fini(&cli->mmu);
177 nvif_device_fini(&cli->device);
178 mutex_lock(&cli->drm->master.lock);
179 nvif_client_fini(&cli->base);
180 mutex_unlock(&cli->drm->master.lock);
184 nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
185 struct nouveau_cli *cli)
187 static const struct nvif_mclass
189 { NVIF_CLASS_MEM_GF100, -1 },
190 { NVIF_CLASS_MEM_NV50 , -1 },
191 { NVIF_CLASS_MEM_NV04 , -1 },
194 static const struct nvif_mclass
196 { NVIF_CLASS_MMU_GF100, -1 },
197 { NVIF_CLASS_MMU_NV50 , -1 },
198 { NVIF_CLASS_MMU_NV04 , -1 },
201 static const struct nvif_mclass
203 { NVIF_CLASS_VMM_GP100, -1 },
204 { NVIF_CLASS_VMM_GM200, -1 },
205 { NVIF_CLASS_VMM_GF100, -1 },
206 { NVIF_CLASS_VMM_NV50 , -1 },
207 { NVIF_CLASS_VMM_NV04 , -1 },
210 u64 device = nouveau_name(drm->dev);
213 snprintf(cli->name, sizeof(cli->name), "%s", sname);
215 mutex_init(&cli->mutex);
216 usif_client_init(cli);
218 INIT_WORK(&cli->work, nouveau_cli_work);
219 INIT_LIST_HEAD(&cli->worker);
220 mutex_init(&cli->lock);
222 if (cli == &drm->master) {
223 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
224 cli->name, device, &cli->base);
226 mutex_lock(&drm->master.lock);
227 ret = nvif_client_init(&drm->master.base, cli->name, device,
229 mutex_unlock(&drm->master.lock);
232 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
236 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
237 &(struct nv_device_v0) {
239 }, sizeof(struct nv_device_v0),
242 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
246 ret = nvif_mclass(&cli->device.object, mmus);
248 NV_PRINTK(err, cli, "No supported MMU class\n");
252 ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
254 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
258 ret = nvif_mclass(&cli->mmu.object, vmms);
260 NV_PRINTK(err, cli, "No supported VMM class\n");
264 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
266 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
270 ret = nvif_mclass(&cli->mmu.object, mems);
272 NV_PRINTK(err, cli, "No supported MEM class\n");
276 cli->mem = &mems[ret];
280 nouveau_cli_fini(cli);
285 nouveau_accel_ce_fini(struct nouveau_drm *drm)
287 nouveau_channel_idle(drm->cechan);
288 nvif_object_fini(&drm->ttm.copy);
289 nouveau_channel_del(&drm->cechan);
293 nouveau_accel_ce_init(struct nouveau_drm *drm)
295 struct nvif_device *device = &drm->client.device;
298 /* Allocate channel that has access to a (preferably async) copy
299 * engine, to use for TTM buffer moves.
301 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
302 ret = nouveau_channel_new(drm, device,
303 nvif_fifo_runlist_ce(device), 0,
306 if (device->info.chipset >= 0xa3 &&
307 device->info.chipset != 0xaa &&
308 device->info.chipset != 0xac) {
309 /* Prior to Kepler, there's only a single runlist, so all
310 * engines can be accessed from any channel.
312 * We still want to use a separate channel though.
314 ret = nouveau_channel_new(drm, device, NvDmaFB, NvDmaTT, false,
319 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
323 nouveau_accel_gr_fini(struct nouveau_drm *drm)
325 nouveau_channel_idle(drm->channel);
326 nvif_object_fini(&drm->ntfy);
327 nvkm_gpuobj_del(&drm->notify);
328 nvif_object_fini(&drm->nvsw);
329 nouveau_channel_del(&drm->channel);
333 nouveau_accel_gr_init(struct nouveau_drm *drm)
335 struct nvif_device *device = &drm->client.device;
339 /* Allocate channel that has access to the graphics engine. */
340 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
341 arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR);
348 ret = nouveau_channel_new(drm, device, arg0, arg1, false,
351 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
352 nouveau_accel_gr_fini(drm);
356 /* A SW class is used on pre-NV50 HW to assist with handling the
357 * synchronisation of page flips, as well as to implement fences
358 * on TNT/TNT2 HW that lacks any kind of support in host.
360 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
361 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
362 nouveau_abi16_swclass(drm), NULL, 0,
365 ret = RING_SPACE(drm->channel, 2);
367 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
368 OUT_RING (drm->channel, drm->nvsw.handle);
373 NV_ERROR(drm, "failed to allocate sw class, %d\n", ret);
374 nouveau_accel_gr_fini(drm);
379 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
380 * even if notification is never requested, so, allocate a ctxdma on
381 * any GPU where it's possible we'll end up using M2MF for BO moves.
383 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
384 ret = nvkm_gpuobj_new(nvxx_device(device), 32, 0, false, NULL,
387 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
388 nouveau_accel_gr_fini(drm);
392 ret = nvif_object_init(&drm->channel->user, NvNotify0,
394 &(struct nv_dma_v0) {
395 .target = NV_DMA_V0_TARGET_VRAM,
396 .access = NV_DMA_V0_ACCESS_RDWR,
397 .start = drm->notify->addr,
398 .limit = drm->notify->addr + 31
399 }, sizeof(struct nv_dma_v0),
402 nouveau_accel_gr_fini(drm);
409 nouveau_accel_fini(struct nouveau_drm *drm)
411 nouveau_accel_ce_fini(drm);
412 nouveau_accel_gr_fini(drm);
414 nouveau_fence(drm)->dtor(drm);
418 nouveau_accel_init(struct nouveau_drm *drm)
420 struct nvif_device *device = &drm->client.device;
421 struct nvif_sclass *sclass;
427 /* Initialise global support for channels, and synchronisation. */
428 ret = nouveau_channels_init(drm);
432 /*XXX: this is crap, but the fence/channel stuff is a little
433 * backwards in some places. this will be fixed.
435 ret = n = nvif_object_sclass_get(&device->object, &sclass);
439 for (ret = -ENOSYS, i = 0; i < n; i++) {
440 switch (sclass[i].oclass) {
441 case NV03_CHANNEL_DMA:
442 ret = nv04_fence_create(drm);
444 case NV10_CHANNEL_DMA:
445 ret = nv10_fence_create(drm);
447 case NV17_CHANNEL_DMA:
448 case NV40_CHANNEL_DMA:
449 ret = nv17_fence_create(drm);
451 case NV50_CHANNEL_GPFIFO:
452 ret = nv50_fence_create(drm);
454 case G82_CHANNEL_GPFIFO:
455 ret = nv84_fence_create(drm);
457 case FERMI_CHANNEL_GPFIFO:
458 case KEPLER_CHANNEL_GPFIFO_A:
459 case KEPLER_CHANNEL_GPFIFO_B:
460 case MAXWELL_CHANNEL_GPFIFO_A:
461 case PASCAL_CHANNEL_GPFIFO_A:
462 case VOLTA_CHANNEL_GPFIFO_A:
463 case TURING_CHANNEL_GPFIFO_A:
464 ret = nvc0_fence_create(drm);
471 nvif_object_sclass_put(&sclass);
473 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
474 nouveau_accel_fini(drm);
478 /* Volta requires access to a doorbell register for kickoff. */
479 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
480 ret = nvif_user_init(device);
485 /* Allocate channels we need to support various functions. */
486 nouveau_accel_gr_init(drm);
487 nouveau_accel_ce_init(drm);
489 /* Initialise accelerated TTM buffer moves. */
490 nouveau_bo_move_init(drm);
494 nouveau_drm_device_init(struct drm_device *dev)
496 struct nouveau_drm *drm;
499 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
501 dev->dev_private = drm;
504 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
508 ret = nouveau_cli_init(drm, "DRM", &drm->client);
512 dev->irq_enabled = true;
514 nvxx_client(&drm->client.base)->debug =
515 nvkm_dbgopt(nouveau_debug, "DRM");
517 INIT_LIST_HEAD(&drm->clients);
518 spin_lock_init(&drm->tile.lock);
520 /* workaround an odd issue on nvc1 by disabling the device's
521 * nosnoop capability. hopefully won't cause issues until a
522 * better fix is found - assuming there is one...
524 if (drm->client.device.info.chipset == 0xc1)
525 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
527 nouveau_vga_init(drm);
529 ret = nouveau_ttm_init(drm);
533 ret = nouveau_bios_init(dev);
537 nouveau_accel_init(drm);
539 ret = nouveau_display_create(dev);
543 if (dev->mode_config.num_crtc) {
544 ret = nouveau_display_init(dev, false, false);
549 nouveau_debugfs_init(drm);
550 nouveau_hwmon_init(dev);
551 nouveau_fbcon_init(dev);
552 nouveau_led_init(dev);
554 if (nouveau_pmops_runtime()) {
555 pm_runtime_use_autosuspend(dev->dev);
556 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
557 pm_runtime_set_active(dev->dev);
558 pm_runtime_allow(dev->dev);
559 pm_runtime_mark_last_busy(dev->dev);
560 pm_runtime_put(dev->dev);
566 nouveau_display_destroy(dev);
568 nouveau_accel_fini(drm);
569 nouveau_bios_takedown(dev);
571 nouveau_ttm_fini(drm);
573 nouveau_vga_fini(drm);
574 nouveau_cli_fini(&drm->client);
576 nouveau_cli_fini(&drm->master);
583 nouveau_drm_device_fini(struct drm_device *dev)
585 struct nouveau_drm *drm = nouveau_drm(dev);
587 if (nouveau_pmops_runtime()) {
588 pm_runtime_get_sync(dev->dev);
589 pm_runtime_forbid(dev->dev);
592 nouveau_led_fini(dev);
593 nouveau_fbcon_fini(dev);
594 nouveau_hwmon_fini(dev);
595 nouveau_debugfs_fini(drm);
597 if (dev->mode_config.num_crtc)
598 nouveau_display_fini(dev, false, false);
599 nouveau_display_destroy(dev);
601 nouveau_accel_fini(drm);
602 nouveau_bios_takedown(dev);
604 nouveau_ttm_fini(drm);
605 nouveau_vga_fini(drm);
607 nouveau_cli_fini(&drm->client);
608 nouveau_cli_fini(&drm->master);
612 static int nouveau_drm_probe(struct pci_dev *pdev,
613 const struct pci_device_id *pent)
615 struct nvkm_device *device;
616 struct drm_device *drm_dev;
617 struct apertures_struct *aper;
621 if (vga_switcheroo_client_probe_defer(pdev))
622 return -EPROBE_DEFER;
624 /* We need to check that the chipset is supported before booting
625 * fbdev off the hardware, as there's no way to put it back.
627 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
631 nvkm_device_del(&device);
633 /* Remove conflicting drivers (vesafb, efifb etc). */
634 aper = alloc_apertures(3);
638 aper->ranges[0].base = pci_resource_start(pdev, 1);
639 aper->ranges[0].size = pci_resource_len(pdev, 1);
642 if (pci_resource_len(pdev, 2)) {
643 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
644 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
648 if (pci_resource_len(pdev, 3)) {
649 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
650 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
655 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
657 if (nouveau_modeset != 2)
658 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
661 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
662 true, true, ~0ULL, &device);
666 pci_set_master(pdev);
669 driver_pci.driver_features |= DRIVER_ATOMIC;
671 drm_dev = drm_dev_alloc(&driver_pci, &pdev->dev);
672 if (IS_ERR(drm_dev)) {
673 ret = PTR_ERR(drm_dev);
677 ret = pci_enable_device(pdev);
681 drm_dev->pdev = pdev;
682 pci_set_drvdata(pdev, drm_dev);
684 ret = nouveau_drm_device_init(drm_dev);
688 ret = drm_dev_register(drm_dev, pent->driver_data);
690 goto fail_drm_dev_init;
695 nouveau_drm_device_fini(drm_dev);
697 pci_disable_device(pdev);
699 drm_dev_put(drm_dev);
701 nvkm_device_del(&device);
706 nouveau_drm_device_remove(struct drm_device *dev)
708 struct pci_dev *pdev = dev->pdev;
709 struct nouveau_drm *drm = nouveau_drm(dev);
710 struct nvkm_client *client;
711 struct nvkm_device *device;
713 drm_dev_unregister(dev);
715 dev->irq_enabled = false;
716 client = nvxx_client(&drm->client.base);
717 device = nvkm_device_find(client->device);
719 nouveau_drm_device_fini(dev);
720 pci_disable_device(pdev);
722 nvkm_device_del(&device);
726 nouveau_drm_remove(struct pci_dev *pdev)
728 struct drm_device *dev = pci_get_drvdata(pdev);
730 nouveau_drm_device_remove(dev);
734 nouveau_do_suspend(struct drm_device *dev, bool runtime)
736 struct nouveau_drm *drm = nouveau_drm(dev);
739 nouveau_led_suspend(dev);
741 if (dev->mode_config.num_crtc) {
742 NV_DEBUG(drm, "suspending console...\n");
743 nouveau_fbcon_set_suspend(dev, 1);
744 NV_DEBUG(drm, "suspending display...\n");
745 ret = nouveau_display_suspend(dev, runtime);
750 NV_DEBUG(drm, "evicting buffers...\n");
751 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
753 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
755 ret = nouveau_channel_idle(drm->cechan);
761 ret = nouveau_channel_idle(drm->channel);
766 NV_DEBUG(drm, "suspending fence...\n");
767 if (drm->fence && nouveau_fence(drm)->suspend) {
768 if (!nouveau_fence(drm)->suspend(drm)) {
774 NV_DEBUG(drm, "suspending object tree...\n");
775 ret = nvif_client_suspend(&drm->master.base);
782 if (drm->fence && nouveau_fence(drm)->resume)
783 nouveau_fence(drm)->resume(drm);
786 if (dev->mode_config.num_crtc) {
787 NV_DEBUG(drm, "resuming display...\n");
788 nouveau_display_resume(dev, runtime);
794 nouveau_do_resume(struct drm_device *dev, bool runtime)
796 struct nouveau_drm *drm = nouveau_drm(dev);
798 NV_DEBUG(drm, "resuming object tree...\n");
799 nvif_client_resume(&drm->master.base);
801 NV_DEBUG(drm, "resuming fence...\n");
802 if (drm->fence && nouveau_fence(drm)->resume)
803 nouveau_fence(drm)->resume(drm);
805 nouveau_run_vbios_init(dev);
807 if (dev->mode_config.num_crtc) {
808 NV_DEBUG(drm, "resuming display...\n");
809 nouveau_display_resume(dev, runtime);
810 NV_DEBUG(drm, "resuming console...\n");
811 nouveau_fbcon_set_suspend(dev, 0);
814 nouveau_led_resume(dev);
820 nouveau_pmops_suspend(struct device *dev)
822 struct pci_dev *pdev = to_pci_dev(dev);
823 struct drm_device *drm_dev = pci_get_drvdata(pdev);
826 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
827 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
830 ret = nouveau_do_suspend(drm_dev, false);
834 pci_save_state(pdev);
835 pci_disable_device(pdev);
836 pci_set_power_state(pdev, PCI_D3hot);
842 nouveau_pmops_resume(struct device *dev)
844 struct pci_dev *pdev = to_pci_dev(dev);
845 struct drm_device *drm_dev = pci_get_drvdata(pdev);
848 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
849 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
852 pci_set_power_state(pdev, PCI_D0);
853 pci_restore_state(pdev);
854 ret = pci_enable_device(pdev);
857 pci_set_master(pdev);
859 ret = nouveau_do_resume(drm_dev, false);
861 /* Monitors may have been connected / disconnected during suspend */
862 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
868 nouveau_pmops_freeze(struct device *dev)
870 struct pci_dev *pdev = to_pci_dev(dev);
871 struct drm_device *drm_dev = pci_get_drvdata(pdev);
872 return nouveau_do_suspend(drm_dev, false);
876 nouveau_pmops_thaw(struct device *dev)
878 struct pci_dev *pdev = to_pci_dev(dev);
879 struct drm_device *drm_dev = pci_get_drvdata(pdev);
880 return nouveau_do_resume(drm_dev, false);
884 nouveau_pmops_runtime(void)
886 if (nouveau_runtime_pm == -1)
887 return nouveau_is_optimus() || nouveau_is_v1_dsm();
888 return nouveau_runtime_pm == 1;
892 nouveau_pmops_runtime_suspend(struct device *dev)
894 struct pci_dev *pdev = to_pci_dev(dev);
895 struct drm_device *drm_dev = pci_get_drvdata(pdev);
898 if (!nouveau_pmops_runtime()) {
899 pm_runtime_forbid(dev);
903 nouveau_switcheroo_optimus_dsm();
904 ret = nouveau_do_suspend(drm_dev, true);
905 pci_save_state(pdev);
906 pci_disable_device(pdev);
907 pci_ignore_hotplug(pdev);
908 pci_set_power_state(pdev, PCI_D3cold);
909 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
914 nouveau_pmops_runtime_resume(struct device *dev)
916 struct pci_dev *pdev = to_pci_dev(dev);
917 struct drm_device *drm_dev = pci_get_drvdata(pdev);
918 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
921 if (!nouveau_pmops_runtime()) {
922 pm_runtime_forbid(dev);
926 pci_set_power_state(pdev, PCI_D0);
927 pci_restore_state(pdev);
928 ret = pci_enable_device(pdev);
931 pci_set_master(pdev);
933 ret = nouveau_do_resume(drm_dev, true);
936 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
937 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
939 /* Monitors may have been connected / disconnected during suspend */
940 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
946 nouveau_pmops_runtime_idle(struct device *dev)
948 if (!nouveau_pmops_runtime()) {
949 pm_runtime_forbid(dev);
953 pm_runtime_mark_last_busy(dev);
954 pm_runtime_autosuspend(dev);
955 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
960 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
962 struct nouveau_drm *drm = nouveau_drm(dev);
963 struct nouveau_cli *cli;
964 char name[32], tmpname[TASK_COMM_LEN];
967 /* need to bring up power immediately if opening device */
968 ret = pm_runtime_get_sync(dev->dev);
969 if (ret < 0 && ret != -EACCES)
972 get_task_comm(tmpname, current);
973 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
975 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
980 ret = nouveau_cli_init(drm, name, cli);
984 cli->base.super = false;
986 fpriv->driver_priv = cli;
988 mutex_lock(&drm->client.mutex);
989 list_add(&cli->head, &drm->clients);
990 mutex_unlock(&drm->client.mutex);
994 nouveau_cli_fini(cli);
998 pm_runtime_mark_last_busy(dev->dev);
999 pm_runtime_put_autosuspend(dev->dev);
1004 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1006 struct nouveau_cli *cli = nouveau_cli(fpriv);
1007 struct nouveau_drm *drm = nouveau_drm(dev);
1009 pm_runtime_get_sync(dev->dev);
1011 mutex_lock(&cli->mutex);
1013 nouveau_abi16_fini(cli->abi16);
1014 mutex_unlock(&cli->mutex);
1016 mutex_lock(&drm->client.mutex);
1017 list_del(&cli->head);
1018 mutex_unlock(&drm->client.mutex);
1020 nouveau_cli_fini(cli);
1022 pm_runtime_mark_last_busy(dev->dev);
1023 pm_runtime_put_autosuspend(dev->dev);
1026 static const struct drm_ioctl_desc
1027 nouveau_ioctls[] = {
1028 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
1029 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1030 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1031 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
1032 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1033 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
1034 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
1035 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
1036 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
1037 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
1038 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
1039 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
1043 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1045 struct drm_file *filp = file->private_data;
1046 struct drm_device *dev = filp->minor->dev;
1049 ret = pm_runtime_get_sync(dev->dev);
1050 if (ret < 0 && ret != -EACCES)
1053 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1054 case DRM_NOUVEAU_NVIF:
1055 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1058 ret = drm_ioctl(file, cmd, arg);
1062 pm_runtime_mark_last_busy(dev->dev);
1063 pm_runtime_put_autosuspend(dev->dev);
1067 static const struct file_operations
1068 nouveau_driver_fops = {
1069 .owner = THIS_MODULE,
1071 .release = drm_release,
1072 .unlocked_ioctl = nouveau_drm_ioctl,
1073 .mmap = nouveau_ttm_mmap,
1076 #if defined(CONFIG_COMPAT)
1077 .compat_ioctl = nouveau_compat_ioctl,
1079 .llseek = noop_llseek,
1082 static struct drm_driver
1085 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
1086 DRIVER_KMS_LEGACY_CONTEXT,
1088 .open = nouveau_drm_open,
1089 .postclose = nouveau_drm_postclose,
1090 .lastclose = nouveau_vga_lastclose,
1092 #if defined(CONFIG_DEBUG_FS)
1093 .debugfs_init = nouveau_drm_debugfs_init,
1096 .enable_vblank = nouveau_display_vblank_enable,
1097 .disable_vblank = nouveau_display_vblank_disable,
1098 .get_scanout_position = nouveau_display_scanoutpos,
1099 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
1101 .ioctls = nouveau_ioctls,
1102 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1103 .fops = &nouveau_driver_fops,
1105 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1106 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1107 .gem_prime_export = drm_gem_prime_export,
1108 .gem_prime_import = drm_gem_prime_import,
1109 .gem_prime_pin = nouveau_gem_prime_pin,
1110 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1111 .gem_prime_unpin = nouveau_gem_prime_unpin,
1112 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1113 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1114 .gem_prime_vmap = nouveau_gem_prime_vmap,
1115 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
1117 .gem_free_object_unlocked = nouveau_gem_object_del,
1118 .gem_open_object = nouveau_gem_object_open,
1119 .gem_close_object = nouveau_gem_object_close,
1121 .dumb_create = nouveau_display_dumb_create,
1122 .dumb_map_offset = nouveau_display_dumb_map_offset,
1124 .name = DRIVER_NAME,
1125 .desc = DRIVER_DESC,
1127 .date = GIT_REVISION,
1129 .date = DRIVER_DATE,
1131 .major = DRIVER_MAJOR,
1132 .minor = DRIVER_MINOR,
1133 .patchlevel = DRIVER_PATCHLEVEL,
1136 static struct pci_device_id
1137 nouveau_drm_pci_table[] = {
1139 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1140 .class = PCI_BASE_CLASS_DISPLAY << 16,
1141 .class_mask = 0xff << 16,
1144 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1145 .class = PCI_BASE_CLASS_DISPLAY << 16,
1146 .class_mask = 0xff << 16,
1151 static void nouveau_display_options(void)
1153 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1155 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1156 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1157 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1158 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1159 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1160 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1161 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1162 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1163 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1164 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1165 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1168 static const struct dev_pm_ops nouveau_pm_ops = {
1169 .suspend = nouveau_pmops_suspend,
1170 .resume = nouveau_pmops_resume,
1171 .freeze = nouveau_pmops_freeze,
1172 .thaw = nouveau_pmops_thaw,
1173 .poweroff = nouveau_pmops_freeze,
1174 .restore = nouveau_pmops_resume,
1175 .runtime_suspend = nouveau_pmops_runtime_suspend,
1176 .runtime_resume = nouveau_pmops_runtime_resume,
1177 .runtime_idle = nouveau_pmops_runtime_idle,
1180 static struct pci_driver
1181 nouveau_drm_pci_driver = {
1183 .id_table = nouveau_drm_pci_table,
1184 .probe = nouveau_drm_probe,
1185 .remove = nouveau_drm_remove,
1186 .driver.pm = &nouveau_pm_ops,
1190 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1191 struct platform_device *pdev,
1192 struct nvkm_device **pdevice)
1194 struct drm_device *drm;
1197 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1198 true, true, ~0ULL, pdevice);
1202 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1208 err = nouveau_drm_device_init(drm);
1212 platform_set_drvdata(pdev, drm);
1219 nvkm_device_del(pdevice);
1221 return ERR_PTR(err);
1225 nouveau_drm_init(void)
1227 driver_pci = driver_stub;
1228 driver_platform = driver_stub;
1230 nouveau_display_options();
1232 if (nouveau_modeset == -1) {
1233 if (vgacon_text_force())
1234 nouveau_modeset = 0;
1237 if (!nouveau_modeset)
1240 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1241 platform_driver_register(&nouveau_platform_driver);
1244 nouveau_register_dsm_handler();
1245 nouveau_backlight_ctor();
1248 return pci_register_driver(&nouveau_drm_pci_driver);
1255 nouveau_drm_exit(void)
1257 if (!nouveau_modeset)
1261 pci_unregister_driver(&nouveau_drm_pci_driver);
1263 nouveau_backlight_dtor();
1264 nouveau_unregister_dsm_handler();
1266 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1267 platform_driver_unregister(&nouveau_platform_driver);
1271 module_init(nouveau_drm_init);
1272 module_exit(nouveau_drm_exit);
1274 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1275 MODULE_AUTHOR(DRIVER_AUTHOR);
1276 MODULE_DESCRIPTION(DRIVER_DESC);
1277 MODULE_LICENSE("GPL and additional rights");