2 * Copyright 2012 Red Hat Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
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15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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27 #include <subdev/timer.h>
30 gm200_sor_soff(struct nvkm_output_dp *outp)
32 return (ffs(outp->base.info.or) - 1) * 0x800;
36 gm200_sor_loff(struct nvkm_output_dp *outp)
38 return gm200_sor_soff(outp) + !(outp->base.info.sorconf.link & 1) * 0x80;
42 gm200_sor_magic(struct nvkm_output *outp)
44 struct nvkm_device *device = outp->disp->engine.subdev.device;
45 const u32 soff = outp->or * 0x100;
46 const u32 data = outp->or + 1;
47 if (outp->info.sorconf.link & 1)
48 nvkm_mask(device, 0x612308 + soff, 0x0000001f, 0x00000000 | data);
49 if (outp->info.sorconf.link & 2)
50 nvkm_mask(device, 0x612388 + soff, 0x0000001f, 0x00000010 | data);
54 gm200_sor_dp_lane_map(struct nvkm_device *device, u8 lane)
60 gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
62 struct nvkm_device *device = outp->base.disp->engine.subdev.device;
63 const u32 soff = gm200_sor_soff(outp);
64 const u32 loff = gm200_sor_loff(outp);
67 for (i = 0; i < nr; i++)
68 mask |= 1 << (gm200_sor_dp_lane_map(device, i) >> 3);
70 nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
71 nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
72 nvkm_msec(device, 2000,
73 if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000))
80 gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
81 int ln, int vs, int pe, int pc)
83 struct nvkm_device *device = outp->base.disp->engine.subdev.device;
84 struct nvkm_bios *bios = device->bios;
85 const u32 shift = gm200_sor_dp_lane_map(device, ln);
86 const u32 loff = gm200_sor_loff(outp);
88 u8 ver, hdr, cnt, len;
89 struct nvbios_dpout info;
90 struct nvbios_dpcfg ocfg;
92 addr = nvbios_dpout_match(bios, outp->base.info.hasht,
93 outp->base.info.hashm,
94 &ver, &hdr, &cnt, &len, &info);
98 addr = nvbios_dpcfg_match(bios, addr, pc, vs, pe,
99 &ver, &hdr, &cnt, &len, &ocfg);
104 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);
105 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);
106 data[2] = nvkm_rd32(device, 0x61c130 + loff);
107 if ((data[2] & 0x00000f00) < (ocfg.tx_pu << 8) || ln == 0)
108 data[2] = (data[2] & ~0x00000f00) | (ocfg.tx_pu << 8);
109 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
110 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
111 nvkm_wr32(device, 0x61c130 + loff, data[2]);
112 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);
113 nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
117 static const struct nvkm_output_dp_func
118 gm200_sor_dp_func = {
119 .pattern = gm107_sor_dp_pattern,
120 .lnk_pwr = gm200_sor_dp_lnk_pwr,
121 .lnk_ctl = gf119_sor_dp_lnk_ctl,
122 .drv_ctl = gm200_sor_dp_drv_ctl,
126 gm200_sor_dp_new(struct nvkm_disp *disp, int index, struct dcb_output *dcbE,
127 struct nvkm_output **poutp)
129 return nvkm_output_dp_new_(&gm200_sor_dp_func, disp, index, dcbE, poutp);