drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 #include <core/msgqueue.h>
  27 #include <subdev/timer.h>
  28
  29 bool
  30 nvkm_pmu_fan_controlled(struct nvkm_device *device)
  31 {
  32         struct nvkm_pmu *pmu = device->pmu;
  33
  34         /* Internal PMU FW does not currently control fans in any way,
  35          * allow SW control of fans instead.
  36          */
  37         if (pmu && pmu->func->code.size)
  38                 return false;
  39
  40         /* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi
  41          * and newer automatically control the fan speed, which would
  42          * interfere with SW control.
  43          */
  44         return (device->chipset >= 0xc0);
  45 }
  46
  47 void
  48 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable)
  49 {
  50         if (pmu && pmu->func->pgob)
  51                 pmu->func->pgob(pmu, enable);
  52 }
  53
  54 static void
  55 nvkm_pmu_recv(struct work_struct *work)
  56 {
  57         struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work);
  58         return pmu->func->recv(pmu);
  59 }
  60
  61 int
  62 nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2],
  63               u32 process, u32 message, u32 data0, u32 data1)
  64 {
  65         if (!pmu || !pmu->func->send)
  66                 return -ENODEV;
  67         return pmu->func->send(pmu, reply, process, message, data0, data1);
  68 }
  69
  70 static void
  71 nvkm_pmu_intr(struct nvkm_subdev *subdev)
  72 {
  73         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
  74         if (!pmu->func->intr)
  75                 return;
  76         pmu->func->intr(pmu);
  77 }
  78
  79 static int
  80 nvkm_pmu_fini(struct nvkm_subdev *subdev, bool suspend)
  81 {
  82         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
  83
  84         if (pmu->func->fini)
  85                 pmu->func->fini(pmu);
  86
  87         flush_work(&pmu->recv.work);
  88         return 0;
  89 }
  90
  91 static int
  92 nvkm_pmu_reset(struct nvkm_pmu *pmu)
  93 {
  94         struct nvkm_device *device = pmu->subdev.device;
  95
  96         if (!pmu->func->enabled(pmu))
  97                 return 0;
  98
  99         /* Inhibit interrupts, and wait for idle. */
 100         nvkm_wr32(device, 0x10a014, 0x0000ffff);
 101         nvkm_msec(device, 2000,
 102                 if (!nvkm_rd32(device, 0x10a04c))
 103                         break;
 104         );
 105
 106         /* Reset. */
 107         if (pmu->func->reset)
 108                 pmu->func->reset(pmu);
 109
 110         /* Wait for IMEM/DMEM scrubbing to be complete. */
 111         nvkm_msec(device, 2000,
 112                 if (!(nvkm_rd32(device, 0x10a10c) & 0x00000006))
 113                         break;
 114         );
 115
 116         return 0;
 117 }
 118
 119 static int
 120 nvkm_pmu_preinit(struct nvkm_subdev *subdev)
 121 {
 122         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
 123         return nvkm_pmu_reset(pmu);
 124 }
 125
 126 static int
 127 nvkm_pmu_init(struct nvkm_subdev *subdev)
 128 {
 129         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
 130         int ret = nvkm_pmu_reset(pmu);
 131         if (ret == 0 && pmu->func->init)
 132                 ret = pmu->func->init(pmu);
 133         return ret;
 134 }
 135
 136 static int
 137 nvkm_pmu_oneinit(struct nvkm_subdev *subdev)
 138 {
 139         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
 140         return nvkm_falcon_v1_new(&pmu->subdev, "PMU", 0x10a000, &pmu->falcon);
 141 }
 142
 143 static void *
 144 nvkm_pmu_dtor(struct nvkm_subdev *subdev)
 145 {
 146         struct nvkm_pmu *pmu = nvkm_pmu(subdev);
 147         nvkm_msgqueue_del(&pmu->queue);
 148         nvkm_falcon_del(&pmu->falcon);
 149         return nvkm_pmu(subdev);
 150 }
 151
 152 static const struct nvkm_subdev_func
 153 nvkm_pmu = {
 154         .dtor = nvkm_pmu_dtor,
 155         .preinit = nvkm_pmu_preinit,
 156         .oneinit = nvkm_pmu_oneinit,
 157         .init = nvkm_pmu_init,
 158         .fini = nvkm_pmu_fini,
 159         .intr = nvkm_pmu_intr,
 160 };
 161
 162 int
 163 nvkm_pmu_ctor(const struct nvkm_pmu_func *func, struct nvkm_device *device,
 164               int index, struct nvkm_pmu *pmu)
 165 {
 166         nvkm_subdev_ctor(&nvkm_pmu, device, index, &pmu->subdev);
 167         pmu->func = func;
 168         INIT_WORK(&pmu->recv.work, nvkm_pmu_recv);
 169         init_waitqueue_head(&pmu->recv.wait);
 170         return 0;
 171 }
 172
 173 int
 174 nvkm_pmu_new_(const struct nvkm_pmu_func *func, struct nvkm_device *device,
 175               int index, struct nvkm_pmu **ppmu)
 176 {
 177         struct nvkm_pmu *pmu;
 178         if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL)))
 179                 return -ENOMEM;
 180         return nvkm_pmu_ctor(func, device, index, *ppmu);
 181 }