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20 * DEALINGS IN THE SOFTWARE.
26 #include <core/gpuobj.h>
29 * r367 ACR: new LS signature format requires a rewrite of LS firmware and
30 * blob creation functions. Also the hsflcn_desc layout has changed slightly.
33 #define LSF_LSB_DEPMAP_SIZE 11
36 * struct acr_r367_lsf_lsb_header - LS firmware header
38 * See also struct acr_r352_lsf_lsb_header for documentation.
40 struct acr_r367_lsf_lsb_header {
42 * LS falcon signatures
43 * @prd_keys: signature to use in production mode
44 * @dgb_keys: signature to use in debug mode
45 * @b_prd_present: whether the production key is present
46 * @b_dgb_present: whether the debug key is present
47 * @falcon_id: ID of the falcon the ucode applies to
55 u32 supports_versioning;
58 u8 depmap[LSF_LSB_DEPMAP_SIZE * 2 * 4];
76 * struct acr_r367_lsf_wpr_header - LS blob WPR Header
78 * See also struct acr_r352_lsf_wpr_header for documentation.
80 struct acr_r367_lsf_wpr_header {
87 #define LSF_IMAGE_STATUS_NONE 0
88 #define LSF_IMAGE_STATUS_COPY 1
89 #define LSF_IMAGE_STATUS_VALIDATION_CODE_FAILED 2
90 #define LSF_IMAGE_STATUS_VALIDATION_DATA_FAILED 3
91 #define LSF_IMAGE_STATUS_VALIDATION_DONE 4
92 #define LSF_IMAGE_STATUS_VALIDATION_SKIPPED 5
93 #define LSF_IMAGE_STATUS_BOOTSTRAP_READY 6
94 #define LSF_IMAGE_STATUS_REVOCATION_CHECK_FAILED 7
98 * struct ls_ucode_img_r367 - ucode image augmented with r367 headers
100 struct ls_ucode_img_r367 {
101 struct ls_ucode_img base;
103 struct acr_r367_lsf_wpr_header wpr_header;
104 struct acr_r367_lsf_lsb_header lsb_header;
106 #define ls_ucode_img_r367(i) container_of(i, struct ls_ucode_img_r367, base)
108 struct ls_ucode_img *
109 acr_r367_ls_ucode_img_load(const struct acr_r352 *acr,
110 const struct nvkm_secboot *sb,
111 enum nvkm_secboot_falcon falcon_id)
113 const struct nvkm_subdev *subdev = acr->base.subdev;
114 struct ls_ucode_img_r367 *img;
117 img = kzalloc(sizeof(*img), GFP_KERNEL);
119 return ERR_PTR(-ENOMEM);
121 img->base.falcon_id = falcon_id;
123 ret = acr->func->ls_func[falcon_id]->load(sb, &img->base);
125 kfree(img->base.ucode_data);
126 kfree(img->base.sig);
131 /* Check that the signature size matches our expectations... */
132 if (img->base.sig_size != sizeof(img->lsb_header.signature)) {
133 nvkm_error(subdev, "invalid signature size for %s falcon!\n",
134 nvkm_secboot_falcon_name[falcon_id]);
135 return ERR_PTR(-EINVAL);
138 /* Copy signature to the right place */
139 memcpy(&img->lsb_header.signature, img->base.sig, img->base.sig_size);
141 /* not needed? the signature should already have the right value */
142 img->lsb_header.signature.falcon_id = falcon_id;
147 #define LSF_LSB_HEADER_ALIGN 256
148 #define LSF_BL_DATA_ALIGN 256
149 #define LSF_BL_DATA_SIZE_ALIGN 256
150 #define LSF_BL_CODE_SIZE_ALIGN 256
151 #define LSF_UCODE_DATA_ALIGN 4096
154 acr_r367_ls_img_fill_headers(struct acr_r352 *acr,
155 struct ls_ucode_img_r367 *img, u32 offset)
157 struct ls_ucode_img *_img = &img->base;
158 struct acr_r367_lsf_wpr_header *whdr = &img->wpr_header;
159 struct acr_r367_lsf_lsb_header *lhdr = &img->lsb_header;
160 struct ls_ucode_img_desc *desc = &_img->ucode_desc;
161 const struct acr_r352_ls_func *func =
162 acr->func->ls_func[_img->falcon_id];
164 /* Fill WPR header */
165 whdr->falcon_id = _img->falcon_id;
166 whdr->bootstrap_owner = acr->base.boot_falcon;
167 whdr->bin_version = lhdr->signature.version;
168 whdr->status = LSF_IMAGE_STATUS_COPY;
170 /* Skip bootstrapping falcons started by someone else than ACR */
171 if (acr->lazy_bootstrap & BIT(_img->falcon_id))
172 whdr->lazy_bootstrap = 1;
174 /* Align, save off, and include an LSB header size */
175 offset = ALIGN(offset, LSF_LSB_HEADER_ALIGN);
176 whdr->lsb_offset = offset;
177 offset += sizeof(*lhdr);
180 * Align, save off, and include the original (static) ucode
183 offset = ALIGN(offset, LSF_UCODE_DATA_ALIGN);
184 _img->ucode_off = lhdr->ucode_off = offset;
185 offset += _img->ucode_size;
188 * For falcons that use a boot loader (BL), we append a loader
189 * desc structure on the end of the ucode image and consider
190 * this the boot loader data. The host will then copy the loader
191 * desc args to this space within the WPR region (before locking
192 * down) and the HS bin will then copy them to DMEM 0 for the
195 lhdr->bl_code_size = ALIGN(desc->bootloader_size,
196 LSF_BL_CODE_SIZE_ALIGN);
197 lhdr->ucode_size = ALIGN(desc->app_resident_data_offset,
198 LSF_BL_CODE_SIZE_ALIGN) + lhdr->bl_code_size;
199 lhdr->data_size = ALIGN(desc->app_size, LSF_BL_CODE_SIZE_ALIGN) +
200 lhdr->bl_code_size - lhdr->ucode_size;
202 * Though the BL is located at 0th offset of the image, the VA
203 * is different to make sure that it doesn't collide the actual
206 lhdr->bl_imem_off = desc->bootloader_imem_offset;
207 lhdr->app_code_off = desc->app_start_offset +
208 desc->app_resident_code_offset;
209 lhdr->app_code_size = desc->app_resident_code_size;
210 lhdr->app_data_off = desc->app_start_offset +
211 desc->app_resident_data_offset;
212 lhdr->app_data_size = desc->app_resident_data_size;
214 lhdr->flags = func->lhdr_flags;
215 if (_img->falcon_id == acr->base.boot_falcon)
216 lhdr->flags |= LSF_FLAG_DMACTL_REQ_CTX;
218 /* Align and save off BL descriptor size */
219 lhdr->bl_data_size = ALIGN(func->bl_desc_size, LSF_BL_DATA_SIZE_ALIGN);
222 * Align, save off, and include the additional BL data
224 offset = ALIGN(offset, LSF_BL_DATA_ALIGN);
225 lhdr->bl_data_off = offset;
226 offset += lhdr->bl_data_size;
232 acr_r367_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs)
234 struct ls_ucode_img_r367 *img;
239 /* Count the number of images to manage */
240 list_for_each(l, imgs)
244 * Start with an array of WPR headers at the base of the WPR.
245 * The expectation here is that the secure falcon will do a single DMA
246 * read of this array and cache it internally so it's ok to pack these.
247 * Also, we add 1 to the falcon count to indicate the end of the array.
249 offset = sizeof(img->wpr_header) * (count + 1);
252 * Walk the managed falcons, accounting for the LSB structs
253 * as well as the ucode images.
255 list_for_each_entry(img, imgs, base.node) {
256 offset = acr_r367_ls_img_fill_headers(acr, img, offset);
263 acr_r367_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs,
264 struct nvkm_gpuobj *wpr_blob, u64 wpr_addr)
266 struct ls_ucode_img *_img;
268 u32 max_desc_size = 0;
271 list_for_each_entry(_img, imgs, node) {
272 const struct acr_r352_ls_func *ls_func =
273 acr->func->ls_func[_img->falcon_id];
275 max_desc_size = max(max_desc_size, ls_func->bl_desc_size);
278 gdesc = kmalloc(max_desc_size, GFP_KERNEL);
284 list_for_each_entry(_img, imgs, node) {
285 struct ls_ucode_img_r367 *img = ls_ucode_img_r367(_img);
286 const struct acr_r352_ls_func *ls_func =
287 acr->func->ls_func[_img->falcon_id];
289 nvkm_gpuobj_memcpy_to(wpr_blob, pos, &img->wpr_header,
290 sizeof(img->wpr_header));
292 nvkm_gpuobj_memcpy_to(wpr_blob, img->wpr_header.lsb_offset,
293 &img->lsb_header, sizeof(img->lsb_header));
295 /* Generate and write BL descriptor */
296 memset(gdesc, 0, ls_func->bl_desc_size);
297 ls_func->generate_bl_desc(&acr->base, _img, wpr_addr, gdesc);
299 nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.bl_data_off,
300 gdesc, ls_func->bl_desc_size);
303 nvkm_gpuobj_memcpy_to(wpr_blob, img->lsb_header.ucode_off,
304 _img->ucode_data, _img->ucode_size);
306 pos += sizeof(img->wpr_header);
309 nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID);
318 struct acr_r367_hsflcn_desc {
319 u8 reserved_dmem[0x200];
323 u32 mmu_memory_range;
324 #define FLCN_ACR_MAX_REGIONS 2
334 u32 shadow_mem_start_addr;
335 } region_props[FLCN_ACR_MAX_REGIONS];
338 u64 ucode_blob_base __aligned(8);
348 acr_r367_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb,
351 struct acr_r367_hsflcn_desc *desc = _desc;
352 struct nvkm_gpuobj *ls_blob = acr->ls_blob;
354 /* WPR region information if WPR is not fixed */
355 if (sb->wpr_size == 0) {
356 u64 wpr_start = ls_blob->addr;
357 u64 wpr_end = ls_blob->addr + ls_blob->size;
359 if (acr->func->shadow_blob)
360 wpr_start += ls_blob->size / 2;
362 desc->wpr_region_id = 1;
363 desc->regions.no_regions = 2;
364 desc->regions.region_props[0].start_addr = wpr_start >> 8;
365 desc->regions.region_props[0].end_addr = wpr_end >> 8;
366 desc->regions.region_props[0].region_id = 1;
367 desc->regions.region_props[0].read_mask = 0xf;
368 desc->regions.region_props[0].write_mask = 0xc;
369 desc->regions.region_props[0].client_mask = 0x2;
370 if (acr->func->shadow_blob)
371 desc->regions.region_props[0].shadow_mem_start_addr =
374 desc->regions.region_props[0].shadow_mem_start_addr = 0;
376 desc->ucode_blob_base = ls_blob->addr;
377 desc->ucode_blob_size = ls_blob->size;
381 const struct acr_r352_func
383 .fixup_hs_desc = acr_r367_fixup_hs_desc,
384 .generate_hs_bl_desc = acr_r361_generate_hs_bl_desc,
385 .hs_bl_desc_size = sizeof(struct acr_r361_flcn_bl_desc),
387 .ls_ucode_img_load = acr_r367_ls_ucode_img_load,
388 .ls_fill_headers = acr_r367_ls_fill_headers,
389 .ls_write_wpr = acr_r367_ls_write_wpr,
391 [NVKM_SECBOOT_FALCON_FECS] = &acr_r361_ls_fecs_func,
392 [NVKM_SECBOOT_FALCON_GPCCS] = &acr_r361_ls_gpccs_func,
393 [NVKM_SECBOOT_FALCON_PMU] = &acr_r361_ls_pmu_func,
394 [NVKM_SECBOOT_FALCON_SEC2] = &acr_r361_ls_sec2_func,
399 acr_r367_new(enum nvkm_secboot_falcon boot_falcon,
400 unsigned long managed_falcons)
402 return acr_r352_new_(&acr_r367_func, boot_falcon, managed_falcons);