drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Rob Clark <rob@ti.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/of.h>
  19 #include <linux/sort.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_probe_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 /*
  38  * mode config funcs
  39  */
  40
  41 /* Notes about mapping DSS and DRM entities:
  42  *    CRTC:        overlay
  43  *    encoder:     manager.. with some extension to allow one primary CRTC
  44  *                 and zero or more video CRTC's to be mapped to one encoder?
  45  *    connector:   dssdev.. manager can be attached/detached from different
  46  *                 devices
  47  */
  48
  49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  50                                             struct drm_atomic_state *old_state)
  51 {
  52         struct drm_crtc_state *new_crtc_state;
  53         struct drm_crtc *crtc;
  54         unsigned int i;
  55         int ret;
  56
  57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  58                 if (!new_crtc_state->active)
  59                         continue;
  60
  61                 ret = omap_crtc_wait_pending(crtc);
  62
  63                 if (!ret)
  64                         dev_warn(dev->dev,
  65                                  "atomic complete timeout (pipe %u)!\n", i);
  66         }
  67 }
  68
  69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  70 {
  71         struct drm_device *dev = old_state->dev;
  72         struct omap_drm_private *priv = dev->dev_private;
  73
  74         priv->dispc_ops->runtime_get(priv->dispc);
  75
  76         /* Apply the atomic update. */
  77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  78
  79         if (priv->omaprev != 0x3430) {
  80                 /* With the current dss dispc implementation we have to enable
  81                  * the new modeset before we can commit planes. The dispc ovl
  82                  * configuration relies on the video mode configuration been
  83                  * written into the HW when the ovl configuration is
  84                  * calculated.
  85                  *
  86                  * This approach is not ideal because after a mode change the
  87                  * plane update is executed only after the first vblank
  88                  * interrupt. The dispc implementation should be fixed so that
  89                  * it is able use uncommitted drm state information.
  90                  */
  91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  92                 omap_atomic_wait_for_completion(dev, old_state);
  93
  94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  95
  96                 drm_atomic_helper_commit_hw_done(old_state);
  97         } else {
  98                 /*
  99                  * OMAP3 DSS seems to have issues with the work-around above,
 100                  * resulting in endless sync losts if a crtc is enabled without
 101                  * a plane. For now, skip the WA for OMAP3.
 102                  */
 103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 104
 105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 106
 107                 drm_atomic_helper_commit_hw_done(old_state);
 108         }
 109
 110         /*
 111          * Wait for completion of the page flips to ensure that old buffers
 112          * can't be touched by the hardware anymore before cleaning up planes.
 113          */
 114         omap_atomic_wait_for_completion(dev, old_state);
 115
 116         drm_atomic_helper_cleanup_planes(dev, old_state);
 117
 118         priv->dispc_ops->runtime_put(priv->dispc);
 119 }
 120
 121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 122         .atomic_commit_tail = omap_atomic_commit_tail,
 123 };
 124
 125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 126         .fb_create = omap_framebuffer_create,
 127         .output_poll_changed = drm_fb_helper_output_poll_changed,
 128         .atomic_check = drm_atomic_helper_check,
 129         .atomic_commit = drm_atomic_helper_commit,
 130 };
 131
 132 static void omap_disconnect_pipelines(struct drm_device *ddev)
 133 {
 134         struct omap_drm_private *priv = ddev->dev_private;
 135         unsigned int i;
 136
 137         for (i = 0; i < priv->num_pipes; i++) {
 138                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 139
 140                 omapdss_device_disconnect(NULL, pipe->output);
 141
 142                 omapdss_device_put(pipe->output);
 143                 omapdss_device_put(pipe->display);
 144                 pipe->output = NULL;
 145                 pipe->display = NULL;
 146         }
 147
 148         memset(&priv->channels, 0, sizeof(priv->channels));
 149
 150         priv->num_pipes = 0;
 151 }
 152
 153 static int omap_compare_pipes(const void *a, const void *b)
 154 {
 155         const struct omap_drm_pipeline *pipe1 = a;
 156         const struct omap_drm_pipeline *pipe2 = b;
 157
 158         if (pipe1->alias_id > pipe2->alias_id)
 159                 return 1;
 160         else if (pipe1->alias_id < pipe2->alias_id)
 161                 return -1;
 162         return 0;
 163 }
 164
 165 static int omap_connect_pipelines(struct drm_device *ddev)
 166 {
 167         struct omap_drm_private *priv = ddev->dev_private;
 168         struct omap_dss_device *output = NULL;
 169         unsigned int i;
 170         int r;
 171
 172         if (!omapdss_stack_is_ready())
 173                 return -EPROBE_DEFER;
 174
 175         for_each_dss_output(output) {
 176                 r = omapdss_device_connect(priv->dss, NULL, output);
 177                 if (r == -EPROBE_DEFER) {
 178                         omapdss_device_put(output);
 179                         goto cleanup;
 180                 } else if (r) {
 181                         dev_warn(output->dev, "could not connect output %s\n",
 182                                  output->name);
 183                 } else {
 184                         struct omap_drm_pipeline *pipe;
 185                         int id;
 186
 187                         pipe = &priv->pipes[priv->num_pipes++];
 188                         pipe->output = omapdss_device_get(output);
 189                         pipe->display = omapdss_display_get(output);
 190
 191                         id = of_alias_get_id(pipe->display->dev->of_node,
 192                                              "display");
 193                         pipe->alias_id = id >= 0 ? id : priv->num_pipes - 1;
 194
 195                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 196                                 /* To balance the 'for_each_dss_output' loop */
 197                                 omapdss_device_put(output);
 198                                 break;
 199                         }
 200                 }
 201         }
 202
 203         /* Sort the list by DT aliases */
 204         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 205              omap_compare_pipes, NULL);
 206
 207         /*
 208          * Populate the pipeline lookup table by DISPC channel. Only one display
 209          * is allowed per channel.
 210          */
 211         for (i = 0; i < priv->num_pipes; ++i) {
 212                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 213                 enum omap_channel channel = pipe->output->dispc_channel;
 214
 215                 if (WARN_ON(priv->channels[channel] != NULL)) {
 216                         r = -EINVAL;
 217                         goto cleanup;
 218                 }
 219
 220                 priv->channels[channel] = pipe;
 221         }
 222
 223         return 0;
 224
 225 cleanup:
 226         /*
 227          * if we are deferring probe, we disconnect the devices we previously
 228          * connected
 229          */
 230         omap_disconnect_pipelines(ddev);
 231
 232         return r;
 233 }
 234
 235 static int omap_modeset_init_properties(struct drm_device *dev)
 236 {
 237         struct omap_drm_private *priv = dev->dev_private;
 238         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
 239
 240         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 241                                                       num_planes - 1);
 242         if (!priv->zorder_prop)
 243                 return -ENOMEM;
 244
 245         return 0;
 246 }
 247
 248 static int omap_modeset_init(struct drm_device *dev)
 249 {
 250         struct omap_drm_private *priv = dev->dev_private;
 251         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
 252         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
 253         unsigned int i;
 254         int ret;
 255         u32 plane_crtc_mask;
 256
 257         drm_mode_config_init(dev);
 258
 259         ret = omap_modeset_init_properties(dev);
 260         if (ret < 0)
 261                 return ret;
 262
 263         /*
 264          * This function creates exactly one connector, encoder, crtc,
 265          * and primary plane per each connected dss-device. Each
 266          * connector->encoder->crtc chain is expected to be separate
 267          * and each crtc is connect to a single dss-channel. If the
 268          * configuration does not match the expectations or exceeds
 269          * the available resources, the configuration is rejected.
 270          */
 271         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 272                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 273                         __func__);
 274                 return -EINVAL;
 275         }
 276
 277         /* Create all planes first. They can all be put to any CRTC. */
 278         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 279
 280         for (i = 0; i < num_ovls; i++) {
 281                 enum drm_plane_type type = i < priv->num_pipes
 282                                          ? DRM_PLANE_TYPE_PRIMARY
 283                                          : DRM_PLANE_TYPE_OVERLAY;
 284                 struct drm_plane *plane;
 285
 286                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 287                         return -EINVAL;
 288
 289                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 290                 if (IS_ERR(plane))
 291                         return PTR_ERR(plane);
 292
 293                 priv->planes[priv->num_planes++] = plane;
 294         }
 295
 296         /* Create the CRTCs, encoders and connectors. */
 297         for (i = 0; i < priv->num_pipes; i++) {
 298                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 299                 struct omap_dss_device *display = pipe->display;
 300                 struct drm_connector *connector;
 301                 struct drm_encoder *encoder;
 302                 struct drm_crtc *crtc;
 303
 304                 encoder = omap_encoder_init(dev, pipe->output);
 305                 if (!encoder)
 306                         return -ENOMEM;
 307
 308                 connector = omap_connector_init(dev, pipe->output, display,
 309                                                 encoder);
 310                 if (!connector)
 311                         return -ENOMEM;
 312
 313                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 314                 if (IS_ERR(crtc))
 315                         return PTR_ERR(crtc);
 316
 317                 drm_connector_attach_encoder(connector, encoder);
 318                 encoder->possible_crtcs = 1 << i;
 319
 320                 pipe->crtc = crtc;
 321                 pipe->encoder = encoder;
 322                 pipe->connector = connector;
 323         }
 324
 325         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 326             priv->num_planes, priv->num_pipes);
 327
 328         dev->mode_config.min_width = 8;
 329         dev->mode_config.min_height = 2;
 330
 331         /*
 332          * Note: these values are used for multiple independent things:
 333          * connector mode filtering, buffer sizes, crtc sizes...
 334          * Use big enough values here to cover all use cases, and do more
 335          * specific checking in the respective code paths.
 336          */
 337         dev->mode_config.max_width = 8192;
 338         dev->mode_config.max_height = 8192;
 339
 340         /* We want the zpos to be normalized */
 341         dev->mode_config.normalize_zpos = true;
 342
 343         dev->mode_config.funcs = &omap_mode_config_funcs;
 344         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 345
 346         drm_mode_config_reset(dev);
 347
 348         omap_drm_irq_install(dev);
 349
 350         return 0;
 351 }
 352
 353 /*
 354  * Enable the HPD in external components if supported
 355  */
 356 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 357 {
 358         struct omap_drm_private *priv = ddev->dev_private;
 359         int i;
 360
 361         for (i = 0; i < priv->num_pipes; i++)
 362                 omap_connector_enable_hpd(priv->pipes[i].connector);
 363 }
 364
 365 /*
 366  * Disable the HPD in external components if supported
 367  */
 368 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 369 {
 370         struct omap_drm_private *priv = ddev->dev_private;
 371         int i;
 372
 373         for (i = 0; i < priv->num_pipes; i++)
 374                 omap_connector_disable_hpd(priv->pipes[i].connector);
 375 }
 376
 377 /*
 378  * drm ioctl funcs
 379  */
 380
 381
 382 static int ioctl_get_param(struct drm_device *dev, void *data,
 383                 struct drm_file *file_priv)
 384 {
 385         struct omap_drm_private *priv = dev->dev_private;
 386         struct drm_omap_param *args = data;
 387
 388         DBG("%p: param=%llu", dev, args->param);
 389
 390         switch (args->param) {
 391         case OMAP_PARAM_CHIPSET_ID:
 392                 args->value = priv->omaprev;
 393                 break;
 394         default:
 395                 DBG("unknown parameter %lld", args->param);
 396                 return -EINVAL;
 397         }
 398
 399         return 0;
 400 }
 401
 402 static int ioctl_set_param(struct drm_device *dev, void *data,
 403                 struct drm_file *file_priv)
 404 {
 405         struct drm_omap_param *args = data;
 406
 407         switch (args->param) {
 408         default:
 409                 DBG("unknown parameter %lld", args->param);
 410                 return -EINVAL;
 411         }
 412
 413         return 0;
 414 }
 415
 416 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 417
 418 static int ioctl_gem_new(struct drm_device *dev, void *data,
 419                 struct drm_file *file_priv)
 420 {
 421         struct drm_omap_gem_new *args = data;
 422         u32 flags = args->flags & OMAP_BO_USER_MASK;
 423
 424         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 425              args->size.bytes, flags);
 426
 427         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 428                                    &args->handle);
 429 }
 430
 431 static int ioctl_gem_info(struct drm_device *dev, void *data,
 432                 struct drm_file *file_priv)
 433 {
 434         struct drm_omap_gem_info *args = data;
 435         struct drm_gem_object *obj;
 436         int ret = 0;
 437
 438         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 439
 440         obj = drm_gem_object_lookup(file_priv, args->handle);
 441         if (!obj)
 442                 return -ENOENT;
 443
 444         args->size = omap_gem_mmap_size(obj);
 445         args->offset = omap_gem_mmap_offset(obj);
 446
 447         drm_gem_object_put_unlocked(obj);
 448
 449         return ret;
 450 }
 451
 452 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 453         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 454                           DRM_AUTH | DRM_RENDER_ALLOW),
 455         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
 456                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 457         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 458                           DRM_AUTH | DRM_RENDER_ALLOW),
 459         /* Deprecated, to be removed. */
 460         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 461                           DRM_AUTH | DRM_RENDER_ALLOW),
 462         /* Deprecated, to be removed. */
 463         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 464                           DRM_AUTH | DRM_RENDER_ALLOW),
 465         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 466                           DRM_AUTH | DRM_RENDER_ALLOW),
 467 };
 468
 469 /*
 470  * drm driver funcs
 471  */
 472
 473 static int dev_open(struct drm_device *dev, struct drm_file *file)
 474 {
 475         file->driver_priv = NULL;
 476
 477         DBG("open: dev=%p, file=%p", dev, file);
 478
 479         return 0;
 480 }
 481
 482 static const struct vm_operations_struct omap_gem_vm_ops = {
 483         .fault = omap_gem_fault,
 484         .open = drm_gem_vm_open,
 485         .close = drm_gem_vm_close,
 486 };
 487
 488 static const struct file_operations omapdriver_fops = {
 489         .owner = THIS_MODULE,
 490         .open = drm_open,
 491         .unlocked_ioctl = drm_ioctl,
 492         .compat_ioctl = drm_compat_ioctl,
 493         .release = drm_release,
 494         .mmap = omap_gem_mmap,
 495         .poll = drm_poll,
 496         .read = drm_read,
 497         .llseek = noop_llseek,
 498 };
 499
 500 static struct drm_driver omap_drm_driver = {
 501         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 502                 DRIVER_ATOMIC | DRIVER_RENDER,
 503         .open = dev_open,
 504         .lastclose = drm_fb_helper_lastclose,
 505 #ifdef CONFIG_DEBUG_FS
 506         .debugfs_init = omap_debugfs_init,
 507 #endif
 508         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 509         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 510         .gem_prime_export = omap_gem_prime_export,
 511         .gem_prime_import = omap_gem_prime_import,
 512         .gem_free_object_unlocked = omap_gem_free_object,
 513         .gem_vm_ops = &omap_gem_vm_ops,
 514         .dumb_create = omap_gem_dumb_create,
 515         .dumb_map_offset = omap_gem_dumb_map_offset,
 516         .ioctls = ioctls,
 517         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 518         .fops = &omapdriver_fops,
 519         .name = DRIVER_NAME,
 520         .desc = DRIVER_DESC,
 521         .date = DRIVER_DATE,
 522         .major = DRIVER_MAJOR,
 523         .minor = DRIVER_MINOR,
 524         .patchlevel = DRIVER_PATCHLEVEL,
 525 };
 526
 527 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 528         { .family = "OMAP3", .data = (void *)0x3430 },
 529         { .family = "OMAP4", .data = (void *)0x4430 },
 530         { .family = "OMAP5", .data = (void *)0x5430 },
 531         { .family = "DRA7",  .data = (void *)0x0752 },
 532         { /* sentinel */ }
 533 };
 534
 535 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 536 {
 537         const struct soc_device_attribute *soc;
 538         struct drm_device *ddev;
 539         unsigned int i;
 540         int ret;
 541
 542         DBG("%s", dev_name(dev));
 543
 544         /* Allocate and initialize the DRM device. */
 545         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 546         if (IS_ERR(ddev))
 547                 return PTR_ERR(ddev);
 548
 549         priv->ddev = ddev;
 550         ddev->dev_private = priv;
 551
 552         priv->dev = dev;
 553         priv->dss = omapdss_get_dss();
 554         priv->dispc = dispc_get_dispc(priv->dss);
 555         priv->dispc_ops = dispc_get_ops(priv->dss);
 556
 557         omap_crtc_pre_init(priv);
 558
 559         ret = omap_connect_pipelines(ddev);
 560         if (ret)
 561                 goto err_crtc_uninit;
 562
 563         soc = soc_device_match(omapdrm_soc_devices);
 564         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 565         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 566
 567         mutex_init(&priv->list_lock);
 568         INIT_LIST_HEAD(&priv->obj_list);
 569
 570         /* Get memory bandwidth limits */
 571         if (priv->dispc_ops->get_memory_bandwidth_limit)
 572                 priv->max_bandwidth =
 573                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
 574
 575         omap_gem_init(ddev);
 576
 577         ret = omap_modeset_init(ddev);
 578         if (ret) {
 579                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 580                 goto err_gem_deinit;
 581         }
 582
 583         /* Initialize vblank handling, start with all CRTCs disabled. */
 584         ret = drm_vblank_init(ddev, priv->num_pipes);
 585         if (ret) {
 586                 dev_err(priv->dev, "could not init vblank\n");
 587                 goto err_cleanup_modeset;
 588         }
 589
 590         for (i = 0; i < priv->num_pipes; i++)
 591                 drm_crtc_vblank_off(priv->pipes[i].crtc);
 592
 593         omap_fbdev_init(ddev);
 594
 595         drm_kms_helper_poll_init(ddev);
 596         omap_modeset_enable_external_hpd(ddev);
 597
 598         /*
 599          * Register the DRM device with the core and the connectors with
 600          * sysfs.
 601          */
 602         ret = drm_dev_register(ddev, 0);
 603         if (ret)
 604                 goto err_cleanup_helpers;
 605
 606         return 0;
 607
 608 err_cleanup_helpers:
 609         omap_modeset_disable_external_hpd(ddev);
 610         drm_kms_helper_poll_fini(ddev);
 611
 612         omap_fbdev_fini(ddev);
 613 err_cleanup_modeset:
 614         drm_mode_config_cleanup(ddev);
 615         omap_drm_irq_uninstall(ddev);
 616 err_gem_deinit:
 617         omap_gem_deinit(ddev);
 618         destroy_workqueue(priv->wq);
 619         omap_disconnect_pipelines(ddev);
 620 err_crtc_uninit:
 621         omap_crtc_pre_uninit(priv);
 622         drm_dev_put(ddev);
 623         return ret;
 624 }
 625
 626 static void omapdrm_cleanup(struct omap_drm_private *priv)
 627 {
 628         struct drm_device *ddev = priv->ddev;
 629
 630         DBG("");
 631
 632         drm_dev_unregister(ddev);
 633
 634         omap_modeset_disable_external_hpd(ddev);
 635         drm_kms_helper_poll_fini(ddev);
 636
 637         omap_fbdev_fini(ddev);
 638
 639         drm_atomic_helper_shutdown(ddev);
 640
 641         drm_mode_config_cleanup(ddev);
 642
 643         omap_drm_irq_uninstall(ddev);
 644         omap_gem_deinit(ddev);
 645
 646         destroy_workqueue(priv->wq);
 647
 648         omap_disconnect_pipelines(ddev);
 649         omap_crtc_pre_uninit(priv);
 650
 651         drm_dev_put(ddev);
 652 }
 653
 654 static int pdev_probe(struct platform_device *pdev)
 655 {
 656         struct omap_drm_private *priv;
 657         int ret;
 658
 659         if (omapdss_is_initialized() == false)
 660                 return -EPROBE_DEFER;
 661
 662         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 663         if (ret) {
 664                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 665                 return ret;
 666         }
 667
 668         /* Allocate and initialize the driver private structure. */
 669         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 670         if (!priv)
 671                 return -ENOMEM;
 672
 673         platform_set_drvdata(pdev, priv);
 674
 675         ret = omapdrm_init(priv, &pdev->dev);
 676         if (ret < 0)
 677                 kfree(priv);
 678
 679         return ret;
 680 }
 681
 682 static int pdev_remove(struct platform_device *pdev)
 683 {
 684         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 685
 686         omapdrm_cleanup(priv);
 687         kfree(priv);
 688
 689         return 0;
 690 }
 691
 692 #ifdef CONFIG_PM_SLEEP
 693 static int omap_drm_suspend(struct device *dev)
 694 {
 695         struct omap_drm_private *priv = dev_get_drvdata(dev);
 696         struct drm_device *drm_dev = priv->ddev;
 697
 698         return drm_mode_config_helper_suspend(drm_dev);
 699 }
 700
 701 static int omap_drm_resume(struct device *dev)
 702 {
 703         struct omap_drm_private *priv = dev_get_drvdata(dev);
 704         struct drm_device *drm_dev = priv->ddev;
 705
 706         drm_mode_config_helper_resume(drm_dev);
 707
 708         return omap_gem_resume(drm_dev);
 709 }
 710 #endif
 711
 712 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 713
 714 static struct platform_driver pdev = {
 715         .driver = {
 716                 .name = "omapdrm",
 717                 .pm = &omapdrm_pm_ops,
 718         },
 719         .probe = pdev_probe,
 720         .remove = pdev_remove,
 721 };
 722
 723 static struct platform_driver * const drivers[] = {
 724         &omap_dmm_driver,
 725         &pdev,
 726 };
 727
 728 static int __init omap_drm_init(void)
 729 {
 730         DBG("init");
 731
 732         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 733 }
 734
 735 static void __exit omap_drm_fini(void)
 736 {
 737         DBG("fini");
 738
 739         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 740 }
 741
 742 /* need late_initcall() so we load after dss_driver's are loaded */
 743 late_initcall(omap_drm_init);
 744 module_exit(omap_drm_fini);
 745
 746 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 747 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 748 MODULE_ALIAS("platform:" DRIVER_NAME);
 749 MODULE_LICENSE("GPL v2");