drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Rob Clark <rob@ti.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/dma-mapping.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/sort.h>
  21 #include <linux/sys_soc.h>
  22
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25 #include <drm/drm_drv.h>
  26 #include <drm/drm_fb_helper.h>
  27 #include <drm/drm_file.h>
  28 #include <drm/drm_ioctl.h>
  29 #include <drm/drm_panel.h>
  30 #include <drm/drm_prime.h>
  31 #include <drm/drm_probe_helper.h>
  32 #include <drm/drm_vblank.h>
  33
  34 #include "omap_dmm_tiler.h"
  35 #include "omap_drv.h"
  36
  37 #define DRIVER_NAME             MODULE_NAME
  38 #define DRIVER_DESC             "OMAP DRM"
  39 #define DRIVER_DATE             "20110917"
  40 #define DRIVER_MAJOR            1
  41 #define DRIVER_MINOR            0
  42 #define DRIVER_PATCHLEVEL       0
  43
  44 /*
  45  * mode config funcs
  46  */
  47
  48 /* Notes about mapping DSS and DRM entities:
  49  *    CRTC:        overlay
  50  *    encoder:     manager.. with some extension to allow one primary CRTC
  51  *                 and zero or more video CRTC's to be mapped to one encoder?
  52  *    connector:   dssdev.. manager can be attached/detached from different
  53  *                 devices
  54  */
  55
  56 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  57                                             struct drm_atomic_state *old_state)
  58 {
  59         struct drm_crtc_state *new_crtc_state;
  60         struct drm_crtc *crtc;
  61         unsigned int i;
  62         int ret;
  63
  64         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  65                 if (!new_crtc_state->active)
  66                         continue;
  67
  68                 ret = omap_crtc_wait_pending(crtc);
  69
  70                 if (!ret)
  71                         dev_warn(dev->dev,
  72                                  "atomic complete timeout (pipe %u)!\n", i);
  73         }
  74 }
  75
  76 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  77 {
  78         struct drm_device *dev = old_state->dev;
  79         struct omap_drm_private *priv = dev->dev_private;
  80
  81         priv->dispc_ops->runtime_get(priv->dispc);
  82
  83         /* Apply the atomic update. */
  84         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  85
  86         if (priv->omaprev != 0x3430) {
  87                 /* With the current dss dispc implementation we have to enable
  88                  * the new modeset before we can commit planes. The dispc ovl
  89                  * configuration relies on the video mode configuration been
  90                  * written into the HW when the ovl configuration is
  91                  * calculated.
  92                  *
  93                  * This approach is not ideal because after a mode change the
  94                  * plane update is executed only after the first vblank
  95                  * interrupt. The dispc implementation should be fixed so that
  96                  * it is able use uncommitted drm state information.
  97                  */
  98                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  99                 omap_atomic_wait_for_completion(dev, old_state);
 100
 101                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 102
 103                 drm_atomic_helper_commit_hw_done(old_state);
 104         } else {
 105                 /*
 106                  * OMAP3 DSS seems to have issues with the work-around above,
 107                  * resulting in endless sync losts if a crtc is enabled without
 108                  * a plane. For now, skip the WA for OMAP3.
 109                  */
 110                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 111
 112                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 113
 114                 drm_atomic_helper_commit_hw_done(old_state);
 115         }
 116
 117         /*
 118          * Wait for completion of the page flips to ensure that old buffers
 119          * can't be touched by the hardware anymore before cleaning up planes.
 120          */
 121         omap_atomic_wait_for_completion(dev, old_state);
 122
 123         drm_atomic_helper_cleanup_planes(dev, old_state);
 124
 125         priv->dispc_ops->runtime_put(priv->dispc);
 126 }
 127
 128 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 129         .atomic_commit_tail = omap_atomic_commit_tail,
 130 };
 131
 132 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 133         .fb_create = omap_framebuffer_create,
 134         .output_poll_changed = drm_fb_helper_output_poll_changed,
 135         .atomic_check = drm_atomic_helper_check,
 136         .atomic_commit = drm_atomic_helper_commit,
 137 };
 138
 139 static void omap_disconnect_pipelines(struct drm_device *ddev)
 140 {
 141         struct omap_drm_private *priv = ddev->dev_private;
 142         unsigned int i;
 143
 144         for (i = 0; i < priv->num_pipes; i++) {
 145                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 146
 147                 if (pipe->output->panel)
 148                         drm_panel_detach(pipe->output->panel);
 149
 150                 omapdss_device_disconnect(NULL, pipe->output);
 151
 152                 omapdss_device_put(pipe->output);
 153                 pipe->output = NULL;
 154         }
 155
 156         memset(&priv->channels, 0, sizeof(priv->channels));
 157
 158         priv->num_pipes = 0;
 159 }
 160
 161 static int omap_connect_pipelines(struct drm_device *ddev)
 162 {
 163         struct omap_drm_private *priv = ddev->dev_private;
 164         struct omap_dss_device *output = NULL;
 165         int r;
 166
 167         for_each_dss_output(output) {
 168                 r = omapdss_device_connect(priv->dss, NULL, output);
 169                 if (r == -EPROBE_DEFER) {
 170                         omapdss_device_put(output);
 171                         return r;
 172                 } else if (r) {
 173                         dev_warn(output->dev, "could not connect output %s\n",
 174                                  output->name);
 175                 } else {
 176                         struct omap_drm_pipeline *pipe;
 177
 178                         pipe = &priv->pipes[priv->num_pipes++];
 179                         pipe->output = omapdss_device_get(output);
 180
 181                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 182                                 /* To balance the 'for_each_dss_output' loop */
 183                                 omapdss_device_put(output);
 184                                 break;
 185                         }
 186                 }
 187         }
 188
 189         return 0;
 190 }
 191
 192 static int omap_compare_pipelines(const void *a, const void *b)
 193 {
 194         const struct omap_drm_pipeline *pipe1 = a;
 195         const struct omap_drm_pipeline *pipe2 = b;
 196
 197         if (pipe1->alias_id > pipe2->alias_id)
 198                 return 1;
 199         else if (pipe1->alias_id < pipe2->alias_id)
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static int omap_modeset_init_properties(struct drm_device *dev)
 205 {
 206         struct omap_drm_private *priv = dev->dev_private;
 207         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
 208
 209         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 210                                                       num_planes - 1);
 211         if (!priv->zorder_prop)
 212                 return -ENOMEM;
 213
 214         return 0;
 215 }
 216
 217 static int omap_display_id(struct omap_dss_device *output)
 218 {
 219         struct device_node *node = NULL;
 220
 221         if (output->next) {
 222                 struct omap_dss_device *display;
 223
 224                 display = omapdss_display_get(output);
 225                 node = display->dev->of_node;
 226                 omapdss_device_put(display);
 227         } else if (output->bridge) {
 228                 struct drm_bridge *bridge = output->bridge;
 229
 230                 while (bridge->next)
 231                         bridge = bridge->next;
 232
 233                 node = bridge->of_node;
 234         } else if (output->panel) {
 235                 node = output->panel->dev->of_node;
 236         }
 237
 238         return node ? of_alias_get_id(node, "display") : -ENODEV;
 239 }
 240
 241 static int omap_modeset_init(struct drm_device *dev)
 242 {
 243         struct omap_drm_private *priv = dev->dev_private;
 244         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
 245         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
 246         unsigned int i;
 247         int ret;
 248         u32 plane_crtc_mask;
 249
 250         if (!omapdss_stack_is_ready())
 251                 return -EPROBE_DEFER;
 252
 253         drm_mode_config_init(dev);
 254
 255         ret = omap_modeset_init_properties(dev);
 256         if (ret < 0)
 257                 return ret;
 258
 259         /*
 260          * This function creates exactly one connector, encoder, crtc,
 261          * and primary plane per each connected dss-device. Each
 262          * connector->encoder->crtc chain is expected to be separate
 263          * and each crtc is connect to a single dss-channel. If the
 264          * configuration does not match the expectations or exceeds
 265          * the available resources, the configuration is rejected.
 266          */
 267         ret = omap_connect_pipelines(dev);
 268         if (ret < 0)
 269                 return ret;
 270
 271         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 272                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 273                         __func__);
 274                 return -EINVAL;
 275         }
 276
 277         /* Create all planes first. They can all be put to any CRTC. */
 278         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 279
 280         for (i = 0; i < num_ovls; i++) {
 281                 enum drm_plane_type type = i < priv->num_pipes
 282                                          ? DRM_PLANE_TYPE_PRIMARY
 283                                          : DRM_PLANE_TYPE_OVERLAY;
 284                 struct drm_plane *plane;
 285
 286                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 287                         return -EINVAL;
 288
 289                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 290                 if (IS_ERR(plane))
 291                         return PTR_ERR(plane);
 292
 293                 priv->planes[priv->num_planes++] = plane;
 294         }
 295
 296         /*
 297          * Create the encoders, attach the bridges and get the pipeline alias
 298          * IDs.
 299          */
 300         for (i = 0; i < priv->num_pipes; i++) {
 301                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 302                 int id;
 303
 304                 pipe->encoder = omap_encoder_init(dev, pipe->output);
 305                 if (!pipe->encoder)
 306                         return -ENOMEM;
 307
 308                 if (pipe->output->bridge) {
 309                         ret = drm_bridge_attach(pipe->encoder,
 310                                                 pipe->output->bridge, NULL);
 311                         if (ret < 0)
 312                                 return ret;
 313                 }
 314
 315                 id = omap_display_id(pipe->output);
 316                 pipe->alias_id = id >= 0 ? id : i;
 317         }
 318
 319         /* Sort the pipelines by DT aliases. */
 320         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 321              omap_compare_pipelines, NULL);
 322
 323         /*
 324          * Populate the pipeline lookup table by DISPC channel. Only one display
 325          * is allowed per channel.
 326          */
 327         for (i = 0; i < priv->num_pipes; ++i) {
 328                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 329                 enum omap_channel channel = pipe->output->dispc_channel;
 330
 331                 if (WARN_ON(priv->channels[channel] != NULL))
 332                         return -EINVAL;
 333
 334                 priv->channels[channel] = pipe;
 335         }
 336
 337         /* Create the connectors and CRTCs. */
 338         for (i = 0; i < priv->num_pipes; i++) {
 339                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 340                 struct drm_encoder *encoder = pipe->encoder;
 341                 struct drm_crtc *crtc;
 342
 343                 if (!pipe->output->bridge) {
 344                         pipe->connector = omap_connector_init(dev, pipe->output,
 345                                                               encoder);
 346                         if (!pipe->connector)
 347                                 return -ENOMEM;
 348
 349                         drm_connector_attach_encoder(pipe->connector, encoder);
 350
 351                         if (pipe->output->panel) {
 352                                 ret = drm_panel_attach(pipe->output->panel,
 353                                                        pipe->connector);
 354                                 if (ret < 0)
 355                                         return ret;
 356                         }
 357                 }
 358
 359                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 360                 if (IS_ERR(crtc))
 361                         return PTR_ERR(crtc);
 362
 363                 encoder->possible_crtcs = 1 << i;
 364                 pipe->crtc = crtc;
 365         }
 366
 367         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 368             priv->num_planes, priv->num_pipes);
 369
 370         dev->mode_config.min_width = 8;
 371         dev->mode_config.min_height = 2;
 372
 373         /*
 374          * Note: these values are used for multiple independent things:
 375          * connector mode filtering, buffer sizes, crtc sizes...
 376          * Use big enough values here to cover all use cases, and do more
 377          * specific checking in the respective code paths.
 378          */
 379         dev->mode_config.max_width = 8192;
 380         dev->mode_config.max_height = 8192;
 381
 382         /* We want the zpos to be normalized */
 383         dev->mode_config.normalize_zpos = true;
 384
 385         dev->mode_config.funcs = &omap_mode_config_funcs;
 386         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 387
 388         drm_mode_config_reset(dev);
 389
 390         omap_drm_irq_install(dev);
 391
 392         return 0;
 393 }
 394
 395 /*
 396  * Enable the HPD in external components if supported
 397  */
 398 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 399 {
 400         struct omap_drm_private *priv = ddev->dev_private;
 401         unsigned int i;
 402
 403         for (i = 0; i < priv->num_pipes; i++) {
 404                 if (priv->pipes[i].connector)
 405                         omap_connector_enable_hpd(priv->pipes[i].connector);
 406         }
 407 }
 408
 409 /*
 410  * Disable the HPD in external components if supported
 411  */
 412 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 413 {
 414         struct omap_drm_private *priv = ddev->dev_private;
 415         unsigned int i;
 416
 417         for (i = 0; i < priv->num_pipes; i++) {
 418                 if (priv->pipes[i].connector)
 419                         omap_connector_disable_hpd(priv->pipes[i].connector);
 420         }
 421 }
 422
 423 /*
 424  * drm ioctl funcs
 425  */
 426
 427
 428 static int ioctl_get_param(struct drm_device *dev, void *data,
 429                 struct drm_file *file_priv)
 430 {
 431         struct omap_drm_private *priv = dev->dev_private;
 432         struct drm_omap_param *args = data;
 433
 434         DBG("%p: param=%llu", dev, args->param);
 435
 436         switch (args->param) {
 437         case OMAP_PARAM_CHIPSET_ID:
 438                 args->value = priv->omaprev;
 439                 break;
 440         default:
 441                 DBG("unknown parameter %lld", args->param);
 442                 return -EINVAL;
 443         }
 444
 445         return 0;
 446 }
 447
 448 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 449
 450 static int ioctl_gem_new(struct drm_device *dev, void *data,
 451                 struct drm_file *file_priv)
 452 {
 453         struct drm_omap_gem_new *args = data;
 454         u32 flags = args->flags & OMAP_BO_USER_MASK;
 455
 456         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 457              args->size.bytes, flags);
 458
 459         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 460                                    &args->handle);
 461 }
 462
 463 static int ioctl_gem_info(struct drm_device *dev, void *data,
 464                 struct drm_file *file_priv)
 465 {
 466         struct drm_omap_gem_info *args = data;
 467         struct drm_gem_object *obj;
 468         int ret = 0;
 469
 470         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 471
 472         obj = drm_gem_object_lookup(file_priv, args->handle);
 473         if (!obj)
 474                 return -ENOENT;
 475
 476         args->size = omap_gem_mmap_size(obj);
 477         args->offset = omap_gem_mmap_offset(obj);
 478
 479         drm_gem_object_put_unlocked(obj);
 480
 481         return ret;
 482 }
 483
 484 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 485         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 486                           DRM_RENDER_ALLOW),
 487         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op,
 488                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 489         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 490                           DRM_RENDER_ALLOW),
 491         /* Deprecated, to be removed. */
 492         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 493                           DRM_RENDER_ALLOW),
 494         /* Deprecated, to be removed. */
 495         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 496                           DRM_RENDER_ALLOW),
 497         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 498                           DRM_RENDER_ALLOW),
 499 };
 500
 501 /*
 502  * drm driver funcs
 503  */
 504
 505 static int dev_open(struct drm_device *dev, struct drm_file *file)
 506 {
 507         file->driver_priv = NULL;
 508
 509         DBG("open: dev=%p, file=%p", dev, file);
 510
 511         return 0;
 512 }
 513
 514 static const struct vm_operations_struct omap_gem_vm_ops = {
 515         .fault = omap_gem_fault,
 516         .open = drm_gem_vm_open,
 517         .close = drm_gem_vm_close,
 518 };
 519
 520 static const struct file_operations omapdriver_fops = {
 521         .owner = THIS_MODULE,
 522         .open = drm_open,
 523         .unlocked_ioctl = drm_ioctl,
 524         .compat_ioctl = drm_compat_ioctl,
 525         .release = drm_release,
 526         .mmap = omap_gem_mmap,
 527         .poll = drm_poll,
 528         .read = drm_read,
 529         .llseek = noop_llseek,
 530 };
 531
 532 static struct drm_driver omap_drm_driver = {
 533         .driver_features = DRIVER_MODESET | DRIVER_GEM  |
 534                 DRIVER_ATOMIC | DRIVER_RENDER,
 535         .open = dev_open,
 536         .lastclose = drm_fb_helper_lastclose,
 537 #ifdef CONFIG_DEBUG_FS
 538         .debugfs_init = omap_debugfs_init,
 539 #endif
 540         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 541         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 542         .gem_prime_export = omap_gem_prime_export,
 543         .gem_prime_import = omap_gem_prime_import,
 544         .gem_free_object_unlocked = omap_gem_free_object,
 545         .gem_vm_ops = &omap_gem_vm_ops,
 546         .dumb_create = omap_gem_dumb_create,
 547         .dumb_map_offset = omap_gem_dumb_map_offset,
 548         .ioctls = ioctls,
 549         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 550         .fops = &omapdriver_fops,
 551         .name = DRIVER_NAME,
 552         .desc = DRIVER_DESC,
 553         .date = DRIVER_DATE,
 554         .major = DRIVER_MAJOR,
 555         .minor = DRIVER_MINOR,
 556         .patchlevel = DRIVER_PATCHLEVEL,
 557 };
 558
 559 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 560         { .family = "OMAP3", .data = (void *)0x3430 },
 561         { .family = "OMAP4", .data = (void *)0x4430 },
 562         { .family = "OMAP5", .data = (void *)0x5430 },
 563         { .family = "DRA7",  .data = (void *)0x0752 },
 564         { /* sentinel */ }
 565 };
 566
 567 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 568 {
 569         const struct soc_device_attribute *soc;
 570         struct drm_device *ddev;
 571         unsigned int i;
 572         int ret;
 573
 574         DBG("%s", dev_name(dev));
 575
 576         /* Allocate and initialize the DRM device. */
 577         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 578         if (IS_ERR(ddev))
 579                 return PTR_ERR(ddev);
 580
 581         priv->ddev = ddev;
 582         ddev->dev_private = priv;
 583
 584         priv->dev = dev;
 585         priv->dss = omapdss_get_dss();
 586         priv->dispc = dispc_get_dispc(priv->dss);
 587         priv->dispc_ops = dispc_get_ops(priv->dss);
 588
 589         omap_crtc_pre_init(priv);
 590
 591         soc = soc_device_match(omapdrm_soc_devices);
 592         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 593         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 594
 595         mutex_init(&priv->list_lock);
 596         INIT_LIST_HEAD(&priv->obj_list);
 597
 598         /* Get memory bandwidth limits */
 599         if (priv->dispc_ops->get_memory_bandwidth_limit)
 600                 priv->max_bandwidth =
 601                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
 602
 603         omap_gem_init(ddev);
 604
 605         ret = omap_modeset_init(ddev);
 606         if (ret) {
 607                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 608                 goto err_gem_deinit;
 609         }
 610
 611         /* Initialize vblank handling, start with all CRTCs disabled. */
 612         ret = drm_vblank_init(ddev, priv->num_pipes);
 613         if (ret) {
 614                 dev_err(priv->dev, "could not init vblank\n");
 615                 goto err_cleanup_modeset;
 616         }
 617
 618         for (i = 0; i < priv->num_pipes; i++)
 619                 drm_crtc_vblank_off(priv->pipes[i].crtc);
 620
 621         omap_fbdev_init(ddev);
 622
 623         drm_kms_helper_poll_init(ddev);
 624         omap_modeset_enable_external_hpd(ddev);
 625
 626         /*
 627          * Register the DRM device with the core and the connectors with
 628          * sysfs.
 629          */
 630         ret = drm_dev_register(ddev, 0);
 631         if (ret)
 632                 goto err_cleanup_helpers;
 633
 634         return 0;
 635
 636 err_cleanup_helpers:
 637         omap_modeset_disable_external_hpd(ddev);
 638         drm_kms_helper_poll_fini(ddev);
 639
 640         omap_fbdev_fini(ddev);
 641 err_cleanup_modeset:
 642         drm_mode_config_cleanup(ddev);
 643         omap_drm_irq_uninstall(ddev);
 644 err_gem_deinit:
 645         omap_gem_deinit(ddev);
 646         destroy_workqueue(priv->wq);
 647         omap_disconnect_pipelines(ddev);
 648         omap_crtc_pre_uninit(priv);
 649         drm_dev_put(ddev);
 650         return ret;
 651 }
 652
 653 static void omapdrm_cleanup(struct omap_drm_private *priv)
 654 {
 655         struct drm_device *ddev = priv->ddev;
 656
 657         DBG("");
 658
 659         drm_dev_unregister(ddev);
 660
 661         omap_modeset_disable_external_hpd(ddev);
 662         drm_kms_helper_poll_fini(ddev);
 663
 664         omap_fbdev_fini(ddev);
 665
 666         drm_atomic_helper_shutdown(ddev);
 667
 668         drm_mode_config_cleanup(ddev);
 669
 670         omap_drm_irq_uninstall(ddev);
 671         omap_gem_deinit(ddev);
 672
 673         destroy_workqueue(priv->wq);
 674
 675         omap_disconnect_pipelines(ddev);
 676         omap_crtc_pre_uninit(priv);
 677
 678         drm_dev_put(ddev);
 679 }
 680
 681 static int pdev_probe(struct platform_device *pdev)
 682 {
 683         struct omap_drm_private *priv;
 684         int ret;
 685
 686         if (omapdss_is_initialized() == false)
 687                 return -EPROBE_DEFER;
 688
 689         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 690         if (ret) {
 691                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 692                 return ret;
 693         }
 694
 695         /* Allocate and initialize the driver private structure. */
 696         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 697         if (!priv)
 698                 return -ENOMEM;
 699
 700         platform_set_drvdata(pdev, priv);
 701
 702         ret = omapdrm_init(priv, &pdev->dev);
 703         if (ret < 0)
 704                 kfree(priv);
 705
 706         return ret;
 707 }
 708
 709 static int pdev_remove(struct platform_device *pdev)
 710 {
 711         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 712
 713         omapdrm_cleanup(priv);
 714         kfree(priv);
 715
 716         return 0;
 717 }
 718
 719 #ifdef CONFIG_PM_SLEEP
 720 static int omap_drm_suspend(struct device *dev)
 721 {
 722         struct omap_drm_private *priv = dev_get_drvdata(dev);
 723         struct drm_device *drm_dev = priv->ddev;
 724
 725         return drm_mode_config_helper_suspend(drm_dev);
 726 }
 727
 728 static int omap_drm_resume(struct device *dev)
 729 {
 730         struct omap_drm_private *priv = dev_get_drvdata(dev);
 731         struct drm_device *drm_dev = priv->ddev;
 732
 733         drm_mode_config_helper_resume(drm_dev);
 734
 735         return omap_gem_resume(drm_dev);
 736 }
 737 #endif
 738
 739 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 740
 741 static struct platform_driver pdev = {
 742         .driver = {
 743                 .name = "omapdrm",
 744                 .pm = &omapdrm_pm_ops,
 745         },
 746         .probe = pdev_probe,
 747         .remove = pdev_remove,
 748 };
 749
 750 static struct platform_driver * const drivers[] = {
 751         &omap_dmm_driver,
 752         &pdev,
 753 };
 754
 755 static int __init omap_drm_init(void)
 756 {
 757         DBG("init");
 758
 759         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 760 }
 761
 762 static void __exit omap_drm_fini(void)
 763 {
 764         DBG("fini");
 765
 766         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 767 }
 768
 769 /* need late_initcall() so we load after dss_driver's are loaded */
 770 late_initcall(omap_drm_init);
 771 module_exit(omap_drm_fini);
 772
 773 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 774 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 775 MODULE_ALIAS("platform:" DRIVER_NAME);
 776 MODULE_LICENSE("GPL v2");