2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 * Author: Rob Clark <rob@ti.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/sort.h>
20 #include <linux/sys_soc.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_probe_helper.h>
27 #include "omap_dmm_tiler.h"
30 #define DRIVER_NAME MODULE_NAME
31 #define DRIVER_DESC "OMAP DRM"
32 #define DRIVER_DATE "20110917"
33 #define DRIVER_MAJOR 1
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
41 /* Notes about mapping DSS and DRM entities:
43 * encoder: manager.. with some extension to allow one primary CRTC
44 * and zero or more video CRTC's to be mapped to one encoder?
45 * connector: dssdev.. manager can be attached/detached from different
49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
50 struct drm_atomic_state *old_state)
52 struct drm_crtc_state *new_crtc_state;
53 struct drm_crtc *crtc;
57 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
58 if (!new_crtc_state->active)
61 ret = omap_crtc_wait_pending(crtc);
65 "atomic complete timeout (pipe %u)!\n", i);
69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
71 struct drm_device *dev = old_state->dev;
72 struct omap_drm_private *priv = dev->dev_private;
74 priv->dispc_ops->runtime_get(priv->dispc);
76 /* Apply the atomic update. */
77 drm_atomic_helper_commit_modeset_disables(dev, old_state);
79 if (priv->omaprev != 0x3430) {
80 /* With the current dss dispc implementation we have to enable
81 * the new modeset before we can commit planes. The dispc ovl
82 * configuration relies on the video mode configuration been
83 * written into the HW when the ovl configuration is
86 * This approach is not ideal because after a mode change the
87 * plane update is executed only after the first vblank
88 * interrupt. The dispc implementation should be fixed so that
89 * it is able use uncommitted drm state information.
91 drm_atomic_helper_commit_modeset_enables(dev, old_state);
92 omap_atomic_wait_for_completion(dev, old_state);
94 drm_atomic_helper_commit_planes(dev, old_state, 0);
96 drm_atomic_helper_commit_hw_done(old_state);
99 * OMAP3 DSS seems to have issues with the work-around above,
100 * resulting in endless sync losts if a crtc is enabled without
101 * a plane. For now, skip the WA for OMAP3.
103 drm_atomic_helper_commit_planes(dev, old_state, 0);
105 drm_atomic_helper_commit_modeset_enables(dev, old_state);
107 drm_atomic_helper_commit_hw_done(old_state);
111 * Wait for completion of the page flips to ensure that old buffers
112 * can't be touched by the hardware anymore before cleaning up planes.
114 omap_atomic_wait_for_completion(dev, old_state);
116 drm_atomic_helper_cleanup_planes(dev, old_state);
118 priv->dispc_ops->runtime_put(priv->dispc);
121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
122 .atomic_commit_tail = omap_atomic_commit_tail,
125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
126 .fb_create = omap_framebuffer_create,
127 .output_poll_changed = drm_fb_helper_output_poll_changed,
128 .atomic_check = drm_atomic_helper_check,
129 .atomic_commit = drm_atomic_helper_commit,
132 static void omap_disconnect_pipelines(struct drm_device *ddev)
134 struct omap_drm_private *priv = ddev->dev_private;
137 for (i = 0; i < priv->num_pipes; i++) {
138 struct omap_drm_pipeline *pipe = &priv->pipes[i];
140 omapdss_device_disconnect(NULL, pipe->output);
142 omapdss_device_put(pipe->output);
143 omapdss_device_put(pipe->display);
145 pipe->display = NULL;
148 memset(&priv->channels, 0, sizeof(priv->channels));
153 static int omap_connect_pipelines(struct drm_device *ddev)
155 struct omap_drm_private *priv = ddev->dev_private;
156 struct omap_dss_device *output = NULL;
159 for_each_dss_output(output) {
160 r = omapdss_device_connect(priv->dss, NULL, output);
161 if (r == -EPROBE_DEFER) {
162 omapdss_device_put(output);
165 dev_warn(output->dev, "could not connect output %s\n",
168 struct omap_drm_pipeline *pipe;
170 pipe = &priv->pipes[priv->num_pipes++];
171 pipe->output = omapdss_device_get(output);
172 pipe->display = omapdss_display_get(output);
174 if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
175 /* To balance the 'for_each_dss_output' loop */
176 omapdss_device_put(output);
185 static int omap_compare_pipelines(const void *a, const void *b)
187 const struct omap_drm_pipeline *pipe1 = a;
188 const struct omap_drm_pipeline *pipe2 = b;
190 if (pipe1->alias_id > pipe2->alias_id)
192 else if (pipe1->alias_id < pipe2->alias_id)
197 static int omap_modeset_init_properties(struct drm_device *dev)
199 struct omap_drm_private *priv = dev->dev_private;
200 unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
202 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
204 if (!priv->zorder_prop)
210 static int omap_modeset_init(struct drm_device *dev)
212 struct omap_drm_private *priv = dev->dev_private;
213 int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
214 int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
219 if (!omapdss_stack_is_ready())
220 return -EPROBE_DEFER;
222 drm_mode_config_init(dev);
224 ret = omap_modeset_init_properties(dev);
229 * This function creates exactly one connector, encoder, crtc,
230 * and primary plane per each connected dss-device. Each
231 * connector->encoder->crtc chain is expected to be separate
232 * and each crtc is connect to a single dss-channel. If the
233 * configuration does not match the expectations or exceeds
234 * the available resources, the configuration is rejected.
236 ret = omap_connect_pipelines(dev);
240 if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
241 dev_err(dev->dev, "%s(): Too many connected displays\n",
246 /* Create all planes first. They can all be put to any CRTC. */
247 plane_crtc_mask = (1 << priv->num_pipes) - 1;
249 for (i = 0; i < num_ovls; i++) {
250 enum drm_plane_type type = i < priv->num_pipes
251 ? DRM_PLANE_TYPE_PRIMARY
252 : DRM_PLANE_TYPE_OVERLAY;
253 struct drm_plane *plane;
255 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
258 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
260 return PTR_ERR(plane);
262 priv->planes[priv->num_planes++] = plane;
265 /* Create the encoders and get the pipelines aliases. */
266 for (i = 0; i < priv->num_pipes; i++) {
267 struct omap_drm_pipeline *pipe = &priv->pipes[i];
270 pipe->encoder = omap_encoder_init(dev, pipe->output);
274 id = of_alias_get_id(pipe->display->dev->of_node, "display");
275 pipe->alias_id = id >= 0 ? id : i;
278 /* Sort the pipelines by DT aliases. */
279 sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
280 omap_compare_pipelines, NULL);
283 * Populate the pipeline lookup table by DISPC channel. Only one display
284 * is allowed per channel.
286 for (i = 0; i < priv->num_pipes; ++i) {
287 struct omap_drm_pipeline *pipe = &priv->pipes[i];
288 enum omap_channel channel = pipe->output->dispc_channel;
290 if (WARN_ON(priv->channels[channel] != NULL))
293 priv->channels[channel] = pipe;
296 /* Create the connectors and CRTCs. */
297 for (i = 0; i < priv->num_pipes; i++) {
298 struct omap_drm_pipeline *pipe = &priv->pipes[i];
299 struct drm_encoder *encoder = pipe->encoder;
300 struct drm_connector *connector;
301 struct drm_crtc *crtc;
303 connector = omap_connector_init(dev, pipe->output,
304 pipe->display, encoder);
308 drm_connector_attach_encoder(connector, encoder);
309 pipe->connector = connector;
311 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
313 return PTR_ERR(crtc);
315 encoder->possible_crtcs = 1 << i;
319 DBG("registered %u planes, %u crtcs/encoders/connectors\n",
320 priv->num_planes, priv->num_pipes);
322 dev->mode_config.min_width = 8;
323 dev->mode_config.min_height = 2;
326 * Note: these values are used for multiple independent things:
327 * connector mode filtering, buffer sizes, crtc sizes...
328 * Use big enough values here to cover all use cases, and do more
329 * specific checking in the respective code paths.
331 dev->mode_config.max_width = 8192;
332 dev->mode_config.max_height = 8192;
334 /* We want the zpos to be normalized */
335 dev->mode_config.normalize_zpos = true;
337 dev->mode_config.funcs = &omap_mode_config_funcs;
338 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
340 drm_mode_config_reset(dev);
342 omap_drm_irq_install(dev);
348 * Enable the HPD in external components if supported
350 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
352 struct omap_drm_private *priv = ddev->dev_private;
355 for (i = 0; i < priv->num_pipes; i++)
356 omap_connector_enable_hpd(priv->pipes[i].connector);
360 * Disable the HPD in external components if supported
362 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
364 struct omap_drm_private *priv = ddev->dev_private;
367 for (i = 0; i < priv->num_pipes; i++)
368 omap_connector_disable_hpd(priv->pipes[i].connector);
376 static int ioctl_get_param(struct drm_device *dev, void *data,
377 struct drm_file *file_priv)
379 struct omap_drm_private *priv = dev->dev_private;
380 struct drm_omap_param *args = data;
382 DBG("%p: param=%llu", dev, args->param);
384 switch (args->param) {
385 case OMAP_PARAM_CHIPSET_ID:
386 args->value = priv->omaprev;
389 DBG("unknown parameter %lld", args->param);
396 static int ioctl_set_param(struct drm_device *dev, void *data,
397 struct drm_file *file_priv)
399 struct drm_omap_param *args = data;
401 switch (args->param) {
403 DBG("unknown parameter %lld", args->param);
410 #define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
412 static int ioctl_gem_new(struct drm_device *dev, void *data,
413 struct drm_file *file_priv)
415 struct drm_omap_gem_new *args = data;
416 u32 flags = args->flags & OMAP_BO_USER_MASK;
418 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
419 args->size.bytes, flags);
421 return omap_gem_new_handle(dev, file_priv, args->size, flags,
425 static int ioctl_gem_info(struct drm_device *dev, void *data,
426 struct drm_file *file_priv)
428 struct drm_omap_gem_info *args = data;
429 struct drm_gem_object *obj;
432 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
434 obj = drm_gem_object_lookup(file_priv, args->handle);
438 args->size = omap_gem_mmap_size(obj);
439 args->offset = omap_gem_mmap_offset(obj);
441 drm_gem_object_put_unlocked(obj);
446 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
447 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
448 DRM_AUTH | DRM_RENDER_ALLOW),
449 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
450 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
451 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
452 DRM_AUTH | DRM_RENDER_ALLOW),
453 /* Deprecated, to be removed. */
454 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
455 DRM_AUTH | DRM_RENDER_ALLOW),
456 /* Deprecated, to be removed. */
457 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
458 DRM_AUTH | DRM_RENDER_ALLOW),
459 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
460 DRM_AUTH | DRM_RENDER_ALLOW),
467 static int dev_open(struct drm_device *dev, struct drm_file *file)
469 file->driver_priv = NULL;
471 DBG("open: dev=%p, file=%p", dev, file);
476 static const struct vm_operations_struct omap_gem_vm_ops = {
477 .fault = omap_gem_fault,
478 .open = drm_gem_vm_open,
479 .close = drm_gem_vm_close,
482 static const struct file_operations omapdriver_fops = {
483 .owner = THIS_MODULE,
485 .unlocked_ioctl = drm_ioctl,
486 .compat_ioctl = drm_compat_ioctl,
487 .release = drm_release,
488 .mmap = omap_gem_mmap,
491 .llseek = noop_llseek,
494 static struct drm_driver omap_drm_driver = {
495 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
496 DRIVER_ATOMIC | DRIVER_RENDER,
498 .lastclose = drm_fb_helper_lastclose,
499 #ifdef CONFIG_DEBUG_FS
500 .debugfs_init = omap_debugfs_init,
502 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
503 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
504 .gem_prime_export = omap_gem_prime_export,
505 .gem_prime_import = omap_gem_prime_import,
506 .gem_free_object_unlocked = omap_gem_free_object,
507 .gem_vm_ops = &omap_gem_vm_ops,
508 .dumb_create = omap_gem_dumb_create,
509 .dumb_map_offset = omap_gem_dumb_map_offset,
511 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
512 .fops = &omapdriver_fops,
516 .major = DRIVER_MAJOR,
517 .minor = DRIVER_MINOR,
518 .patchlevel = DRIVER_PATCHLEVEL,
521 static const struct soc_device_attribute omapdrm_soc_devices[] = {
522 { .family = "OMAP3", .data = (void *)0x3430 },
523 { .family = "OMAP4", .data = (void *)0x4430 },
524 { .family = "OMAP5", .data = (void *)0x5430 },
525 { .family = "DRA7", .data = (void *)0x0752 },
529 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
531 const struct soc_device_attribute *soc;
532 struct drm_device *ddev;
536 DBG("%s", dev_name(dev));
538 /* Allocate and initialize the DRM device. */
539 ddev = drm_dev_alloc(&omap_drm_driver, dev);
541 return PTR_ERR(ddev);
544 ddev->dev_private = priv;
547 priv->dss = omapdss_get_dss();
548 priv->dispc = dispc_get_dispc(priv->dss);
549 priv->dispc_ops = dispc_get_ops(priv->dss);
551 omap_crtc_pre_init(priv);
553 soc = soc_device_match(omapdrm_soc_devices);
554 priv->omaprev = soc ? (unsigned int)soc->data : 0;
555 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
557 mutex_init(&priv->list_lock);
558 INIT_LIST_HEAD(&priv->obj_list);
560 /* Get memory bandwidth limits */
561 if (priv->dispc_ops->get_memory_bandwidth_limit)
562 priv->max_bandwidth =
563 priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
567 ret = omap_modeset_init(ddev);
569 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
573 /* Initialize vblank handling, start with all CRTCs disabled. */
574 ret = drm_vblank_init(ddev, priv->num_pipes);
576 dev_err(priv->dev, "could not init vblank\n");
577 goto err_cleanup_modeset;
580 for (i = 0; i < priv->num_pipes; i++)
581 drm_crtc_vblank_off(priv->pipes[i].crtc);
583 omap_fbdev_init(ddev);
585 drm_kms_helper_poll_init(ddev);
586 omap_modeset_enable_external_hpd(ddev);
589 * Register the DRM device with the core and the connectors with
592 ret = drm_dev_register(ddev, 0);
594 goto err_cleanup_helpers;
599 omap_modeset_disable_external_hpd(ddev);
600 drm_kms_helper_poll_fini(ddev);
602 omap_fbdev_fini(ddev);
604 drm_mode_config_cleanup(ddev);
605 omap_drm_irq_uninstall(ddev);
607 omap_gem_deinit(ddev);
608 destroy_workqueue(priv->wq);
609 omap_disconnect_pipelines(ddev);
610 omap_crtc_pre_uninit(priv);
615 static void omapdrm_cleanup(struct omap_drm_private *priv)
617 struct drm_device *ddev = priv->ddev;
621 drm_dev_unregister(ddev);
623 omap_modeset_disable_external_hpd(ddev);
624 drm_kms_helper_poll_fini(ddev);
626 omap_fbdev_fini(ddev);
628 drm_atomic_helper_shutdown(ddev);
630 drm_mode_config_cleanup(ddev);
632 omap_drm_irq_uninstall(ddev);
633 omap_gem_deinit(ddev);
635 destroy_workqueue(priv->wq);
637 omap_disconnect_pipelines(ddev);
638 omap_crtc_pre_uninit(priv);
643 static int pdev_probe(struct platform_device *pdev)
645 struct omap_drm_private *priv;
648 if (omapdss_is_initialized() == false)
649 return -EPROBE_DEFER;
651 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
653 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
657 /* Allocate and initialize the driver private structure. */
658 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
662 platform_set_drvdata(pdev, priv);
664 ret = omapdrm_init(priv, &pdev->dev);
671 static int pdev_remove(struct platform_device *pdev)
673 struct omap_drm_private *priv = platform_get_drvdata(pdev);
675 omapdrm_cleanup(priv);
681 #ifdef CONFIG_PM_SLEEP
682 static int omap_drm_suspend(struct device *dev)
684 struct omap_drm_private *priv = dev_get_drvdata(dev);
685 struct drm_device *drm_dev = priv->ddev;
687 return drm_mode_config_helper_suspend(drm_dev);
690 static int omap_drm_resume(struct device *dev)
692 struct omap_drm_private *priv = dev_get_drvdata(dev);
693 struct drm_device *drm_dev = priv->ddev;
695 drm_mode_config_helper_resume(drm_dev);
697 return omap_gem_resume(drm_dev);
701 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
703 static struct platform_driver pdev = {
706 .pm = &omapdrm_pm_ops,
709 .remove = pdev_remove,
712 static struct platform_driver * const drivers[] = {
717 static int __init omap_drm_init(void)
721 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
724 static void __exit omap_drm_fini(void)
728 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
731 /* need late_initcall() so we load after dss_driver's are loaded */
732 late_initcall(omap_drm_init);
733 module_exit(omap_drm_fini);
735 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
736 MODULE_DESCRIPTION("OMAP DRM Display Driver");
737 MODULE_ALIAS("platform:" DRIVER_NAME);
738 MODULE_LICENSE("GPL v2");