drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Rob Clark <rob@ti.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/of.h>
  19 #include <linux/sort.h>
  20 #include <linux/sys_soc.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_probe_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 /*
  38  * mode config funcs
  39  */
  40
  41 /* Notes about mapping DSS and DRM entities:
  42  *    CRTC:        overlay
  43  *    encoder:     manager.. with some extension to allow one primary CRTC
  44  *                 and zero or more video CRTC's to be mapped to one encoder?
  45  *    connector:   dssdev.. manager can be attached/detached from different
  46  *                 devices
  47  */
  48
  49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  50                                             struct drm_atomic_state *old_state)
  51 {
  52         struct drm_crtc_state *new_crtc_state;
  53         struct drm_crtc *crtc;
  54         unsigned int i;
  55         int ret;
  56
  57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  58                 if (!new_crtc_state->active)
  59                         continue;
  60
  61                 ret = omap_crtc_wait_pending(crtc);
  62
  63                 if (!ret)
  64                         dev_warn(dev->dev,
  65                                  "atomic complete timeout (pipe %u)!\n", i);
  66         }
  67 }
  68
  69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  70 {
  71         struct drm_device *dev = old_state->dev;
  72         struct omap_drm_private *priv = dev->dev_private;
  73
  74         priv->dispc_ops->runtime_get(priv->dispc);
  75
  76         /* Apply the atomic update. */
  77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  78
  79         if (priv->omaprev != 0x3430) {
  80                 /* With the current dss dispc implementation we have to enable
  81                  * the new modeset before we can commit planes. The dispc ovl
  82                  * configuration relies on the video mode configuration been
  83                  * written into the HW when the ovl configuration is
  84                  * calculated.
  85                  *
  86                  * This approach is not ideal because after a mode change the
  87                  * plane update is executed only after the first vblank
  88                  * interrupt. The dispc implementation should be fixed so that
  89                  * it is able use uncommitted drm state information.
  90                  */
  91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  92                 omap_atomic_wait_for_completion(dev, old_state);
  93
  94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  95
  96                 drm_atomic_helper_commit_hw_done(old_state);
  97         } else {
  98                 /*
  99                  * OMAP3 DSS seems to have issues with the work-around above,
 100                  * resulting in endless sync losts if a crtc is enabled without
 101                  * a plane. For now, skip the WA for OMAP3.
 102                  */
 103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 104
 105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 106
 107                 drm_atomic_helper_commit_hw_done(old_state);
 108         }
 109
 110         /*
 111          * Wait for completion of the page flips to ensure that old buffers
 112          * can't be touched by the hardware anymore before cleaning up planes.
 113          */
 114         omap_atomic_wait_for_completion(dev, old_state);
 115
 116         drm_atomic_helper_cleanup_planes(dev, old_state);
 117
 118         priv->dispc_ops->runtime_put(priv->dispc);
 119 }
 120
 121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 122         .atomic_commit_tail = omap_atomic_commit_tail,
 123 };
 124
 125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 126         .fb_create = omap_framebuffer_create,
 127         .output_poll_changed = drm_fb_helper_output_poll_changed,
 128         .atomic_check = drm_atomic_helper_check,
 129         .atomic_commit = drm_atomic_helper_commit,
 130 };
 131
 132 static void omap_disconnect_pipelines(struct drm_device *ddev)
 133 {
 134         struct omap_drm_private *priv = ddev->dev_private;
 135         unsigned int i;
 136
 137         for (i = 0; i < priv->num_pipes; i++) {
 138                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 139
 140                 omapdss_device_disconnect(NULL, pipe->output);
 141
 142                 omapdss_device_put(pipe->output);
 143                 pipe->output = NULL;
 144         }
 145
 146         memset(&priv->channels, 0, sizeof(priv->channels));
 147
 148         priv->num_pipes = 0;
 149 }
 150
 151 static int omap_connect_pipelines(struct drm_device *ddev)
 152 {
 153         struct omap_drm_private *priv = ddev->dev_private;
 154         struct omap_dss_device *output = NULL;
 155         int r;
 156
 157         for_each_dss_output(output) {
 158                 r = omapdss_device_connect(priv->dss, NULL, output);
 159                 if (r == -EPROBE_DEFER) {
 160                         omapdss_device_put(output);
 161                         return r;
 162                 } else if (r) {
 163                         dev_warn(output->dev, "could not connect output %s\n",
 164                                  output->name);
 165                 } else {
 166                         struct omap_drm_pipeline *pipe;
 167
 168                         pipe = &priv->pipes[priv->num_pipes++];
 169                         pipe->output = omapdss_device_get(output);
 170
 171                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 172                                 /* To balance the 'for_each_dss_output' loop */
 173                                 omapdss_device_put(output);
 174                                 break;
 175                         }
 176                 }
 177         }
 178
 179         return 0;
 180 }
 181
 182 static int omap_compare_pipelines(const void *a, const void *b)
 183 {
 184         const struct omap_drm_pipeline *pipe1 = a;
 185         const struct omap_drm_pipeline *pipe2 = b;
 186
 187         if (pipe1->alias_id > pipe2->alias_id)
 188                 return 1;
 189         else if (pipe1->alias_id < pipe2->alias_id)
 190                 return -1;
 191         return 0;
 192 }
 193
 194 static int omap_modeset_init_properties(struct drm_device *dev)
 195 {
 196         struct omap_drm_private *priv = dev->dev_private;
 197         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
 198
 199         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 200                                                       num_planes - 1);
 201         if (!priv->zorder_prop)
 202                 return -ENOMEM;
 203
 204         return 0;
 205 }
 206
 207 static int omap_display_id(struct omap_dss_device *output)
 208 {
 209         struct device_node *node = NULL;
 210
 211         if (output->next) {
 212                 struct omap_dss_device *display;
 213
 214                 display = omapdss_display_get(output);
 215                 node = display->dev->of_node;
 216                 omapdss_device_put(display);
 217         } else {
 218                 struct drm_bridge *bridge = output->bridge;
 219
 220                 while (bridge->next)
 221                         bridge = bridge->next;
 222
 223                 node = bridge->of_node;
 224         }
 225
 226         return node ? of_alias_get_id(node, "display") : -ENODEV;
 227 }
 228
 229 static int omap_modeset_init(struct drm_device *dev)
 230 {
 231         struct omap_drm_private *priv = dev->dev_private;
 232         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
 233         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
 234         unsigned int i;
 235         int ret;
 236         u32 plane_crtc_mask;
 237
 238         if (!omapdss_stack_is_ready())
 239                 return -EPROBE_DEFER;
 240
 241         drm_mode_config_init(dev);
 242
 243         ret = omap_modeset_init_properties(dev);
 244         if (ret < 0)
 245                 return ret;
 246
 247         /*
 248          * This function creates exactly one connector, encoder, crtc,
 249          * and primary plane per each connected dss-device. Each
 250          * connector->encoder->crtc chain is expected to be separate
 251          * and each crtc is connect to a single dss-channel. If the
 252          * configuration does not match the expectations or exceeds
 253          * the available resources, the configuration is rejected.
 254          */
 255         ret = omap_connect_pipelines(dev);
 256         if (ret < 0)
 257                 return ret;
 258
 259         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 260                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 261                         __func__);
 262                 return -EINVAL;
 263         }
 264
 265         /* Create all planes first. They can all be put to any CRTC. */
 266         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 267
 268         for (i = 0; i < num_ovls; i++) {
 269                 enum drm_plane_type type = i < priv->num_pipes
 270                                          ? DRM_PLANE_TYPE_PRIMARY
 271                                          : DRM_PLANE_TYPE_OVERLAY;
 272                 struct drm_plane *plane;
 273
 274                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 275                         return -EINVAL;
 276
 277                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 278                 if (IS_ERR(plane))
 279                         return PTR_ERR(plane);
 280
 281                 priv->planes[priv->num_planes++] = plane;
 282         }
 283
 284         /*
 285          * Create the encoders, attach the bridges and get the pipeline alias
 286          * IDs.
 287          */
 288         for (i = 0; i < priv->num_pipes; i++) {
 289                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 290                 int id;
 291
 292                 pipe->encoder = omap_encoder_init(dev, pipe->output);
 293                 if (!pipe->encoder)
 294                         return -ENOMEM;
 295
 296                 if (pipe->output->bridge) {
 297                         ret = drm_bridge_attach(pipe->encoder,
 298                                                 pipe->output->bridge, NULL);
 299                         if (ret < 0)
 300                                 return ret;
 301                 }
 302
 303                 id = omap_display_id(pipe->output);
 304                 pipe->alias_id = id >= 0 ? id : i;
 305         }
 306
 307         /* Sort the pipelines by DT aliases. */
 308         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 309              omap_compare_pipelines, NULL);
 310
 311         /*
 312          * Populate the pipeline lookup table by DISPC channel. Only one display
 313          * is allowed per channel.
 314          */
 315         for (i = 0; i < priv->num_pipes; ++i) {
 316                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 317                 enum omap_channel channel = pipe->output->dispc_channel;
 318
 319                 if (WARN_ON(priv->channels[channel] != NULL))
 320                         return -EINVAL;
 321
 322                 priv->channels[channel] = pipe;
 323         }
 324
 325         /* Create the connectors and CRTCs. */
 326         for (i = 0; i < priv->num_pipes; i++) {
 327                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 328                 struct drm_encoder *encoder = pipe->encoder;
 329                 struct drm_crtc *crtc;
 330
 331                 if (!pipe->output->bridge) {
 332                         pipe->connector = omap_connector_init(dev, pipe->output,
 333                                                               encoder);
 334                         if (!pipe->connector)
 335                                 return -ENOMEM;
 336
 337                         drm_connector_attach_encoder(pipe->connector, encoder);
 338                 }
 339
 340                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 341                 if (IS_ERR(crtc))
 342                         return PTR_ERR(crtc);
 343
 344                 encoder->possible_crtcs = 1 << i;
 345                 pipe->crtc = crtc;
 346         }
 347
 348         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 349             priv->num_planes, priv->num_pipes);
 350
 351         dev->mode_config.min_width = 8;
 352         dev->mode_config.min_height = 2;
 353
 354         /*
 355          * Note: these values are used for multiple independent things:
 356          * connector mode filtering, buffer sizes, crtc sizes...
 357          * Use big enough values here to cover all use cases, and do more
 358          * specific checking in the respective code paths.
 359          */
 360         dev->mode_config.max_width = 8192;
 361         dev->mode_config.max_height = 8192;
 362
 363         /* We want the zpos to be normalized */
 364         dev->mode_config.normalize_zpos = true;
 365
 366         dev->mode_config.funcs = &omap_mode_config_funcs;
 367         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 368
 369         drm_mode_config_reset(dev);
 370
 371         omap_drm_irq_install(dev);
 372
 373         return 0;
 374 }
 375
 376 /*
 377  * Enable the HPD in external components if supported
 378  */
 379 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 380 {
 381         struct omap_drm_private *priv = ddev->dev_private;
 382         unsigned int i;
 383
 384         for (i = 0; i < priv->num_pipes; i++) {
 385                 if (priv->pipes[i].connector)
 386                         omap_connector_enable_hpd(priv->pipes[i].connector);
 387         }
 388 }
 389
 390 /*
 391  * Disable the HPD in external components if supported
 392  */
 393 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 394 {
 395         struct omap_drm_private *priv = ddev->dev_private;
 396         unsigned int i;
 397
 398         for (i = 0; i < priv->num_pipes; i++) {
 399                 if (priv->pipes[i].connector)
 400                         omap_connector_disable_hpd(priv->pipes[i].connector);
 401         }
 402 }
 403
 404 /*
 405  * drm ioctl funcs
 406  */
 407
 408
 409 static int ioctl_get_param(struct drm_device *dev, void *data,
 410                 struct drm_file *file_priv)
 411 {
 412         struct omap_drm_private *priv = dev->dev_private;
 413         struct drm_omap_param *args = data;
 414
 415         DBG("%p: param=%llu", dev, args->param);
 416
 417         switch (args->param) {
 418         case OMAP_PARAM_CHIPSET_ID:
 419                 args->value = priv->omaprev;
 420                 break;
 421         default:
 422                 DBG("unknown parameter %lld", args->param);
 423                 return -EINVAL;
 424         }
 425
 426         return 0;
 427 }
 428
 429 static int ioctl_set_param(struct drm_device *dev, void *data,
 430                 struct drm_file *file_priv)
 431 {
 432         struct drm_omap_param *args = data;
 433
 434         switch (args->param) {
 435         default:
 436                 DBG("unknown parameter %lld", args->param);
 437                 return -EINVAL;
 438         }
 439
 440         return 0;
 441 }
 442
 443 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 444
 445 static int ioctl_gem_new(struct drm_device *dev, void *data,
 446                 struct drm_file *file_priv)
 447 {
 448         struct drm_omap_gem_new *args = data;
 449         u32 flags = args->flags & OMAP_BO_USER_MASK;
 450
 451         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 452              args->size.bytes, flags);
 453
 454         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 455                                    &args->handle);
 456 }
 457
 458 static int ioctl_gem_info(struct drm_device *dev, void *data,
 459                 struct drm_file *file_priv)
 460 {
 461         struct drm_omap_gem_info *args = data;
 462         struct drm_gem_object *obj;
 463         int ret = 0;
 464
 465         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 466
 467         obj = drm_gem_object_lookup(file_priv, args->handle);
 468         if (!obj)
 469                 return -ENOENT;
 470
 471         args->size = omap_gem_mmap_size(obj);
 472         args->offset = omap_gem_mmap_offset(obj);
 473
 474         drm_gem_object_put_unlocked(obj);
 475
 476         return ret;
 477 }
 478
 479 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 480         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 481                           DRM_AUTH | DRM_RENDER_ALLOW),
 482         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
 483                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 484         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 485                           DRM_AUTH | DRM_RENDER_ALLOW),
 486         /* Deprecated, to be removed. */
 487         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 488                           DRM_AUTH | DRM_RENDER_ALLOW),
 489         /* Deprecated, to be removed. */
 490         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 491                           DRM_AUTH | DRM_RENDER_ALLOW),
 492         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 493                           DRM_AUTH | DRM_RENDER_ALLOW),
 494 };
 495
 496 /*
 497  * drm driver funcs
 498  */
 499
 500 static int dev_open(struct drm_device *dev, struct drm_file *file)
 501 {
 502         file->driver_priv = NULL;
 503
 504         DBG("open: dev=%p, file=%p", dev, file);
 505
 506         return 0;
 507 }
 508
 509 static const struct vm_operations_struct omap_gem_vm_ops = {
 510         .fault = omap_gem_fault,
 511         .open = drm_gem_vm_open,
 512         .close = drm_gem_vm_close,
 513 };
 514
 515 static const struct file_operations omapdriver_fops = {
 516         .owner = THIS_MODULE,
 517         .open = drm_open,
 518         .unlocked_ioctl = drm_ioctl,
 519         .compat_ioctl = drm_compat_ioctl,
 520         .release = drm_release,
 521         .mmap = omap_gem_mmap,
 522         .poll = drm_poll,
 523         .read = drm_read,
 524         .llseek = noop_llseek,
 525 };
 526
 527 static struct drm_driver omap_drm_driver = {
 528         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 529                 DRIVER_ATOMIC | DRIVER_RENDER,
 530         .open = dev_open,
 531         .lastclose = drm_fb_helper_lastclose,
 532 #ifdef CONFIG_DEBUG_FS
 533         .debugfs_init = omap_debugfs_init,
 534 #endif
 535         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 536         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 537         .gem_prime_export = omap_gem_prime_export,
 538         .gem_prime_import = omap_gem_prime_import,
 539         .gem_free_object_unlocked = omap_gem_free_object,
 540         .gem_vm_ops = &omap_gem_vm_ops,
 541         .dumb_create = omap_gem_dumb_create,
 542         .dumb_map_offset = omap_gem_dumb_map_offset,
 543         .ioctls = ioctls,
 544         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 545         .fops = &omapdriver_fops,
 546         .name = DRIVER_NAME,
 547         .desc = DRIVER_DESC,
 548         .date = DRIVER_DATE,
 549         .major = DRIVER_MAJOR,
 550         .minor = DRIVER_MINOR,
 551         .patchlevel = DRIVER_PATCHLEVEL,
 552 };
 553
 554 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 555         { .family = "OMAP3", .data = (void *)0x3430 },
 556         { .family = "OMAP4", .data = (void *)0x4430 },
 557         { .family = "OMAP5", .data = (void *)0x5430 },
 558         { .family = "DRA7",  .data = (void *)0x0752 },
 559         { /* sentinel */ }
 560 };
 561
 562 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 563 {
 564         const struct soc_device_attribute *soc;
 565         struct drm_device *ddev;
 566         unsigned int i;
 567         int ret;
 568
 569         DBG("%s", dev_name(dev));
 570
 571         /* Allocate and initialize the DRM device. */
 572         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 573         if (IS_ERR(ddev))
 574                 return PTR_ERR(ddev);
 575
 576         priv->ddev = ddev;
 577         ddev->dev_private = priv;
 578
 579         priv->dev = dev;
 580         priv->dss = omapdss_get_dss();
 581         priv->dispc = dispc_get_dispc(priv->dss);
 582         priv->dispc_ops = dispc_get_ops(priv->dss);
 583
 584         omap_crtc_pre_init(priv);
 585
 586         soc = soc_device_match(omapdrm_soc_devices);
 587         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 588         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 589
 590         mutex_init(&priv->list_lock);
 591         INIT_LIST_HEAD(&priv->obj_list);
 592
 593         /* Get memory bandwidth limits */
 594         if (priv->dispc_ops->get_memory_bandwidth_limit)
 595                 priv->max_bandwidth =
 596                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
 597
 598         omap_gem_init(ddev);
 599
 600         ret = omap_modeset_init(ddev);
 601         if (ret) {
 602                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 603                 goto err_gem_deinit;
 604         }
 605
 606         /* Initialize vblank handling, start with all CRTCs disabled. */
 607         ret = drm_vblank_init(ddev, priv->num_pipes);
 608         if (ret) {
 609                 dev_err(priv->dev, "could not init vblank\n");
 610                 goto err_cleanup_modeset;
 611         }
 612
 613         for (i = 0; i < priv->num_pipes; i++)
 614                 drm_crtc_vblank_off(priv->pipes[i].crtc);
 615
 616         omap_fbdev_init(ddev);
 617
 618         drm_kms_helper_poll_init(ddev);
 619         omap_modeset_enable_external_hpd(ddev);
 620
 621         /*
 622          * Register the DRM device with the core and the connectors with
 623          * sysfs.
 624          */
 625         ret = drm_dev_register(ddev, 0);
 626         if (ret)
 627                 goto err_cleanup_helpers;
 628
 629         return 0;
 630
 631 err_cleanup_helpers:
 632         omap_modeset_disable_external_hpd(ddev);
 633         drm_kms_helper_poll_fini(ddev);
 634
 635         omap_fbdev_fini(ddev);
 636 err_cleanup_modeset:
 637         drm_mode_config_cleanup(ddev);
 638         omap_drm_irq_uninstall(ddev);
 639 err_gem_deinit:
 640         omap_gem_deinit(ddev);
 641         destroy_workqueue(priv->wq);
 642         omap_disconnect_pipelines(ddev);
 643         omap_crtc_pre_uninit(priv);
 644         drm_dev_put(ddev);
 645         return ret;
 646 }
 647
 648 static void omapdrm_cleanup(struct omap_drm_private *priv)
 649 {
 650         struct drm_device *ddev = priv->ddev;
 651
 652         DBG("");
 653
 654         drm_dev_unregister(ddev);
 655
 656         omap_modeset_disable_external_hpd(ddev);
 657         drm_kms_helper_poll_fini(ddev);
 658
 659         omap_fbdev_fini(ddev);
 660
 661         drm_atomic_helper_shutdown(ddev);
 662
 663         drm_mode_config_cleanup(ddev);
 664
 665         omap_drm_irq_uninstall(ddev);
 666         omap_gem_deinit(ddev);
 667
 668         destroy_workqueue(priv->wq);
 669
 670         omap_disconnect_pipelines(ddev);
 671         omap_crtc_pre_uninit(priv);
 672
 673         drm_dev_put(ddev);
 674 }
 675
 676 static int pdev_probe(struct platform_device *pdev)
 677 {
 678         struct omap_drm_private *priv;
 679         int ret;
 680
 681         if (omapdss_is_initialized() == false)
 682                 return -EPROBE_DEFER;
 683
 684         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
 685         if (ret) {
 686                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 687                 return ret;
 688         }
 689
 690         /* Allocate and initialize the driver private structure. */
 691         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 692         if (!priv)
 693                 return -ENOMEM;
 694
 695         platform_set_drvdata(pdev, priv);
 696
 697         ret = omapdrm_init(priv, &pdev->dev);
 698         if (ret < 0)
 699                 kfree(priv);
 700
 701         return ret;
 702 }
 703
 704 static int pdev_remove(struct platform_device *pdev)
 705 {
 706         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 707
 708         omapdrm_cleanup(priv);
 709         kfree(priv);
 710
 711         return 0;
 712 }
 713
 714 #ifdef CONFIG_PM_SLEEP
 715 static int omap_drm_suspend(struct device *dev)
 716 {
 717         struct omap_drm_private *priv = dev_get_drvdata(dev);
 718         struct drm_device *drm_dev = priv->ddev;
 719
 720         return drm_mode_config_helper_suspend(drm_dev);
 721 }
 722
 723 static int omap_drm_resume(struct device *dev)
 724 {
 725         struct omap_drm_private *priv = dev_get_drvdata(dev);
 726         struct drm_device *drm_dev = priv->ddev;
 727
 728         drm_mode_config_helper_resume(drm_dev);
 729
 730         return omap_gem_resume(drm_dev);
 731 }
 732 #endif
 733
 734 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 735
 736 static struct platform_driver pdev = {
 737         .driver = {
 738                 .name = "omapdrm",
 739                 .pm = &omapdrm_pm_ops,
 740         },
 741         .probe = pdev_probe,
 742         .remove = pdev_remove,
 743 };
 744
 745 static struct platform_driver * const drivers[] = {
 746         &omap_dmm_driver,
 747         &pdev,
 748 };
 749
 750 static int __init omap_drm_init(void)
 751 {
 752         DBG("init");
 753
 754         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 755 }
 756
 757 static void __exit omap_drm_fini(void)
 758 {
 759         DBG("fini");
 760
 761         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 762 }
 763
 764 /* need late_initcall() so we load after dss_driver's are loaded */
 765 late_initcall(omap_drm_init);
 766 module_exit(omap_drm_fini);
 767
 768 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 769 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 770 MODULE_ALIAS("platform:" DRIVER_NAME);
 771 MODULE_LICENSE("GPL v2");