2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
19 * major: IP major version, used for IP structure
20 * minor: big feature change under same structure
22 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
23 #define VOP_MAJOR(version) ((version) >> 8)
24 #define VOP_MINOR(version) ((version) & 0xff)
26 #define NUM_YUV2YUV_COEFFICIENTS 12
28 enum vop_data_format {
46 struct vop_reg htotal_pw;
47 struct vop_reg hact_st_end;
48 struct vop_reg hpost_st_end;
49 struct vop_reg vtotal_pw;
50 struct vop_reg vact_st_end;
51 struct vop_reg vpost_st_end;
55 struct vop_reg pin_pol;
56 struct vop_reg dp_pin_pol;
57 struct vop_reg edp_pin_pol;
58 struct vop_reg hdmi_pin_pol;
59 struct vop_reg mipi_pin_pol;
60 struct vop_reg rgb_pin_pol;
62 struct vop_reg edp_en;
63 struct vop_reg hdmi_en;
64 struct vop_reg mipi_en;
65 struct vop_reg mipi_dual_channel_en;
66 struct vop_reg rgb_en;
70 struct vop_reg cfg_done;
71 struct vop_reg dsp_blank;
72 struct vop_reg data_blank;
73 struct vop_reg pre_dither_down;
74 struct vop_reg dither_down_sel;
75 struct vop_reg dither_down_mode;
76 struct vop_reg dither_down_en;
77 struct vop_reg dither_up;
78 struct vop_reg gate_en;
79 struct vop_reg mmu_en;
80 struct vop_reg out_mode;
81 struct vop_reg standby;
85 struct vop_reg global_regdone_en;
92 struct vop_reg line_flag_num[2];
93 struct vop_reg enable;
95 struct vop_reg status;
98 struct vop_scl_extension {
99 struct vop_reg cbcr_vsd_mode;
100 struct vop_reg cbcr_vsu_mode;
101 struct vop_reg cbcr_hsd_mode;
102 struct vop_reg cbcr_ver_scl_mode;
103 struct vop_reg cbcr_hor_scl_mode;
104 struct vop_reg yrgb_vsd_mode;
105 struct vop_reg yrgb_vsu_mode;
106 struct vop_reg yrgb_hsd_mode;
107 struct vop_reg yrgb_ver_scl_mode;
108 struct vop_reg yrgb_hor_scl_mode;
109 struct vop_reg line_load_mode;
110 struct vop_reg cbcr_axi_gather_num;
111 struct vop_reg yrgb_axi_gather_num;
112 struct vop_reg vsd_cbcr_gt2;
113 struct vop_reg vsd_cbcr_gt4;
114 struct vop_reg vsd_yrgb_gt2;
115 struct vop_reg vsd_yrgb_gt4;
116 struct vop_reg bic_coe_sel;
117 struct vop_reg cbcr_axi_gather_en;
118 struct vop_reg yrgb_axi_gather_en;
119 struct vop_reg lb_mode;
122 struct vop_scl_regs {
123 const struct vop_scl_extension *ext;
125 struct vop_reg scale_yrgb_x;
126 struct vop_reg scale_yrgb_y;
127 struct vop_reg scale_cbcr_x;
128 struct vop_reg scale_cbcr_y;
131 struct vop_yuv2yuv_phy {
132 struct vop_reg y2r_coefficients[NUM_YUV2YUV_COEFFICIENTS];
136 const struct vop_scl_regs *scl;
137 const uint32_t *data_formats;
140 struct vop_reg enable;
142 struct vop_reg format;
143 struct vop_reg rb_swap;
144 struct vop_reg act_info;
145 struct vop_reg dsp_info;
146 struct vop_reg dsp_st;
147 struct vop_reg yrgb_mst;
148 struct vop_reg uv_mst;
149 struct vop_reg yrgb_vir;
150 struct vop_reg uv_vir;
151 struct vop_reg y_mir_en;
152 struct vop_reg x_mir_en;
154 struct vop_reg dst_alpha_ctl;
155 struct vop_reg src_alpha_ctl;
156 struct vop_reg channel;
159 struct vop_win_yuv2yuv_data {
161 const struct vop_yuv2yuv_phy *phy;
162 struct vop_reg y2r_en;
165 struct vop_win_data {
167 const struct vop_win_phy *phy;
168 enum drm_plane_type type;
173 const struct vop_intr *intr;
174 const struct vop_common *common;
175 const struct vop_misc *misc;
176 const struct vop_modeset *modeset;
177 const struct vop_output *output;
178 const struct vop_win_yuv2yuv_data *win_yuv2yuv;
179 const struct vop_win_data *win;
180 unsigned int win_size;
182 #define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
183 #define VOP_FEATURE_INTERNAL_RGB BIT(1)
187 /* interrupt define */
188 #define DSP_HOLD_VALID_INTR (1 << 0)
189 #define FS_INTR (1 << 1)
190 #define LINE_FLAG_INTR (1 << 2)
191 #define BUS_ERROR_INTR (1 << 3)
193 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
194 LINE_FLAG_INTR | BUS_ERROR_INTR)
196 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
197 #define FS_INTR_EN(x) ((x) << 5)
198 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
199 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
200 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
201 #define FS_INTR_MASK (1 << 5)
202 #define LINE_FLAG_INTR_MASK (1 << 6)
203 #define BUS_ERROR_INTR_MASK (1 << 7)
205 #define INTR_CLR_SHIFT 8
206 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
207 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
208 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
209 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
211 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
212 #define DSP_LINE_NUM_MASK (0x1fff << 12)
214 /* src alpha ctrl define */
215 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
216 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
217 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
218 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
219 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
220 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
221 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
222 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
223 /* dst alpha ctrl define */
224 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
227 * display output interface supported by rockchip lcdc
229 #define ROCKCHIP_OUT_MODE_P888 0
230 #define ROCKCHIP_OUT_MODE_P666 1
231 #define ROCKCHIP_OUT_MODE_P565 2
232 /* for use special outface */
233 #define ROCKCHIP_OUT_MODE_AAAA 15
236 #define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)
243 enum global_blend_mode {
246 ALPHA_PER_PIX_GLOBAL,
249 enum alpha_cal_mode {
256 ALPHA_SRC_NO_PRE_MUL,
287 enum scale_down_mode {
288 SCALE_DOWN_BIL = 0x0,
292 enum dither_down_mode {
293 RGB888_TO_RGB565 = 0x0,
294 RGB888_TO_RGB666 = 0x1
297 enum dither_down_mode_sel {
298 DITHER_DOWN_ALLEGRO = 0x0,
299 DITHER_DOWN_FRC = 0x1
309 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
310 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
311 #define SCL_MAX_VSKIPLINES 4
312 #define MIN_SCL_FT_AFTER_VSKIP 1
314 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
316 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
319 static inline uint16_t scl_cal_scale2(int src, int dst)
321 return ((src - 1) << 12) / (dst - 1);
324 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
325 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
326 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
328 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
333 act_height = (src_h + vskiplines - 1) / vskiplines;
335 if (act_height == dst_h)
336 return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
338 return GET_SCL_FT_BILI_DN(act_height, dst_h);
341 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
351 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
355 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
356 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
362 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
368 lb_mode = LB_YUV_3840X5;
370 lb_mode = LB_YUV_2560X8;
373 lb_mode = LB_RGB_3840X2;
374 else if (width > 1920)
375 lb_mode = LB_RGB_2560X4;
377 lb_mode = LB_RGB_1920X5;
383 extern const struct component_ops vop_component_ops;
384 #endif /* _ROCKCHIP_DRM_VOP_H */