1 /* SPDX-License-Identifier: MIT */
3 * Copyright (C) 2013-2019 NVIDIA Corporation.
4 * Copyright (C) 2015 Rob Clark
8 #define DRM_TEGRA_DP_H 1
10 #include <linux/types.h>
15 * struct drm_dp_link_caps - DP link capabilities
17 struct drm_dp_link_caps {
21 * enhanced framing capability (mandatory as of DP 1.2)
23 bool enhanced_framing;
28 * training pattern sequence 3 supported for equalization
35 * AUX CH handshake not required for link training
42 * ANSI 8B/10B channel coding capability
47 * @alternate_scrambler_reset:
49 * eDP alternate scrambler reset capability
51 bool alternate_scrambler_reset;
54 void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
55 const struct drm_dp_link_caps *src);
58 * struct drm_dp_link - DP link capabilities and configuration
59 * @revision: DP specification revision supported on the link
60 * @max_rate: maximum clock rate supported on the link
61 * @max_lanes: maximum number of lanes supported on the link
62 * @caps: capabilities supported on the link (see &drm_dp_link_caps)
63 * @rate: currently configured link rate
64 * @lanes: currently configured number of lanes
67 unsigned char revision;
68 unsigned int max_rate;
69 unsigned int max_lanes;
71 struct drm_dp_link_caps caps;
77 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link);
78 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link);
79 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link);
80 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link);