1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Avionic Design GmbH
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
7 #include <linux/bitops.h>
8 #include <linux/host1x.h>
10 #include <linux/iommu.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
14 #include <drm/drm_atomic.h>
15 #include <drm/drm_atomic_helper.h>
16 #include <drm/drm_debugfs.h>
17 #include <drm/drm_drv.h>
18 #include <drm/drm_fourcc.h>
19 #include <drm/drm_ioctl.h>
20 #include <drm/drm_prime.h>
21 #include <drm/drm_vblank.h>
23 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
24 #include <asm/dma-iommu.h>
30 #define DRIVER_NAME "tegra"
31 #define DRIVER_DESC "NVIDIA Tegra graphics"
32 #define DRIVER_DATE "20120330"
33 #define DRIVER_MAJOR 0
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
37 #define CARVEOUT_SZ SZ_64M
38 #define CDMA_GATHER_FETCHES_MAX_NB 16383
40 struct tegra_drm_file {
45 static int tegra_atomic_check(struct drm_device *drm,
46 struct drm_atomic_state *state)
50 err = drm_atomic_helper_check(drm, state);
54 return tegra_display_hub_atomic_check(drm, state);
57 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
58 .fb_create = tegra_fb_create,
59 #ifdef CONFIG_DRM_FBDEV_EMULATION
60 .output_poll_changed = drm_fb_helper_output_poll_changed,
62 .atomic_check = tegra_atomic_check,
63 .atomic_commit = drm_atomic_helper_commit,
66 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
68 struct drm_device *drm = old_state->dev;
69 struct tegra_drm *tegra = drm->dev_private;
72 drm_atomic_helper_commit_modeset_disables(drm, old_state);
73 tegra_display_hub_atomic_commit(drm, old_state);
74 drm_atomic_helper_commit_planes(drm, old_state, 0);
75 drm_atomic_helper_commit_modeset_enables(drm, old_state);
76 drm_atomic_helper_commit_hw_done(old_state);
77 drm_atomic_helper_wait_for_vblanks(drm, old_state);
78 drm_atomic_helper_cleanup_planes(drm, old_state);
80 drm_atomic_helper_commit_tail_rpm(old_state);
84 static const struct drm_mode_config_helper_funcs
85 tegra_drm_mode_config_helpers = {
86 .atomic_commit_tail = tegra_atomic_commit_tail,
89 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
91 struct host1x_device *device = to_host1x_device(drm->dev);
92 struct tegra_drm *tegra;
95 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
99 if (iommu_present(&platform_bus_type)) {
100 tegra->domain = iommu_domain_alloc(&platform_bus_type);
101 if (!tegra->domain) {
106 err = iova_cache_get();
111 mutex_init(&tegra->clients_lock);
112 INIT_LIST_HEAD(&tegra->clients);
114 drm->dev_private = tegra;
117 drm_mode_config_init(drm);
119 drm->mode_config.min_width = 0;
120 drm->mode_config.min_height = 0;
122 drm->mode_config.max_width = 4096;
123 drm->mode_config.max_height = 4096;
125 drm->mode_config.allow_fb_modifiers = true;
127 drm->mode_config.normalize_zpos = true;
129 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
130 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
132 err = tegra_drm_fb_prepare(drm);
136 drm_kms_helper_poll_init(drm);
138 err = host1x_device_init(device);
143 u64 carveout_start, carveout_end, gem_start, gem_end;
144 u64 dma_mask = dma_get_mask(&device->dev);
145 dma_addr_t start, end;
148 start = tegra->domain->geometry.aperture_start & dma_mask;
149 end = tegra->domain->geometry.aperture_end & dma_mask;
152 gem_end = end - CARVEOUT_SZ;
153 carveout_start = gem_end + 1;
156 order = __ffs(tegra->domain->pgsize_bitmap);
157 init_iova_domain(&tegra->carveout.domain, 1UL << order,
158 carveout_start >> order);
160 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
161 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
163 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
164 mutex_init(&tegra->mm_lock);
166 DRM_DEBUG_DRIVER("IOMMU apertures:\n");
167 DRM_DEBUG_DRIVER(" GEM: %#llx-%#llx\n", gem_start, gem_end);
168 DRM_DEBUG_DRIVER(" Carveout: %#llx-%#llx\n", carveout_start,
173 err = tegra_display_hub_prepare(tegra->hub);
179 * We don't use the drm_irq_install() helpers provided by the DRM
180 * core, so we need to set this manually in order to allow the
181 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
183 drm->irq_enabled = true;
185 /* syncpoints are used for full 32-bit hardware VBLANK counters */
186 drm->max_vblank_count = 0xffffffff;
188 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
192 drm_mode_config_reset(drm);
194 err = tegra_drm_fb_init(drm);
202 tegra_display_hub_cleanup(tegra->hub);
205 mutex_destroy(&tegra->mm_lock);
206 drm_mm_takedown(&tegra->mm);
207 put_iova_domain(&tegra->carveout.domain);
211 host1x_device_exit(device);
213 drm_kms_helper_poll_fini(drm);
214 tegra_drm_fb_free(drm);
216 drm_mode_config_cleanup(drm);
219 iommu_domain_free(tegra->domain);
225 static void tegra_drm_unload(struct drm_device *drm)
227 struct host1x_device *device = to_host1x_device(drm->dev);
228 struct tegra_drm *tegra = drm->dev_private;
231 drm_kms_helper_poll_fini(drm);
232 tegra_drm_fb_exit(drm);
233 drm_atomic_helper_shutdown(drm);
234 drm_mode_config_cleanup(drm);
236 err = host1x_device_exit(device);
241 mutex_destroy(&tegra->mm_lock);
242 drm_mm_takedown(&tegra->mm);
243 put_iova_domain(&tegra->carveout.domain);
245 iommu_domain_free(tegra->domain);
251 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
253 struct tegra_drm_file *fpriv;
255 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
259 idr_init(&fpriv->contexts);
260 mutex_init(&fpriv->lock);
261 filp->driver_priv = fpriv;
266 static void tegra_drm_context_free(struct tegra_drm_context *context)
268 context->client->ops->close_channel(context);
272 static struct host1x_bo *
273 host1x_bo_lookup(struct drm_file *file, u32 handle)
275 struct drm_gem_object *gem;
278 gem = drm_gem_object_lookup(file, handle);
282 bo = to_tegra_bo(gem);
286 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
287 struct drm_tegra_reloc __user *src,
288 struct drm_device *drm,
289 struct drm_file *file)
294 err = get_user(cmdbuf, &src->cmdbuf.handle);
298 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
302 err = get_user(target, &src->target.handle);
306 err = get_user(dest->target.offset, &src->target.offset);
310 err = get_user(dest->shift, &src->shift);
314 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
315 if (!dest->cmdbuf.bo)
318 dest->target.bo = host1x_bo_lookup(file, target);
319 if (!dest->target.bo)
325 int tegra_drm_submit(struct tegra_drm_context *context,
326 struct drm_tegra_submit *args, struct drm_device *drm,
327 struct drm_file *file)
329 struct host1x_client *client = &context->client->base;
330 unsigned int num_cmdbufs = args->num_cmdbufs;
331 unsigned int num_relocs = args->num_relocs;
332 struct drm_tegra_cmdbuf __user *user_cmdbufs;
333 struct drm_tegra_reloc __user *user_relocs;
334 struct drm_tegra_syncpt __user *user_syncpt;
335 struct drm_tegra_syncpt syncpt;
336 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
337 struct drm_gem_object **refs;
338 struct host1x_syncpt *sp;
339 struct host1x_job *job;
340 unsigned int num_refs;
343 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
344 user_relocs = u64_to_user_ptr(args->relocs);
345 user_syncpt = u64_to_user_ptr(args->syncpts);
347 /* We don't yet support other than one syncpt_incr struct per submit */
348 if (args->num_syncpts != 1)
351 /* We don't yet support waitchks */
352 if (args->num_waitchks != 0)
355 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
360 job->num_relocs = args->num_relocs;
361 job->client = client;
362 job->class = client->class;
363 job->serialize = true;
366 * Track referenced BOs so that they can be unreferenced after the
367 * submission is complete.
369 num_refs = num_cmdbufs + num_relocs * 2;
371 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
377 /* reuse as an iterator later */
380 while (num_cmdbufs) {
381 struct drm_tegra_cmdbuf cmdbuf;
382 struct host1x_bo *bo;
383 struct tegra_bo *obj;
386 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
392 * The maximum number of CDMA gather fetches is 16383, a higher
393 * value means the words count is malformed.
395 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
400 bo = host1x_bo_lookup(file, cmdbuf.handle);
406 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
407 obj = host1x_to_tegra_bo(bo);
408 refs[num_refs++] = &obj->gem;
411 * Gather buffer base address must be 4-bytes aligned,
412 * unaligned offset is malformed and cause commands stream
413 * corruption on the buffer address relocation.
415 if (offset & 3 || offset > obj->gem.size) {
420 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
425 /* copy and resolve relocations from submit */
426 while (num_relocs--) {
427 struct host1x_reloc *reloc;
428 struct tegra_bo *obj;
430 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs],
431 &user_relocs[num_relocs], drm,
436 reloc = &job->relocs[num_relocs];
437 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
438 refs[num_refs++] = &obj->gem;
441 * The unaligned cmdbuf offset will cause an unaligned write
442 * during of the relocations patching, corrupting the commands
445 if (reloc->cmdbuf.offset & 3 ||
446 reloc->cmdbuf.offset >= obj->gem.size) {
451 obj = host1x_to_tegra_bo(reloc->target.bo);
452 refs[num_refs++] = &obj->gem;
454 if (reloc->target.offset >= obj->gem.size) {
460 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
465 /* check whether syncpoint ID is valid */
466 sp = host1x_syncpt_get(host1x, syncpt.id);
472 job->is_addr_reg = context->client->ops->is_addr_reg;
473 job->is_valid_class = context->client->ops->is_valid_class;
474 job->syncpt_incrs = syncpt.incrs;
475 job->syncpt_id = syncpt.id;
476 job->timeout = 10000;
478 if (args->timeout && args->timeout < 10000)
479 job->timeout = args->timeout;
481 err = host1x_job_pin(job, context->client->base.dev);
485 err = host1x_job_submit(job);
487 host1x_job_unpin(job);
491 args->fence = job->syncpt_end;
495 drm_gem_object_put_unlocked(refs[num_refs]);
505 #ifdef CONFIG_DRM_TEGRA_STAGING
506 static int tegra_gem_create(struct drm_device *drm, void *data,
507 struct drm_file *file)
509 struct drm_tegra_gem_create *args = data;
512 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
520 static int tegra_gem_mmap(struct drm_device *drm, void *data,
521 struct drm_file *file)
523 struct drm_tegra_gem_mmap *args = data;
524 struct drm_gem_object *gem;
527 gem = drm_gem_object_lookup(file, args->handle);
531 bo = to_tegra_bo(gem);
533 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
535 drm_gem_object_put_unlocked(gem);
540 static int tegra_syncpt_read(struct drm_device *drm, void *data,
541 struct drm_file *file)
543 struct host1x *host = dev_get_drvdata(drm->dev->parent);
544 struct drm_tegra_syncpt_read *args = data;
545 struct host1x_syncpt *sp;
547 sp = host1x_syncpt_get(host, args->id);
551 args->value = host1x_syncpt_read_min(sp);
555 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
556 struct drm_file *file)
558 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
559 struct drm_tegra_syncpt_incr *args = data;
560 struct host1x_syncpt *sp;
562 sp = host1x_syncpt_get(host1x, args->id);
566 return host1x_syncpt_incr(sp);
569 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
570 struct drm_file *file)
572 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
573 struct drm_tegra_syncpt_wait *args = data;
574 struct host1x_syncpt *sp;
576 sp = host1x_syncpt_get(host1x, args->id);
580 return host1x_syncpt_wait(sp, args->thresh,
581 msecs_to_jiffies(args->timeout),
585 static int tegra_client_open(struct tegra_drm_file *fpriv,
586 struct tegra_drm_client *client,
587 struct tegra_drm_context *context)
591 err = client->ops->open_channel(client, context);
595 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
597 client->ops->close_channel(context);
601 context->client = client;
607 static int tegra_open_channel(struct drm_device *drm, void *data,
608 struct drm_file *file)
610 struct tegra_drm_file *fpriv = file->driver_priv;
611 struct tegra_drm *tegra = drm->dev_private;
612 struct drm_tegra_open_channel *args = data;
613 struct tegra_drm_context *context;
614 struct tegra_drm_client *client;
617 context = kzalloc(sizeof(*context), GFP_KERNEL);
621 mutex_lock(&fpriv->lock);
623 list_for_each_entry(client, &tegra->clients, list)
624 if (client->base.class == args->client) {
625 err = tegra_client_open(fpriv, client, context);
629 args->context = context->id;
636 mutex_unlock(&fpriv->lock);
640 static int tegra_close_channel(struct drm_device *drm, void *data,
641 struct drm_file *file)
643 struct tegra_drm_file *fpriv = file->driver_priv;
644 struct drm_tegra_close_channel *args = data;
645 struct tegra_drm_context *context;
648 mutex_lock(&fpriv->lock);
650 context = idr_find(&fpriv->contexts, args->context);
656 idr_remove(&fpriv->contexts, context->id);
657 tegra_drm_context_free(context);
660 mutex_unlock(&fpriv->lock);
664 static int tegra_get_syncpt(struct drm_device *drm, void *data,
665 struct drm_file *file)
667 struct tegra_drm_file *fpriv = file->driver_priv;
668 struct drm_tegra_get_syncpt *args = data;
669 struct tegra_drm_context *context;
670 struct host1x_syncpt *syncpt;
673 mutex_lock(&fpriv->lock);
675 context = idr_find(&fpriv->contexts, args->context);
681 if (args->index >= context->client->base.num_syncpts) {
686 syncpt = context->client->base.syncpts[args->index];
687 args->id = host1x_syncpt_id(syncpt);
690 mutex_unlock(&fpriv->lock);
694 static int tegra_submit(struct drm_device *drm, void *data,
695 struct drm_file *file)
697 struct tegra_drm_file *fpriv = file->driver_priv;
698 struct drm_tegra_submit *args = data;
699 struct tegra_drm_context *context;
702 mutex_lock(&fpriv->lock);
704 context = idr_find(&fpriv->contexts, args->context);
710 err = context->client->ops->submit(context, args, drm, file);
713 mutex_unlock(&fpriv->lock);
717 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
718 struct drm_file *file)
720 struct tegra_drm_file *fpriv = file->driver_priv;
721 struct drm_tegra_get_syncpt_base *args = data;
722 struct tegra_drm_context *context;
723 struct host1x_syncpt_base *base;
724 struct host1x_syncpt *syncpt;
727 mutex_lock(&fpriv->lock);
729 context = idr_find(&fpriv->contexts, args->context);
735 if (args->syncpt >= context->client->base.num_syncpts) {
740 syncpt = context->client->base.syncpts[args->syncpt];
742 base = host1x_syncpt_get_base(syncpt);
748 args->id = host1x_syncpt_base_id(base);
751 mutex_unlock(&fpriv->lock);
755 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
756 struct drm_file *file)
758 struct drm_tegra_gem_set_tiling *args = data;
759 enum tegra_bo_tiling_mode mode;
760 struct drm_gem_object *gem;
761 unsigned long value = 0;
764 switch (args->mode) {
765 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
766 mode = TEGRA_BO_TILING_MODE_PITCH;
768 if (args->value != 0)
773 case DRM_TEGRA_GEM_TILING_MODE_TILED:
774 mode = TEGRA_BO_TILING_MODE_TILED;
776 if (args->value != 0)
781 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
782 mode = TEGRA_BO_TILING_MODE_BLOCK;
794 gem = drm_gem_object_lookup(file, args->handle);
798 bo = to_tegra_bo(gem);
800 bo->tiling.mode = mode;
801 bo->tiling.value = value;
803 drm_gem_object_put_unlocked(gem);
808 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
809 struct drm_file *file)
811 struct drm_tegra_gem_get_tiling *args = data;
812 struct drm_gem_object *gem;
816 gem = drm_gem_object_lookup(file, args->handle);
820 bo = to_tegra_bo(gem);
822 switch (bo->tiling.mode) {
823 case TEGRA_BO_TILING_MODE_PITCH:
824 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
828 case TEGRA_BO_TILING_MODE_TILED:
829 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
833 case TEGRA_BO_TILING_MODE_BLOCK:
834 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
835 args->value = bo->tiling.value;
843 drm_gem_object_put_unlocked(gem);
848 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
849 struct drm_file *file)
851 struct drm_tegra_gem_set_flags *args = data;
852 struct drm_gem_object *gem;
855 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
858 gem = drm_gem_object_lookup(file, args->handle);
862 bo = to_tegra_bo(gem);
865 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
866 bo->flags |= TEGRA_BO_BOTTOM_UP;
868 drm_gem_object_put_unlocked(gem);
873 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
874 struct drm_file *file)
876 struct drm_tegra_gem_get_flags *args = data;
877 struct drm_gem_object *gem;
880 gem = drm_gem_object_lookup(file, args->handle);
884 bo = to_tegra_bo(gem);
887 if (bo->flags & TEGRA_BO_BOTTOM_UP)
888 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
890 drm_gem_object_put_unlocked(gem);
896 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
897 #ifdef CONFIG_DRM_TEGRA_STAGING
898 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
900 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
902 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
904 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
906 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
908 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
910 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
912 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
914 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
916 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
918 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
920 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
922 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
924 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
929 static const struct file_operations tegra_drm_fops = {
930 .owner = THIS_MODULE,
932 .release = drm_release,
933 .unlocked_ioctl = drm_ioctl,
934 .mmap = tegra_drm_mmap,
937 .compat_ioctl = drm_compat_ioctl,
938 .llseek = noop_llseek,
941 static int tegra_drm_context_cleanup(int id, void *p, void *data)
943 struct tegra_drm_context *context = p;
945 tegra_drm_context_free(context);
950 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
952 struct tegra_drm_file *fpriv = file->driver_priv;
954 mutex_lock(&fpriv->lock);
955 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
956 mutex_unlock(&fpriv->lock);
958 idr_destroy(&fpriv->contexts);
959 mutex_destroy(&fpriv->lock);
963 #ifdef CONFIG_DEBUG_FS
964 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
966 struct drm_info_node *node = (struct drm_info_node *)s->private;
967 struct drm_device *drm = node->minor->dev;
968 struct drm_framebuffer *fb;
970 mutex_lock(&drm->mode_config.fb_lock);
972 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
973 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
974 fb->base.id, fb->width, fb->height,
976 fb->format->cpp[0] * 8,
977 drm_framebuffer_read_refcount(fb));
980 mutex_unlock(&drm->mode_config.fb_lock);
985 static int tegra_debugfs_iova(struct seq_file *s, void *data)
987 struct drm_info_node *node = (struct drm_info_node *)s->private;
988 struct drm_device *drm = node->minor->dev;
989 struct tegra_drm *tegra = drm->dev_private;
990 struct drm_printer p = drm_seq_file_printer(s);
993 mutex_lock(&tegra->mm_lock);
994 drm_mm_print(&tegra->mm, &p);
995 mutex_unlock(&tegra->mm_lock);
1001 static struct drm_info_list tegra_debugfs_list[] = {
1002 { "framebuffers", tegra_debugfs_framebuffers, 0 },
1003 { "iova", tegra_debugfs_iova, 0 },
1006 static int tegra_debugfs_init(struct drm_minor *minor)
1008 return drm_debugfs_create_files(tegra_debugfs_list,
1009 ARRAY_SIZE(tegra_debugfs_list),
1010 minor->debugfs_root, minor);
1014 static struct drm_driver tegra_drm_driver = {
1015 .driver_features = DRIVER_MODESET | DRIVER_GEM |
1016 DRIVER_ATOMIC | DRIVER_RENDER,
1017 .load = tegra_drm_load,
1018 .unload = tegra_drm_unload,
1019 .open = tegra_drm_open,
1020 .postclose = tegra_drm_postclose,
1021 .lastclose = drm_fb_helper_lastclose,
1023 #if defined(CONFIG_DEBUG_FS)
1024 .debugfs_init = tegra_debugfs_init,
1027 .gem_free_object_unlocked = tegra_bo_free_object,
1028 .gem_vm_ops = &tegra_bo_vm_ops,
1030 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1031 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1032 .gem_prime_export = tegra_gem_prime_export,
1033 .gem_prime_import = tegra_gem_prime_import,
1035 .dumb_create = tegra_bo_dumb_create,
1037 .ioctls = tegra_drm_ioctls,
1038 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1039 .fops = &tegra_drm_fops,
1041 .name = DRIVER_NAME,
1042 .desc = DRIVER_DESC,
1043 .date = DRIVER_DATE,
1044 .major = DRIVER_MAJOR,
1045 .minor = DRIVER_MINOR,
1046 .patchlevel = DRIVER_PATCHLEVEL,
1049 int tegra_drm_register_client(struct tegra_drm *tegra,
1050 struct tegra_drm_client *client)
1052 mutex_lock(&tegra->clients_lock);
1053 list_add_tail(&client->list, &tegra->clients);
1054 client->drm = tegra;
1055 mutex_unlock(&tegra->clients_lock);
1060 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1061 struct tegra_drm_client *client)
1063 mutex_lock(&tegra->clients_lock);
1064 list_del_init(&client->list);
1066 mutex_unlock(&tegra->clients_lock);
1071 int host1x_client_iommu_attach(struct host1x_client *client, bool shared)
1073 struct drm_device *drm = dev_get_drvdata(client->parent);
1074 struct tegra_drm *tegra = drm->dev_private;
1075 struct iommu_group *group = NULL;
1078 if (tegra->domain) {
1079 group = iommu_group_get(client->dev);
1081 dev_err(client->dev, "failed to get IOMMU group\n");
1085 if (!shared || (shared && (group != tegra->group))) {
1086 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
1087 if (client->dev->archdata.mapping) {
1088 struct dma_iommu_mapping *mapping =
1089 to_dma_iommu_mapping(client->dev);
1090 arm_iommu_detach_device(client->dev);
1091 arm_iommu_release_mapping(mapping);
1094 err = iommu_attach_group(tegra->domain, group);
1096 iommu_group_put(group);
1100 if (shared && !tegra->group)
1101 tegra->group = group;
1105 client->group = group;
1110 void host1x_client_iommu_detach(struct host1x_client *client)
1112 struct drm_device *drm = dev_get_drvdata(client->parent);
1113 struct tegra_drm *tegra = drm->dev_private;
1115 if (client->group) {
1116 if (client->group == tegra->group) {
1117 iommu_detach_group(tegra->domain, client->group);
1118 tegra->group = NULL;
1121 iommu_group_put(client->group);
1125 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1133 size = iova_align(&tegra->carveout.domain, size);
1135 size = PAGE_ALIGN(size);
1137 gfp = GFP_KERNEL | __GFP_ZERO;
1138 if (!tegra->domain) {
1140 * Many units only support 32-bit addresses, even on 64-bit
1141 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1142 * virtual address space, force allocations to be in the
1143 * lower 32-bit range.
1148 virt = (void *)__get_free_pages(gfp, get_order(size));
1150 return ERR_PTR(-ENOMEM);
1152 if (!tegra->domain) {
1154 * If IOMMU is disabled, devices address physical memory
1157 *dma = virt_to_phys(virt);
1161 alloc = alloc_iova(&tegra->carveout.domain,
1162 size >> tegra->carveout.shift,
1163 tegra->carveout.limit, true);
1169 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1170 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1171 size, IOMMU_READ | IOMMU_WRITE);
1178 __free_iova(&tegra->carveout.domain, alloc);
1180 free_pages((unsigned long)virt, get_order(size));
1182 return ERR_PTR(err);
1185 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1189 size = iova_align(&tegra->carveout.domain, size);
1191 size = PAGE_ALIGN(size);
1193 if (tegra->domain) {
1194 iommu_unmap(tegra->domain, dma, size);
1195 free_iova(&tegra->carveout.domain,
1196 iova_pfn(&tegra->carveout.domain, dma));
1199 free_pages((unsigned long)virt, get_order(size));
1202 static int host1x_drm_probe(struct host1x_device *dev)
1204 struct drm_driver *driver = &tegra_drm_driver;
1205 struct drm_device *drm;
1208 drm = drm_dev_alloc(driver, &dev->dev);
1210 return PTR_ERR(drm);
1212 dev_set_drvdata(&dev->dev, drm);
1214 err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false);
1218 err = drm_dev_register(drm, 0);
1229 static int host1x_drm_remove(struct host1x_device *dev)
1231 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1233 drm_dev_unregister(drm);
1239 #ifdef CONFIG_PM_SLEEP
1240 static int host1x_drm_suspend(struct device *dev)
1242 struct drm_device *drm = dev_get_drvdata(dev);
1244 return drm_mode_config_helper_suspend(drm);
1247 static int host1x_drm_resume(struct device *dev)
1249 struct drm_device *drm = dev_get_drvdata(dev);
1251 return drm_mode_config_helper_resume(drm);
1255 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1258 static const struct of_device_id host1x_drm_subdevs[] = {
1259 { .compatible = "nvidia,tegra20-dc", },
1260 { .compatible = "nvidia,tegra20-hdmi", },
1261 { .compatible = "nvidia,tegra20-gr2d", },
1262 { .compatible = "nvidia,tegra20-gr3d", },
1263 { .compatible = "nvidia,tegra30-dc", },
1264 { .compatible = "nvidia,tegra30-hdmi", },
1265 { .compatible = "nvidia,tegra30-gr2d", },
1266 { .compatible = "nvidia,tegra30-gr3d", },
1267 { .compatible = "nvidia,tegra114-dsi", },
1268 { .compatible = "nvidia,tegra114-hdmi", },
1269 { .compatible = "nvidia,tegra114-gr3d", },
1270 { .compatible = "nvidia,tegra124-dc", },
1271 { .compatible = "nvidia,tegra124-sor", },
1272 { .compatible = "nvidia,tegra124-hdmi", },
1273 { .compatible = "nvidia,tegra124-dsi", },
1274 { .compatible = "nvidia,tegra124-vic", },
1275 { .compatible = "nvidia,tegra132-dsi", },
1276 { .compatible = "nvidia,tegra210-dc", },
1277 { .compatible = "nvidia,tegra210-dsi", },
1278 { .compatible = "nvidia,tegra210-sor", },
1279 { .compatible = "nvidia,tegra210-sor1", },
1280 { .compatible = "nvidia,tegra210-vic", },
1281 { .compatible = "nvidia,tegra186-display", },
1282 { .compatible = "nvidia,tegra186-dc", },
1283 { .compatible = "nvidia,tegra186-sor", },
1284 { .compatible = "nvidia,tegra186-sor1", },
1285 { .compatible = "nvidia,tegra186-vic", },
1286 { .compatible = "nvidia,tegra194-display", },
1287 { .compatible = "nvidia,tegra194-dc", },
1288 { .compatible = "nvidia,tegra194-sor", },
1289 { .compatible = "nvidia,tegra194-vic", },
1293 static struct host1x_driver host1x_drm_driver = {
1296 .pm = &host1x_drm_pm_ops,
1298 .probe = host1x_drm_probe,
1299 .remove = host1x_drm_remove,
1300 .subdevs = host1x_drm_subdevs,
1303 static struct platform_driver * const drivers[] = {
1304 &tegra_display_hub_driver,
1308 &tegra_dpaux_driver,
1315 static int __init host1x_drm_init(void)
1319 err = host1x_driver_register(&host1x_drm_driver);
1323 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1325 goto unregister_host1x;
1330 host1x_driver_unregister(&host1x_drm_driver);
1333 module_init(host1x_drm_init);
1335 static void __exit host1x_drm_exit(void)
1337 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1338 host1x_driver_unregister(&host1x_drm_driver);
1340 module_exit(host1x_drm_exit);
1342 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1343 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1344 MODULE_LICENSE("GPL v2");