drivers/gpu/drm/via/via_dmablit.c

   1 /* via_dmablit.c -- PCI DMA BitBlt support for the VIA Unichrome/Pro
   2  *
   3  * Copyright (C) 2005 Thomas Hellstrom, All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Thomas Hellstrom.
  26  *    Partially based on code obtained from Digeo Inc.
  27  */
  28
  29
  30 /*
  31  * Unmaps the DMA mappings.
  32  * FIXME: Is this a NoOp on x86? Also
  33  * FIXME: What happens if this one is called and a pending blit has previously done
  34  * the same DMA mappings?
  35  */
  36
  37 #include <linux/pagemap.h>
  38 #include <linux/slab.h>
  39 #include <linux/vmalloc.h>
  40
  41 #include <drm/drm_device.h>
  42 #include <drm/drm_pci.h>
  43 #include <drm/via_drm.h>
  44
  45 #include "via_dmablit.h"
  46 #include "via_drv.h"
  47
  48 #define VIA_PGDN(x)          (((unsigned long)(x)) & PAGE_MASK)
  49 #define VIA_PGOFF(x)        (((unsigned long)(x)) & ~PAGE_MASK)
  50 #define VIA_PFN(x)            ((unsigned long)(x) >> PAGE_SHIFT)
  51
  52 typedef struct _drm_via_descriptor {
  53         uint32_t mem_addr;
  54         uint32_t dev_addr;
  55         uint32_t size;
  56         uint32_t next;
  57 } drm_via_descriptor_t;
  58
  59
  60 /*
  61  * Unmap a DMA mapping.
  62  */
  63
  64
  65
  66 static void
  67 via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
  68 {
  69         int num_desc = vsg->num_desc;
  70         unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
  71         unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
  72         drm_via_descriptor_t *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
  73                 descriptor_this_page;
  74         dma_addr_t next = vsg->chain_start;
  75
  76         while (num_desc--) {
  77                 if (descriptor_this_page-- == 0) {
  78                         cur_descriptor_page--;
  79                         descriptor_this_page = vsg->descriptors_per_page - 1;
  80                         desc_ptr = vsg->desc_pages[cur_descriptor_page] +
  81                                 descriptor_this_page;
  82                 }
  83                 dma_unmap_single(&pdev->dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
  84                 dma_unmap_page(&pdev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
  85                 next = (dma_addr_t) desc_ptr->next;
  86                 desc_ptr--;
  87         }
  88 }
  89
  90 /*
  91  * If mode = 0, count how many descriptors are needed.
  92  * If mode = 1, Map the DMA pages for the device, put together and map also the descriptors.
  93  * Descriptors are run in reverse order by the hardware because we are not allowed to update the
  94  * 'next' field without syncing calls when the descriptor is already mapped.
  95  */
  96
  97 static void
  98 via_map_blit_for_device(struct pci_dev *pdev,
  99                    const drm_via_dmablit_t *xfer,
 100                    drm_via_sg_info_t *vsg,
 101                    int mode)
 102 {
 103         unsigned cur_descriptor_page = 0;
 104         unsigned num_descriptors_this_page = 0;
 105         unsigned char *mem_addr = xfer->mem_addr;
 106         unsigned char *cur_mem;
 107         unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
 108         uint32_t fb_addr = xfer->fb_addr;
 109         uint32_t cur_fb;
 110         unsigned long line_len;
 111         unsigned remaining_len;
 112         int num_desc = 0;
 113         int cur_line;
 114         dma_addr_t next = 0 | VIA_DMA_DPR_EC;
 115         drm_via_descriptor_t *desc_ptr = NULL;
 116
 117         if (mode == 1)
 118                 desc_ptr = vsg->desc_pages[cur_descriptor_page];
 119
 120         for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
 121
 122                 line_len = xfer->line_length;
 123                 cur_fb = fb_addr;
 124                 cur_mem = mem_addr;
 125
 126                 while (line_len > 0) {
 127
 128                         remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
 129                         line_len -= remaining_len;
 130
 131                         if (mode == 1) {
 132                                 desc_ptr->mem_addr =
 133                                         dma_map_page(&pdev->dev,
 134                                                      vsg->pages[VIA_PFN(cur_mem) -
 135                                                                 VIA_PFN(first_addr)],
 136                                                      VIA_PGOFF(cur_mem), remaining_len,
 137                                                      vsg->direction);
 138                                 desc_ptr->dev_addr = cur_fb;
 139
 140                                 desc_ptr->size = remaining_len;
 141                                 desc_ptr->next = (uint32_t) next;
 142                                 next = dma_map_single(&pdev->dev, desc_ptr, sizeof(*desc_ptr),
 143                                                       DMA_TO_DEVICE);
 144                                 desc_ptr++;
 145                                 if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
 146                                         num_descriptors_this_page = 0;
 147                                         desc_ptr = vsg->desc_pages[++cur_descriptor_page];
 148                                 }
 149                         }
 150
 151                         num_desc++;
 152                         cur_mem += remaining_len;
 153                         cur_fb += remaining_len;
 154                 }
 155
 156                 mem_addr += xfer->mem_stride;
 157                 fb_addr += xfer->fb_stride;
 158         }
 159
 160         if (mode == 1) {
 161                 vsg->chain_start = next;
 162                 vsg->state = dr_via_device_mapped;
 163         }
 164         vsg->num_desc = num_desc;
 165 }
 166
 167 /*
 168  * Function that frees up all resources for a blit. It is usable even if the
 169  * blit info has only been partially built as long as the status enum is consistent
 170  * with the actual status of the used resources.
 171  */
 172
 173
 174 static void
 175 via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
 176 {
 177         struct page *page;
 178         int i;
 179
 180         switch (vsg->state) {
 181         case dr_via_device_mapped:
 182                 via_unmap_blit_from_device(pdev, vsg);
 183                 /* fall through */
 184         case dr_via_desc_pages_alloc:
 185                 for (i = 0; i < vsg->num_desc_pages; ++i) {
 186                         if (vsg->desc_pages[i] != NULL)
 187                                 free_page((unsigned long)vsg->desc_pages[i]);
 188                 }
 189                 kfree(vsg->desc_pages);
 190                 /* fall through */
 191         case dr_via_pages_locked:
 192                 for (i = 0; i < vsg->num_pages; ++i) {
 193                         if (NULL != (page = vsg->pages[i])) {
 194                                 if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
 195                                         SetPageDirty(page);
 196                                 put_page(page);
 197                         }
 198                 }
 199                 /* fall through */
 200         case dr_via_pages_alloc:
 201                 vfree(vsg->pages);
 202                 /* fall through */
 203         default:
 204                 vsg->state = dr_via_sg_init;
 205         }
 206         vfree(vsg->bounce_buffer);
 207         vsg->bounce_buffer = NULL;
 208         vsg->free_on_sequence = 0;
 209 }
 210
 211 /*
 212  * Fire a blit engine.
 213  */
 214
 215 static void
 216 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
 217 {
 218         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 219
 220         via_write(dev_priv, VIA_PCI_DMA_MAR0 + engine*0x10, 0);
 221         via_write(dev_priv, VIA_PCI_DMA_DAR0 + engine*0x10, 0);
 222         via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
 223                   VIA_DMA_CSR_DE);
 224         via_write(dev_priv, VIA_PCI_DMA_MR0  + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
 225         via_write(dev_priv, VIA_PCI_DMA_BCR0 + engine*0x10, 0);
 226         via_write(dev_priv, VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
 227         wmb();
 228         via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
 229         via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04);
 230 }
 231
 232 /*
 233  * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
 234  * occur here if the calling user does not have access to the submitted address.
 235  */
 236
 237 static int
 238 via_lock_all_dma_pages(drm_via_sg_info_t *vsg,  drm_via_dmablit_t *xfer)
 239 {
 240         int ret;
 241         unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
 242         vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
 243                 first_pfn + 1;
 244
 245         vsg->pages = vzalloc(array_size(sizeof(struct page *), vsg->num_pages));
 246         if (NULL == vsg->pages)
 247                 return -ENOMEM;
 248         ret = get_user_pages_fast((unsigned long)xfer->mem_addr,
 249                         vsg->num_pages,
 250                         vsg->direction == DMA_FROM_DEVICE ? FOLL_WRITE : 0,
 251                         vsg->pages);
 252         if (ret != vsg->num_pages) {
 253                 if (ret < 0)
 254                         return ret;
 255                 vsg->state = dr_via_pages_locked;
 256                 return -EINVAL;
 257         }
 258         vsg->state = dr_via_pages_locked;
 259         DRM_DEBUG("DMA pages locked\n");
 260         return 0;
 261 }
 262
 263 /*
 264  * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
 265  * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
 266  * quite large for some blits, and pages don't need to be contiguous.
 267  */
 268
 269 static int
 270 via_alloc_desc_pages(drm_via_sg_info_t *vsg)
 271 {
 272         int i;
 273
 274         vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
 275         vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
 276                 vsg->descriptors_per_page;
 277
 278         if (NULL ==  (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
 279                 return -ENOMEM;
 280
 281         vsg->state = dr_via_desc_pages_alloc;
 282         for (i = 0; i < vsg->num_desc_pages; ++i) {
 283                 if (NULL == (vsg->desc_pages[i] =
 284                              (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
 285                         return -ENOMEM;
 286         }
 287         DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
 288                   vsg->num_desc);
 289         return 0;
 290 }
 291
 292 static void
 293 via_abort_dmablit(struct drm_device *dev, int engine)
 294 {
 295         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 296
 297         via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
 298 }
 299
 300 static void
 301 via_dmablit_engine_off(struct drm_device *dev, int engine)
 302 {
 303         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 304
 305         via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
 306 }
 307
 308
 309
 310 /*
 311  * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
 312  * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
 313  * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
 314  * the workqueue task takes care of processing associated with the old blit.
 315  */
 316
 317 void
 318 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
 319 {
 320         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 321         drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
 322         int cur;
 323         int done_transfer;
 324         unsigned long irqsave = 0;
 325         uint32_t status = 0;
 326
 327         DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
 328                   engine, from_irq, (unsigned long) blitq);
 329
 330         if (from_irq)
 331                 spin_lock(&blitq->blit_lock);
 332         else
 333                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 334
 335         done_transfer = blitq->is_active &&
 336           ((status = via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
 337         done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
 338
 339         cur = blitq->cur;
 340         if (done_transfer) {
 341
 342                 blitq->blits[cur]->aborted = blitq->aborting;
 343                 blitq->done_blit_handle++;
 344                 wake_up(blitq->blit_queue + cur);
 345
 346                 cur++;
 347                 if (cur >= VIA_NUM_BLIT_SLOTS)
 348                         cur = 0;
 349                 blitq->cur = cur;
 350
 351                 /*
 352                  * Clear transfer done flag.
 353                  */
 354
 355                 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04,  VIA_DMA_CSR_TD);
 356
 357                 blitq->is_active = 0;
 358                 blitq->aborting = 0;
 359                 schedule_work(&blitq->wq);
 360
 361         } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
 362
 363                 /*
 364                  * Abort transfer after one second.
 365                  */
 366
 367                 via_abort_dmablit(dev, engine);
 368                 blitq->aborting = 1;
 369                 blitq->end = jiffies + HZ;
 370         }
 371
 372         if (!blitq->is_active) {
 373                 if (blitq->num_outstanding) {
 374                         via_fire_dmablit(dev, blitq->blits[cur], engine);
 375                         blitq->is_active = 1;
 376                         blitq->cur = cur;
 377                         blitq->num_outstanding--;
 378                         blitq->end = jiffies + HZ;
 379                         if (!timer_pending(&blitq->poll_timer))
 380                                 mod_timer(&blitq->poll_timer, jiffies + 1);
 381                 } else {
 382                         if (timer_pending(&blitq->poll_timer))
 383                                 del_timer(&blitq->poll_timer);
 384                         via_dmablit_engine_off(dev, engine);
 385                 }
 386         }
 387
 388         if (from_irq)
 389                 spin_unlock(&blitq->blit_lock);
 390         else
 391                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 392 }
 393
 394
 395
 396 /*
 397  * Check whether this blit is still active, performing necessary locking.
 398  */
 399
 400 static int
 401 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
 402 {
 403         unsigned long irqsave;
 404         uint32_t slot;
 405         int active;
 406
 407         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 408
 409         /*
 410          * Allow for handle wraparounds.
 411          */
 412
 413         active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
 414                 ((blitq->cur_blit_handle - handle) <= (1 << 23));
 415
 416         if (queue && active) {
 417                 slot = handle - blitq->done_blit_handle + blitq->cur - 1;
 418                 if (slot >= VIA_NUM_BLIT_SLOTS)
 419                         slot -= VIA_NUM_BLIT_SLOTS;
 420                 *queue = blitq->blit_queue + slot;
 421         }
 422
 423         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 424
 425         return active;
 426 }
 427
 428 /*
 429  * Sync. Wait for at least three seconds for the blit to be performed.
 430  */
 431
 432 static int
 433 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
 434 {
 435
 436         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 437         drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
 438         wait_queue_head_t *queue;
 439         int ret = 0;
 440
 441         if (via_dmablit_active(blitq, engine, handle, &queue)) {
 442                 VIA_WAIT_ON(ret, *queue, 3 * HZ,
 443                             !via_dmablit_active(blitq, engine, handle, NULL));
 444         }
 445         DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
 446                   handle, engine, ret);
 447
 448         return ret;
 449 }
 450
 451
 452 /*
 453  * A timer that regularly polls the blit engine in cases where we don't have interrupts:
 454  * a) Broken hardware (typically those that don't have any video capture facility).
 455  * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
 456  * The timer and hardware IRQ's can and do work in parallel. If the hardware has
 457  * irqs, it will shorten the latency somewhat.
 458  */
 459
 460
 461
 462 static void
 463 via_dmablit_timer(struct timer_list *t)
 464 {
 465         drm_via_blitq_t *blitq = from_timer(blitq, t, poll_timer);
 466         struct drm_device *dev = blitq->dev;
 467         int engine = (int)
 468                 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues);
 469
 470         DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
 471                   (unsigned long) jiffies);
 472
 473         via_dmablit_handler(dev, engine, 0);
 474
 475         if (!timer_pending(&blitq->poll_timer)) {
 476                 mod_timer(&blitq->poll_timer, jiffies + 1);
 477
 478                /*
 479                 * Rerun handler to delete timer if engines are off, and
 480                 * to shorten abort latency. This is a little nasty.
 481                 */
 482
 483                via_dmablit_handler(dev, engine, 0);
 484
 485         }
 486 }
 487
 488
 489
 490
 491 /*
 492  * Workqueue task that frees data and mappings associated with a blit.
 493  * Also wakes up waiting processes. Each of these tasks handles one
 494  * blit engine only and may not be called on each interrupt.
 495  */
 496
 497
 498 static void
 499 via_dmablit_workqueue(struct work_struct *work)
 500 {
 501         drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
 502         struct drm_device *dev = blitq->dev;
 503         unsigned long irqsave;
 504         drm_via_sg_info_t *cur_sg;
 505         int cur_released;
 506
 507
 508         DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
 509                   (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
 510
 511         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 512
 513         while (blitq->serviced != blitq->cur) {
 514
 515                 cur_released = blitq->serviced++;
 516
 517                 DRM_DEBUG("Releasing blit slot %d\n", cur_released);
 518
 519                 if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
 520                         blitq->serviced = 0;
 521
 522                 cur_sg = blitq->blits[cur_released];
 523                 blitq->num_free++;
 524
 525                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 526
 527                 wake_up(&blitq->busy_queue);
 528
 529                 via_free_sg_info(dev->pdev, cur_sg);
 530                 kfree(cur_sg);
 531
 532                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 533         }
 534
 535         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 536 }
 537
 538
 539 /*
 540  * Init all blit engines. Currently we use two, but some hardware have 4.
 541  */
 542
 543
 544 void
 545 via_init_dmablit(struct drm_device *dev)
 546 {
 547         int i, j;
 548         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 549         drm_via_blitq_t *blitq;
 550
 551         pci_set_master(dev->pdev);
 552
 553         for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
 554                 blitq = dev_priv->blit_queues + i;
 555                 blitq->dev = dev;
 556                 blitq->cur_blit_handle = 0;
 557                 blitq->done_blit_handle = 0;
 558                 blitq->head = 0;
 559                 blitq->cur = 0;
 560                 blitq->serviced = 0;
 561                 blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
 562                 blitq->num_outstanding = 0;
 563                 blitq->is_active = 0;
 564                 blitq->aborting = 0;
 565                 spin_lock_init(&blitq->blit_lock);
 566                 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
 567                         init_waitqueue_head(blitq->blit_queue + j);
 568                 init_waitqueue_head(&blitq->busy_queue);
 569                 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
 570                 timer_setup(&blitq->poll_timer, via_dmablit_timer, 0);
 571         }
 572 }
 573
 574 /*
 575  * Build all info and do all mappings required for a blit.
 576  */
 577
 578
 579 static int
 580 via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
 581 {
 582         int draw = xfer->to_fb;
 583         int ret = 0;
 584
 585         vsg->direction = (draw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 586         vsg->bounce_buffer = NULL;
 587
 588         vsg->state = dr_via_sg_init;
 589
 590         if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
 591                 DRM_ERROR("Zero size bitblt.\n");
 592                 return -EINVAL;
 593         }
 594
 595         /*
 596          * Below check is a driver limitation, not a hardware one. We
 597          * don't want to lock unused pages, and don't want to incoporate the
 598          * extra logic of avoiding them. Make sure there are no.
 599          * (Not a big limitation anyway.)
 600          */
 601
 602         if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
 603                 DRM_ERROR("Too large system memory stride. Stride: %d, "
 604                           "Length: %d\n", xfer->mem_stride, xfer->line_length);
 605                 return -EINVAL;
 606         }
 607
 608         if ((xfer->mem_stride == xfer->line_length) &&
 609            (xfer->fb_stride == xfer->line_length)) {
 610                 xfer->mem_stride *= xfer->num_lines;
 611                 xfer->line_length = xfer->mem_stride;
 612                 xfer->fb_stride = xfer->mem_stride;
 613                 xfer->num_lines = 1;
 614         }
 615
 616         /*
 617          * Don't lock an arbitrary large number of pages, since that causes a
 618          * DOS security hole.
 619          */
 620
 621         if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
 622                 DRM_ERROR("Too large PCI DMA bitblt.\n");
 623                 return -EINVAL;
 624         }
 625
 626         /*
 627          * we allow a negative fb stride to allow flipping of images in
 628          * transfer.
 629          */
 630
 631         if (xfer->mem_stride < xfer->line_length ||
 632                 abs(xfer->fb_stride) < xfer->line_length) {
 633                 DRM_ERROR("Invalid frame-buffer / memory stride.\n");
 634                 return -EINVAL;
 635         }
 636
 637         /*
 638          * A hardware bug seems to be worked around if system memory addresses start on
 639          * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
 640          * about this. Meanwhile, impose the following restrictions:
 641          */
 642
 643 #ifdef VIA_BUGFREE
 644         if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
 645             ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
 646                 DRM_ERROR("Invalid DRM bitblt alignment.\n");
 647                 return -EINVAL;
 648         }
 649 #else
 650         if ((((unsigned long)xfer->mem_addr & 15) ||
 651               ((unsigned long)xfer->fb_addr & 3)) ||
 652            ((xfer->num_lines > 1) &&
 653            ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
 654                 DRM_ERROR("Invalid DRM bitblt alignment.\n");
 655                 return -EINVAL;
 656         }
 657 #endif
 658
 659         if (0 != (ret = via_lock_all_dma_pages(vsg, xfer))) {
 660                 DRM_ERROR("Could not lock DMA pages.\n");
 661                 via_free_sg_info(dev->pdev, vsg);
 662                 return ret;
 663         }
 664
 665         via_map_blit_for_device(dev->pdev, xfer, vsg, 0);
 666         if (0 != (ret = via_alloc_desc_pages(vsg))) {
 667                 DRM_ERROR("Could not allocate DMA descriptor pages.\n");
 668                 via_free_sg_info(dev->pdev, vsg);
 669                 return ret;
 670         }
 671         via_map_blit_for_device(dev->pdev, xfer, vsg, 1);
 672
 673         return 0;
 674 }
 675
 676
 677 /*
 678  * Reserve one free slot in the blit queue. Will wait for one second for one
 679  * to become available. Otherwise -EBUSY is returned.
 680  */
 681
 682 static int
 683 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
 684 {
 685         int ret = 0;
 686         unsigned long irqsave;
 687
 688         DRM_DEBUG("Num free is %d\n", blitq->num_free);
 689         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 690         while (blitq->num_free == 0) {
 691                 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 692
 693                 VIA_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0);
 694                 if (ret)
 695                         return (-EINTR == ret) ? -EAGAIN : ret;
 696
 697                 spin_lock_irqsave(&blitq->blit_lock, irqsave);
 698         }
 699
 700         blitq->num_free--;
 701         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 702
 703         return 0;
 704 }
 705
 706 /*
 707  * Hand back a free slot if we changed our mind.
 708  */
 709
 710 static void
 711 via_dmablit_release_slot(drm_via_blitq_t *blitq)
 712 {
 713         unsigned long irqsave;
 714
 715         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 716         blitq->num_free++;
 717         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 718         wake_up(&blitq->busy_queue);
 719 }
 720
 721 /*
 722  * Grab a free slot. Build blit info and queue a blit.
 723  */
 724
 725
 726 static int
 727 via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
 728 {
 729         drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
 730         drm_via_sg_info_t *vsg;
 731         drm_via_blitq_t *blitq;
 732         int ret;
 733         int engine;
 734         unsigned long irqsave;
 735
 736         if (dev_priv == NULL) {
 737                 DRM_ERROR("Called without initialization.\n");
 738                 return -EINVAL;
 739         }
 740
 741         engine = (xfer->to_fb) ? 0 : 1;
 742         blitq = dev_priv->blit_queues + engine;
 743         if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
 744                 return ret;
 745         if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
 746                 via_dmablit_release_slot(blitq);
 747                 return -ENOMEM;
 748         }
 749         if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
 750                 via_dmablit_release_slot(blitq);
 751                 kfree(vsg);
 752                 return ret;
 753         }
 754         spin_lock_irqsave(&blitq->blit_lock, irqsave);
 755
 756         blitq->blits[blitq->head++] = vsg;
 757         if (blitq->head >= VIA_NUM_BLIT_SLOTS)
 758                 blitq->head = 0;
 759         blitq->num_outstanding++;
 760         xfer->sync.sync_handle = ++blitq->cur_blit_handle;
 761
 762         spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
 763         xfer->sync.engine = engine;
 764
 765         via_dmablit_handler(dev, engine, 0);
 766
 767         return 0;
 768 }
 769
 770 /*
 771  * Sync on a previously submitted blit. Note that the X server use signals extensively, and
 772  * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
 773  * case it returns with -EAGAIN for the signal to be delivered.
 774  * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
 775  */
 776
 777 int
 778 via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
 779 {
 780         drm_via_blitsync_t *sync = data;
 781         int err;
 782
 783         if (sync->engine >= VIA_NUM_BLIT_ENGINES)
 784                 return -EINVAL;
 785
 786         err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
 787
 788         if (-EINTR == err)
 789                 err = -EAGAIN;
 790
 791         return err;
 792 }
 793
 794
 795 /*
 796  * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
 797  * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
 798  * be reissued. See the above IOCTL code.
 799  */
 800
 801 int
 802 via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
 803 {
 804         drm_via_dmablit_t *xfer = data;
 805         int err;
 806
 807         err = via_dmablit(dev, xfer);
 808
 809         return err;
 810 }