2 * fam15h_power.c - AMD Family 15h processor power monitoring
4 * Copyright (c) 2011-2016 Advanced Micro Devices, Inc.
5 * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
8 * This driver is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License; either
10 * version 2 of the License, or (at your option) any later version.
12 * This driver is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15 * See the GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
21 #include <linux/err.h>
22 #include <linux/hwmon.h>
23 #include <linux/hwmon-sysfs.h>
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/bitops.h>
28 #include <linux/cpu.h>
29 #include <linux/cpumask.h>
30 #include <linux/time.h>
31 #include <linux/sched.h>
32 #include <asm/processor.h>
35 MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
36 MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
37 MODULE_LICENSE("GPL");
40 #define REG_NORTHBRIDGE_CAP 0xe8
43 #define REG_PROCESSOR_TDP 0x1b8
46 #define REG_TDP_RUNNING_AVERAGE 0xe0
47 #define REG_TDP_LIMIT3 0xe8
49 #define FAM15H_MIN_NUM_ATTRS 2
50 #define FAM15H_NUM_GROUPS 2
53 /* set maximum interval as 1 second */
54 #define MAX_INTERVAL 1000
56 #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a
57 #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
58 #define MSR_F15H_PTSC 0xc0010280
60 #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
62 struct fam15h_power_data {
64 unsigned int tdp_to_watts;
65 unsigned int base_tdp;
66 unsigned int processor_pwr_watts;
67 unsigned int cpu_pwr_sample_ratio;
68 const struct attribute_group *groups[FAM15H_NUM_GROUPS];
69 struct attribute_group group;
70 /* maximum accumulated power of a compute unit */
72 /* accumulated power of the compute units */
73 u64 cu_acc_power[MAX_CUS];
74 /* performance timestamp counter */
75 u64 cpu_sw_pwr_ptsc[MAX_CUS];
76 /* online/offline status of current compute unit */
78 unsigned long power_period;
81 static bool is_carrizo_or_later(void)
83 return boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60;
86 static ssize_t show_power(struct device *dev,
87 struct device_attribute *attr, char *buf)
89 u32 val, tdp_limit, running_avg_range;
90 s32 running_avg_capture;
92 struct fam15h_power_data *data = dev_get_drvdata(dev);
93 struct pci_dev *f4 = data->pdev;
95 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
96 REG_TDP_RUNNING_AVERAGE, &val);
99 * On Carrizo and later platforms, TdpRunAvgAccCap bit field
100 * is extended to 4:31 from 4:25.
102 if (is_carrizo_or_later()) {
103 running_avg_capture = val >> 4;
104 running_avg_capture = sign_extend32(running_avg_capture, 27);
106 running_avg_capture = (val >> 4) & 0x3fffff;
107 running_avg_capture = sign_extend32(running_avg_capture, 21);
110 running_avg_range = (val & 0xf) + 1;
112 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
113 REG_TDP_LIMIT3, &val);
116 * On Carrizo and later platforms, ApmTdpLimit bit field
117 * is extended to 16:31 from 16:28.
119 if (is_carrizo_or_later())
120 tdp_limit = val >> 16;
122 tdp_limit = (val >> 16) & 0x1fff;
124 curr_pwr_watts = ((u64)(tdp_limit +
125 data->base_tdp)) << running_avg_range;
126 curr_pwr_watts -= running_avg_capture;
127 curr_pwr_watts *= data->tdp_to_watts;
130 * Convert to microWatt
132 * power is in Watt provided as fixed point integer with
133 * scaling factor 1/(2^16). For conversion we use
134 * (10^6)/(2^16) = 15625/(2^10)
136 curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
137 return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
139 static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
141 static ssize_t show_power_crit(struct device *dev,
142 struct device_attribute *attr, char *buf)
144 struct fam15h_power_data *data = dev_get_drvdata(dev);
146 return sprintf(buf, "%u\n", data->processor_pwr_watts);
148 static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
150 static void do_read_registers_on_cu(void *_data)
152 struct fam15h_power_data *data = _data;
155 cpu = smp_processor_id();
158 * With the new x86 topology modelling, cpu core id actually
159 * is compute unit id.
161 cu = cpu_data(cpu).cpu_core_id;
163 rdmsrl_safe(MSR_F15H_CU_PWR_ACCUMULATOR, &data->cu_acc_power[cu]);
164 rdmsrl_safe(MSR_F15H_PTSC, &data->cpu_sw_pwr_ptsc[cu]);
170 * This function is only able to be called when CPUID
171 * Fn8000_0007:EDX[12] is set.
173 static int read_registers(struct fam15h_power_data *data)
175 int this_cpu, ret, cpu;
179 ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
183 memset(data->cu_on, 0, sizeof(int) * MAX_CUS);
186 this_cpu = smp_processor_id();
189 * Choose the first online core of each compute unit, and then
190 * read their MSR value of power and ptsc in a single IPI,
191 * because the MSR value of CPU core represent the compute
196 for_each_online_cpu(cpu) {
197 this_core = topology_core_id(cpu);
199 if (this_core == core)
204 /* get any CPU on this compute unit */
205 cpumask_set_cpu(cpumask_any(topology_sibling_cpumask(cpu)), mask);
208 if (cpumask_test_cpu(this_cpu, mask))
209 do_read_registers_on_cu(data);
211 smp_call_function_many(mask, do_read_registers_on_cu, data, true);
214 free_cpumask_var(mask);
219 static ssize_t acc_show_power(struct device *dev,
220 struct device_attribute *attr,
223 struct fam15h_power_data *data = dev_get_drvdata(dev);
224 u64 prev_cu_acc_power[MAX_CUS], prev_ptsc[MAX_CUS],
228 signed long leftover;
231 * With the new x86 topology modelling, x86_max_cores is the
232 * compute unit number.
234 cu_num = boot_cpu_data.x86_max_cores;
236 ret = read_registers(data);
240 for (cu = 0; cu < cu_num; cu++) {
241 prev_cu_acc_power[cu] = data->cu_acc_power[cu];
242 prev_ptsc[cu] = data->cpu_sw_pwr_ptsc[cu];
245 leftover = schedule_timeout_interruptible(msecs_to_jiffies(data->power_period));
249 ret = read_registers(data);
253 for (cu = 0, avg_acc = 0; cu < cu_num; cu++) {
254 /* check if current compute unit is online */
255 if (data->cu_on[cu] == 0)
258 if (data->cu_acc_power[cu] < prev_cu_acc_power[cu]) {
259 jdelta[cu] = data->max_cu_acc_power + data->cu_acc_power[cu];
260 jdelta[cu] -= prev_cu_acc_power[cu];
262 jdelta[cu] = data->cu_acc_power[cu] - prev_cu_acc_power[cu];
264 tdelta = data->cpu_sw_pwr_ptsc[cu] - prev_ptsc[cu];
265 jdelta[cu] *= data->cpu_pwr_sample_ratio * 1000;
266 do_div(jdelta[cu], tdelta);
268 /* the unit is microWatt */
269 avg_acc += jdelta[cu];
272 return sprintf(buf, "%llu\n", (unsigned long long)avg_acc);
274 static DEVICE_ATTR(power1_average, S_IRUGO, acc_show_power, NULL);
276 static ssize_t acc_show_power_period(struct device *dev,
277 struct device_attribute *attr,
280 struct fam15h_power_data *data = dev_get_drvdata(dev);
282 return sprintf(buf, "%lu\n", data->power_period);
285 static ssize_t acc_set_power_period(struct device *dev,
286 struct device_attribute *attr,
287 const char *buf, size_t count)
289 struct fam15h_power_data *data = dev_get_drvdata(dev);
293 ret = kstrtoul(buf, 10, &temp);
297 if (temp > MAX_INTERVAL)
300 /* the interval value should be greater than 0 */
304 data->power_period = temp;
308 static DEVICE_ATTR(power1_average_interval, S_IRUGO | S_IWUSR,
309 acc_show_power_period, acc_set_power_period);
311 static int fam15h_power_init_attrs(struct pci_dev *pdev,
312 struct fam15h_power_data *data)
314 int n = FAM15H_MIN_NUM_ATTRS;
315 struct attribute **fam15h_power_attrs;
316 struct cpuinfo_x86 *c = &boot_cpu_data;
318 if (c->x86 == 0x15 &&
319 (c->x86_model <= 0xf ||
320 (c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
323 /* check if processor supports accumulated power */
324 if (boot_cpu_has(X86_FEATURE_ACC_POWER))
327 fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
328 sizeof(*fam15h_power_attrs),
331 if (!fam15h_power_attrs)
335 fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
336 if (c->x86 == 0x15 &&
337 (c->x86_model <= 0xf ||
338 (c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
339 fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;
341 if (boot_cpu_has(X86_FEATURE_ACC_POWER)) {
342 fam15h_power_attrs[n++] = &dev_attr_power1_average.attr;
343 fam15h_power_attrs[n++] = &dev_attr_power1_average_interval.attr;
346 data->group.attrs = fam15h_power_attrs;
351 static bool should_load_on_this_node(struct pci_dev *f4)
355 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
356 REG_NORTHBRIDGE_CAP, &val);
357 if ((val & BIT(29)) && ((val >> 30) & 3))
364 * Newer BKDG versions have an updated recommendation on how to properly
365 * initialize the running average range (was: 0xE, now: 0x9). This avoids
366 * counter saturations resulting in bogus power readings.
367 * We correct this value ourselves to cope with older BIOSes.
369 static const struct pci_device_id affected_device[] = {
370 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
374 static void tweak_runavg_range(struct pci_dev *pdev)
379 * let this quirk apply only to the current version of the
380 * northbridge, since future versions may change the behavior
382 if (!pci_match_id(affected_device, pdev))
385 pci_bus_read_config_dword(pdev->bus,
386 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
387 REG_TDP_RUNNING_AVERAGE, &val);
388 if ((val & 0xf) != 0xe)
393 pci_bus_write_config_dword(pdev->bus,
394 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
395 REG_TDP_RUNNING_AVERAGE, val);
399 static int fam15h_power_resume(struct pci_dev *pdev)
401 tweak_runavg_range(pdev);
405 #define fam15h_power_resume NULL
408 static int fam15h_power_init_data(struct pci_dev *f4,
409 struct fam15h_power_data *data)
415 pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
416 data->base_tdp = val >> 16;
419 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
420 REG_TDP_LIMIT3, &val);
422 data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
423 tmp *= data->tdp_to_watts;
425 /* result not allowed to be >= 256W */
426 if ((tmp >> 16) >= 256)
428 "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
429 (unsigned int) (tmp >> 16));
431 /* convert to microWatt */
432 data->processor_pwr_watts = (tmp * 15625) >> 10;
434 ret = fam15h_power_init_attrs(f4, data);
439 /* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
440 if (!boot_cpu_has(X86_FEATURE_ACC_POWER))
444 * determine the ratio of the compute unit power accumulator
445 * sample period to the PTSC counter period by executing CPUID
448 data->cpu_pwr_sample_ratio = cpuid_ecx(0x80000007);
450 if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) {
451 pr_err("Failed to read max compute unit power accumulator MSR\n");
455 data->max_cu_acc_power = tmp;
458 * Milliseconds are a reasonable interval for the measurement.
459 * But it shouldn't set too long here, because several seconds
460 * would cause the read function to hang. So set default
463 data->power_period = 10;
465 return read_registers(data);
468 static int fam15h_power_probe(struct pci_dev *pdev,
469 const struct pci_device_id *id)
471 struct fam15h_power_data *data;
472 struct device *dev = &pdev->dev;
473 struct device *hwmon_dev;
477 * though we ignore every other northbridge, we still have to
478 * do the tweaking on _each_ node in MCM processors as the counters
479 * are working hand-in-hand
481 tweak_runavg_range(pdev);
483 if (!should_load_on_this_node(pdev))
486 data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
490 ret = fam15h_power_init_data(pdev, data);
496 data->groups[0] = &data->group;
498 hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
501 return PTR_ERR_OR_ZERO(hwmon_dev);
504 static const struct pci_device_id fam15h_power_id_table[] = {
505 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
506 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
507 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
508 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F4) },
509 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
510 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
513 MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
515 static struct pci_driver fam15h_power_driver = {
516 .name = "fam15h_power",
517 .id_table = fam15h_power_id_table,
518 .probe = fam15h_power_probe,
519 .resume = fam15h_power_resume,
522 module_pci_driver(fam15h_power_driver);