drivers/hwmon/it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8620E  Super I/O chip w/LPC interface
  15  *            IT8622E  Super I/O chip w/LPC interface
  16  *            IT8623E  Super I/O chip w/LPC interface
  17  *            IT8628E  Super I/O chip w/LPC interface
  18  *            IT8705F  Super I/O chip w/LPC interface
  19  *            IT8712F  Super I/O chip w/LPC interface
  20  *            IT8716F  Super I/O chip w/LPC interface
  21  *            IT8718F  Super I/O chip w/LPC interface
  22  *            IT8720F  Super I/O chip w/LPC interface
  23  *            IT8721F  Super I/O chip w/LPC interface
  24  *            IT8726F  Super I/O chip w/LPC interface
  25  *            IT8728F  Super I/O chip w/LPC interface
  26  *            IT8732F  Super I/O chip w/LPC interface
  27  *            IT8758E  Super I/O chip w/LPC interface
  28  *            IT8771E  Super I/O chip w/LPC interface
  29  *            IT8772E  Super I/O chip w/LPC interface
  30  *            IT8781F  Super I/O chip w/LPC interface
  31  *            IT8782F  Super I/O chip w/LPC interface
  32  *            IT8783E/F Super I/O chip w/LPC interface
  33  *            IT8786E  Super I/O chip w/LPC interface
  34  *            IT8790E  Super I/O chip w/LPC interface
  35  *            Sis950   A clone of the IT8705F
  36  *
  37  *  Copyright (C) 2001 Chris Gauthron
  38  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  39  *
  40  *  This program is free software; you can redistribute it and/or modify
  41  *  it under the terms of the GNU General Public License as published by
  42  *  the Free Software Foundation; either version 2 of the License, or
  43  *  (at your option) any later version.
  44  *
  45  *  This program is distributed in the hope that it will be useful,
  46  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  47  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  48  *  GNU General Public License for more details.
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/bitops.h>
  54 #include <linux/module.h>
  55 #include <linux/init.h>
  56 #include <linux/slab.h>
  57 #include <linux/jiffies.h>
  58 #include <linux/platform_device.h>
  59 #include <linux/hwmon.h>
  60 #include <linux/hwmon-sysfs.h>
  61 #include <linux/hwmon-vid.h>
  62 #include <linux/err.h>
  63 #include <linux/mutex.h>
  64 #include <linux/sysfs.h>
  65 #include <linux/string.h>
  66 #include <linux/dmi.h>
  67 #include <linux/acpi.h>
  68 #include <linux/io.h>
  69
  70 #define DRVNAME "it87"
  71
  72 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  73              it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
  74              it8620, it8622, it8628 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static struct platform_device *it87_pdev[2];
  81
  82 #define REG_2E  0x2e    /* The register to read/write */
  83 #define REG_4E  0x4e    /* Secondary register to read/write */
  84
  85 #define DEV     0x07    /* Register: Logical device select */
  86 #define PME     0x04    /* The device with the fan registers in it */
  87
  88 /* The device with the IT8718F/IT8720F VID value in it */
  89 #define GPIO    0x07
  90
  91 #define DEVID   0x20    /* Register: Device ID */
  92 #define DEVREV  0x22    /* Register: Device Revision */
  93
  94 static inline int superio_inb(int ioreg, int reg)
  95 {
  96         outb(reg, ioreg);
  97         return inb(ioreg + 1);
  98 }
  99
 100 static inline void superio_outb(int ioreg, int reg, int val)
 101 {
 102         outb(reg, ioreg);
 103         outb(val, ioreg + 1);
 104 }
 105
 106 static int superio_inw(int ioreg, int reg)
 107 {
 108         int val;
 109
 110         outb(reg++, ioreg);
 111         val = inb(ioreg + 1) << 8;
 112         outb(reg, ioreg);
 113         val |= inb(ioreg + 1);
 114         return val;
 115 }
 116
 117 static inline void superio_select(int ioreg, int ldn)
 118 {
 119         outb(DEV, ioreg);
 120         outb(ldn, ioreg + 1);
 121 }
 122
 123 static inline int superio_enter(int ioreg)
 124 {
 125         /*
 126          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 127          */
 128         if (!request_muxed_region(ioreg, 2, DRVNAME))
 129                 return -EBUSY;
 130
 131         outb(0x87, ioreg);
 132         outb(0x01, ioreg);
 133         outb(0x55, ioreg);
 134         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 135         return 0;
 136 }
 137
 138 static inline void superio_exit(int ioreg)
 139 {
 140         outb(0x02, ioreg);
 141         outb(0x02, ioreg + 1);
 142         release_region(ioreg, 2);
 143 }
 144
 145 /* Logical device 4 registers */
 146 #define IT8712F_DEVID 0x8712
 147 #define IT8705F_DEVID 0x8705
 148 #define IT8716F_DEVID 0x8716
 149 #define IT8718F_DEVID 0x8718
 150 #define IT8720F_DEVID 0x8720
 151 #define IT8721F_DEVID 0x8721
 152 #define IT8726F_DEVID 0x8726
 153 #define IT8728F_DEVID 0x8728
 154 #define IT8732F_DEVID 0x8732
 155 #define IT8771E_DEVID 0x8771
 156 #define IT8772E_DEVID 0x8772
 157 #define IT8781F_DEVID 0x8781
 158 #define IT8782F_DEVID 0x8782
 159 #define IT8783E_DEVID 0x8783
 160 #define IT8786E_DEVID 0x8786
 161 #define IT8790E_DEVID 0x8790
 162 #define IT8603E_DEVID 0x8603
 163 #define IT8620E_DEVID 0x8620
 164 #define IT8622E_DEVID 0x8622
 165 #define IT8623E_DEVID 0x8623
 166 #define IT8628E_DEVID 0x8628
 167 #define IT87_ACT_REG  0x30
 168 #define IT87_BASE_REG 0x60
 169
 170 /* Logical device 7 registers (IT8712F and later) */
 171 #define IT87_SIO_GPIO1_REG      0x25
 172 #define IT87_SIO_GPIO2_REG      0x26
 173 #define IT87_SIO_GPIO3_REG      0x27
 174 #define IT87_SIO_GPIO4_REG      0x28
 175 #define IT87_SIO_GPIO5_REG      0x29
 176 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 177 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 178 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 179 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 180 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 181
 182 /* Update battery voltage after every reading if true */
 183 static bool update_vbat;
 184
 185 /* Not all BIOSes properly configure the PWM registers */
 186 static bool fix_pwm_polarity;
 187
 188 /* Many IT87 constants specified below */
 189
 190 /* Length of ISA address segment */
 191 #define IT87_EXTENT 8
 192
 193 /* Length of ISA address segment for Environmental Controller */
 194 #define IT87_EC_EXTENT 2
 195
 196 /* Offset of EC registers from ISA base address */
 197 #define IT87_EC_OFFSET 5
 198
 199 /* Where are the ISA address/data registers relative to the EC base address */
 200 #define IT87_ADDR_REG_OFFSET 0
 201 #define IT87_DATA_REG_OFFSET 1
 202
 203 /*----- The IT87 registers -----*/
 204
 205 #define IT87_REG_CONFIG        0x00
 206
 207 #define IT87_REG_ALARM1        0x01
 208 #define IT87_REG_ALARM2        0x02
 209 #define IT87_REG_ALARM3        0x03
 210
 211 /*
 212  * The IT8718F and IT8720F have the VID value in a different register, in
 213  * Super-I/O configuration space.
 214  */
 215 #define IT87_REG_VID           0x0a
 216 /*
 217  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 218  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 219  * mode.
 220  */
 221 #define IT87_REG_FAN_DIV       0x0b
 222 #define IT87_REG_FAN_16BIT     0x0c
 223
 224 /*
 225  * Monitors:
 226  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 227  * - up to 6 temp (1 to 6)
 228  * - up to 6 fan (1 to 6)
 229  */
 230
 231 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 232 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 233 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 234 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 235 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 236
 237 #define IT87_REG_FAN_MAIN_CTRL 0x13
 238 #define IT87_REG_FAN_CTL       0x14
 239 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 240 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 241
 242 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 243                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 244
 245 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 246
 247 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 248 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 249 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 250 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 251
 252 #define IT87_REG_VIN_ENABLE    0x50
 253 #define IT87_REG_TEMP_ENABLE   0x51
 254 #define IT87_REG_TEMP_EXTRA    0x55
 255 #define IT87_REG_BEEP_ENABLE   0x5c
 256
 257 #define IT87_REG_CHIPID        0x58
 258
 259 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 260
 261 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 262 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 263
 264 #define IT87_REG_TEMP456_ENABLE 0x77
 265
 266 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 267 #define NUM_VIN_LIMIT           8
 268 #define NUM_TEMP                6
 269 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 270 #define NUM_TEMP_LIMIT          3
 271 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 272 #define NUM_FAN_DIV             3
 273 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 274 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 275
 276 struct it87_devices {
 277         const char *name;
 278         const char * const suffix;
 279         u32 features;
 280         u8 peci_mask;
 281         u8 old_peci_mask;
 282 };
 283
 284 #define FEAT_12MV_ADC           BIT(0)
 285 #define FEAT_NEWER_AUTOPWM      BIT(1)
 286 #define FEAT_OLD_AUTOPWM        BIT(2)
 287 #define FEAT_16BIT_FANS         BIT(3)
 288 #define FEAT_TEMP_OFFSET        BIT(4)
 289 #define FEAT_TEMP_PECI          BIT(5)
 290 #define FEAT_TEMP_OLD_PECI      BIT(6)
 291 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 292 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 293 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 294 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 295 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 296 #define FEAT_10_9MV_ADC         BIT(12)
 297 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 298 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 299 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 300 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 301 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 302 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 303
 304 static const struct it87_devices it87_devices[] = {
 305         [it87] = {
 306                 .name = "it87",
 307                 .suffix = "F",
 308                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 309         },
 310         [it8712] = {
 311                 .name = "it8712",
 312                 .suffix = "F",
 313                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 314                                                 /* may need to overwrite */
 315         },
 316         [it8716] = {
 317                 .name = "it8716",
 318                 .suffix = "F",
 319                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 320                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 321         },
 322         [it8718] = {
 323                 .name = "it8718",
 324                 .suffix = "F",
 325                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 326                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 327                   | FEAT_PWM_FREQ2,
 328                 .old_peci_mask = 0x4,
 329         },
 330         [it8720] = {
 331                 .name = "it8720",
 332                 .suffix = "F",
 333                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 334                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 335                   | FEAT_PWM_FREQ2,
 336                 .old_peci_mask = 0x4,
 337         },
 338         [it8721] = {
 339                 .name = "it8721",
 340                 .suffix = "F",
 341                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 342                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 343                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 344                   | FEAT_PWM_FREQ2,
 345                 .peci_mask = 0x05,
 346                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 347         },
 348         [it8728] = {
 349                 .name = "it8728",
 350                 .suffix = "F",
 351                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 352                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 353                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 354                 .peci_mask = 0x07,
 355         },
 356         [it8732] = {
 357                 .name = "it8732",
 358                 .suffix = "F",
 359                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 360                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 361                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 362                 .peci_mask = 0x07,
 363                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 364         },
 365         [it8771] = {
 366                 .name = "it8771",
 367                 .suffix = "E",
 368                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 369                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 370                   | FEAT_PWM_FREQ2,
 371                                 /* PECI: guesswork */
 372                                 /* 12mV ADC (OHM) */
 373                                 /* 16 bit fans (OHM) */
 374                                 /* three fans, always 16 bit (guesswork) */
 375                 .peci_mask = 0x07,
 376         },
 377         [it8772] = {
 378                 .name = "it8772",
 379                 .suffix = "E",
 380                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 381                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 382                   | FEAT_PWM_FREQ2,
 383                                 /* PECI (coreboot) */
 384                                 /* 12mV ADC (HWSensors4, OHM) */
 385                                 /* 16 bit fans (HWSensors4, OHM) */
 386                                 /* three fans, always 16 bit (datasheet) */
 387                 .peci_mask = 0x07,
 388         },
 389         [it8781] = {
 390                 .name = "it8781",
 391                 .suffix = "F",
 392                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 393                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 394                 .old_peci_mask = 0x4,
 395         },
 396         [it8782] = {
 397                 .name = "it8782",
 398                 .suffix = "F",
 399                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 400                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 401                 .old_peci_mask = 0x4,
 402         },
 403         [it8783] = {
 404                 .name = "it8783",
 405                 .suffix = "E/F",
 406                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 407                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 408                 .old_peci_mask = 0x4,
 409         },
 410         [it8786] = {
 411                 .name = "it8786",
 412                 .suffix = "E",
 413                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 414                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 415                   | FEAT_PWM_FREQ2,
 416                 .peci_mask = 0x07,
 417         },
 418         [it8790] = {
 419                 .name = "it8790",
 420                 .suffix = "E",
 421                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 422                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 423                   | FEAT_PWM_FREQ2,
 424                 .peci_mask = 0x07,
 425         },
 426         [it8603] = {
 427                 .name = "it8603",
 428                 .suffix = "E",
 429                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 430                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 431                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 432                 .peci_mask = 0x07,
 433         },
 434         [it8620] = {
 435                 .name = "it8620",
 436                 .suffix = "E",
 437                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 438                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 439                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 440                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 441                 .peci_mask = 0x07,
 442         },
 443         [it8622] = {
 444                 .name = "it8622",
 445                 .suffix = "E",
 446                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 447                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 448                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 449                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 450                 .peci_mask = 0x07,
 451         },
 452         [it8628] = {
 453                 .name = "it8628",
 454                 .suffix = "E",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 457                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 458                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 459                 .peci_mask = 0x07,
 460         },
 461 };
 462
 463 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 464 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 465 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 466 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 467 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 468 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 469 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 470                                  ((data)->peci_mask & BIT(nr)))
 471 #define has_temp_old_peci(data, nr) \
 472                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 473                                  ((data)->old_peci_mask & BIT(nr)))
 474 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 475 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 476                                                      FEAT_SIX_FANS))
 477 #define has_vid(data)           ((data)->features & FEAT_VID)
 478 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 479 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 480 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 481 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 482                                                      | FEAT_SIX_PWM))
 483 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 484 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 485 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 486 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 487
 488 struct it87_sio_data {
 489         enum chips type;
 490         /* Values read from Super-I/O config space */
 491         u8 revision;
 492         u8 vid_value;
 493         u8 beep_pin;
 494         u8 internal;    /* Internal sensors can be labeled */
 495         /* Features skipped based on config or DMI */
 496         u16 skip_in;
 497         u8 skip_vid;
 498         u8 skip_fan;
 499         u8 skip_pwm;
 500         u8 skip_temp;
 501 };
 502
 503 /*
 504  * For each registered chip, we need to keep some data in memory.
 505  * The structure is dynamically allocated.
 506  */
 507 struct it87_data {
 508         const struct attribute_group *groups[7];
 509         enum chips type;
 510         u32 features;
 511         u8 peci_mask;
 512         u8 old_peci_mask;
 513
 514         unsigned short addr;
 515         const char *name;
 516         struct mutex update_lock;
 517         char valid;             /* !=0 if following fields are valid */
 518         unsigned long last_updated;     /* In jiffies */
 519
 520         u16 in_scaled;          /* Internal voltage sensors are scaled */
 521         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 522         u16 has_in;             /* Bitfield, voltage sensors enabled */
 523         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 524         u8 has_fan;             /* Bitfield, fans enabled */
 525         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 526         u8 has_temp;            /* Bitfield, temp sensors enabled */
 527         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 528         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 529         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 530         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 531         bool has_vid;           /* True if VID supported */
 532         u8 vid;                 /* Register encoding, combined */
 533         u8 vrm;
 534         u32 alarms;             /* Register encoding, combined */
 535         bool has_beep;          /* true if beep supported */
 536         u8 beeps;               /* Register encoding */
 537         u8 fan_main_ctrl;       /* Register value */
 538         u8 fan_ctl;             /* Register value */
 539
 540         /*
 541          * The following 3 arrays correspond to the same registers up to
 542          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 543          * 7, and we want to preserve settings on mode changes, so we have
 544          * to track all values separately.
 545          * Starting with the IT8721F, the manual PWM duty cycles are stored
 546          * in separate registers (8-bit values), so the separate tracking
 547          * is no longer needed, but it is still done to keep the driver
 548          * simple.
 549          */
 550         u8 has_pwm;             /* Bitfield, pwm control enabled */
 551         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 552         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 553         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 554
 555         /* Automatic fan speed control registers */
 556         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 557         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 558 };
 559
 560 static int adc_lsb(const struct it87_data *data, int nr)
 561 {
 562         int lsb;
 563
 564         if (has_12mv_adc(data))
 565                 lsb = 120;
 566         else if (has_10_9mv_adc(data))
 567                 lsb = 109;
 568         else
 569                 lsb = 160;
 570         if (data->in_scaled & BIT(nr))
 571                 lsb <<= 1;
 572         return lsb;
 573 }
 574
 575 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 576 {
 577         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 578         return clamp_val(val, 0, 255);
 579 }
 580
 581 static int in_from_reg(const struct it87_data *data, int nr, int val)
 582 {
 583         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 584 }
 585
 586 static inline u8 FAN_TO_REG(long rpm, int div)
 587 {
 588         if (rpm == 0)
 589                 return 255;
 590         rpm = clamp_val(rpm, 1, 1000000);
 591         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 592 }
 593
 594 static inline u16 FAN16_TO_REG(long rpm)
 595 {
 596         if (rpm == 0)
 597                 return 0xffff;
 598         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 599 }
 600
 601 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 602                                 1350000 / ((val) * (div)))
 603 /* The divider is fixed to 2 in 16-bit mode */
 604 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 605                              1350000 / ((val) * 2))
 606
 607 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 608                                     ((val) + 500) / 1000), -128, 127))
 609 #define TEMP_FROM_REG(val) ((val) * 1000)
 610
 611 static u8 pwm_to_reg(const struct it87_data *data, long val)
 612 {
 613         if (has_newer_autopwm(data))
 614                 return val;
 615         else
 616                 return val >> 1;
 617 }
 618
 619 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 620 {
 621         if (has_newer_autopwm(data))
 622                 return reg;
 623         else
 624                 return (reg & 0x7f) << 1;
 625 }
 626
 627 static int DIV_TO_REG(int val)
 628 {
 629         int answer = 0;
 630
 631         while (answer < 7 && (val >>= 1))
 632                 answer++;
 633         return answer;
 634 }
 635
 636 #define DIV_FROM_REG(val) BIT(val)
 637
 638 /*
 639  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 640  * depending on the chip type, to calculate the actual PWM frequency.
 641  *
 642  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 643  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 644  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 645  * sometimes just one. It is unknown if this is a datasheet error or real,
 646  * so this is ignored for now.
 647  */
 648 static const unsigned int pwm_freq[8] = {
 649         48000000,
 650         24000000,
 651         12000000,
 652         8000000,
 653         6000000,
 654         3000000,
 655         1500000,
 656         750000,
 657 };
 658
 659 /*
 660  * Must be called with data->update_lock held, except during initialization.
 661  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 662  * would slow down the IT87 access and should not be necessary.
 663  */
 664 static int it87_read_value(struct it87_data *data, u8 reg)
 665 {
 666         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 667         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 668 }
 669
 670 /*
 671  * Must be called with data->update_lock held, except during initialization.
 672  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 673  * would slow down the IT87 access and should not be necessary.
 674  */
 675 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 676 {
 677         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 678         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 679 }
 680
 681 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 682 {
 683         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 684         if (has_newer_autopwm(data)) {
 685                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 686                 data->pwm_duty[nr] = it87_read_value(data,
 687                                                      IT87_REG_PWM_DUTY[nr]);
 688         } else {
 689                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 690                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 691                 else                            /* Manual mode */
 692                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 693         }
 694
 695         if (has_old_autopwm(data)) {
 696                 int i;
 697
 698                 for (i = 0; i < 5 ; i++)
 699                         data->auto_temp[nr][i] = it87_read_value(data,
 700                                                 IT87_REG_AUTO_TEMP(nr, i));
 701                 for (i = 0; i < 3 ; i++)
 702                         data->auto_pwm[nr][i] = it87_read_value(data,
 703                                                 IT87_REG_AUTO_PWM(nr, i));
 704         } else if (has_newer_autopwm(data)) {
 705                 int i;
 706
 707                 /*
 708                  * 0: temperature hysteresis (base + 5)
 709                  * 1: fan off temperature (base + 0)
 710                  * 2: fan start temperature (base + 1)
 711                  * 3: fan max temperature (base + 2)
 712                  */
 713                 data->auto_temp[nr][0] =
 714                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 715
 716                 for (i = 0; i < 3 ; i++)
 717                         data->auto_temp[nr][i + 1] =
 718                                 it87_read_value(data,
 719                                                 IT87_REG_AUTO_TEMP(nr, i));
 720                 /*
 721                  * 0: start pwm value (base + 3)
 722                  * 1: pwm slope (base + 4, 1/8th pwm)
 723                  */
 724                 data->auto_pwm[nr][0] =
 725                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 726                 data->auto_pwm[nr][1] =
 727                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 728         }
 729 }
 730
 731 static struct it87_data *it87_update_device(struct device *dev)
 732 {
 733         struct it87_data *data = dev_get_drvdata(dev);
 734         int i;
 735
 736         mutex_lock(&data->update_lock);
 737
 738         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 739             !data->valid) {
 740                 if (update_vbat) {
 741                         /*
 742                          * Cleared after each update, so reenable.  Value
 743                          * returned by this read will be previous value
 744                          */
 745                         it87_write_value(data, IT87_REG_CONFIG,
 746                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 747                 }
 748                 for (i = 0; i < NUM_VIN; i++) {
 749                         if (!(data->has_in & BIT(i)))
 750                                 continue;
 751
 752                         data->in[i][0] =
 753                                 it87_read_value(data, IT87_REG_VIN[i]);
 754
 755                         /* VBAT and AVCC don't have limit registers */
 756                         if (i >= NUM_VIN_LIMIT)
 757                                 continue;
 758
 759                         data->in[i][1] =
 760                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 761                         data->in[i][2] =
 762                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 763                 }
 764
 765                 for (i = 0; i < NUM_FAN; i++) {
 766                         /* Skip disabled fans */
 767                         if (!(data->has_fan & BIT(i)))
 768                                 continue;
 769
 770                         data->fan[i][1] =
 771                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 772                         data->fan[i][0] = it87_read_value(data,
 773                                        IT87_REG_FAN[i]);
 774                         /* Add high byte if in 16-bit mode */
 775                         if (has_16bit_fans(data)) {
 776                                 data->fan[i][0] |= it87_read_value(data,
 777                                                 IT87_REG_FANX[i]) << 8;
 778                                 data->fan[i][1] |= it87_read_value(data,
 779                                                 IT87_REG_FANX_MIN[i]) << 8;
 780                         }
 781                 }
 782                 for (i = 0; i < NUM_TEMP; i++) {
 783                         if (!(data->has_temp & BIT(i)))
 784                                 continue;
 785                         data->temp[i][0] =
 786                                 it87_read_value(data, IT87_REG_TEMP(i));
 787
 788                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 789                                 data->temp[i][3] =
 790                                   it87_read_value(data,
 791                                                   IT87_REG_TEMP_OFFSET[i]);
 792
 793                         if (i >= NUM_TEMP_LIMIT)
 794                                 continue;
 795
 796                         data->temp[i][1] =
 797                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 798                         data->temp[i][2] =
 799                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 800                 }
 801
 802                 /* Newer chips don't have clock dividers */
 803                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 804                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 805                         data->fan_div[0] = i & 0x07;
 806                         data->fan_div[1] = (i >> 3) & 0x07;
 807                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 808                 }
 809
 810                 data->alarms =
 811                         it87_read_value(data, IT87_REG_ALARM1) |
 812                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 813                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 814                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 815
 816                 data->fan_main_ctrl = it87_read_value(data,
 817                                 IT87_REG_FAN_MAIN_CTRL);
 818                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 819                 for (i = 0; i < NUM_PWM; i++) {
 820                         if (!(data->has_pwm & BIT(i)))
 821                                 continue;
 822                         it87_update_pwm_ctrl(data, i);
 823                 }
 824
 825                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 826                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 827                 /*
 828                  * The IT8705F does not have VID capability.
 829                  * The IT8718F and later don't use IT87_REG_VID for the
 830                  * same purpose.
 831                  */
 832                 if (data->type == it8712 || data->type == it8716) {
 833                         data->vid = it87_read_value(data, IT87_REG_VID);
 834                         /*
 835                          * The older IT8712F revisions had only 5 VID pins,
 836                          * but we assume it is always safe to read 6 bits.
 837                          */
 838                         data->vid &= 0x3f;
 839                 }
 840                 data->last_updated = jiffies;
 841                 data->valid = 1;
 842         }
 843
 844         mutex_unlock(&data->update_lock);
 845
 846         return data;
 847 }
 848
 849 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 850                        char *buf)
 851 {
 852         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 853         struct it87_data *data = it87_update_device(dev);
 854         int index = sattr->index;
 855         int nr = sattr->nr;
 856
 857         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 858 }
 859
 860 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 861                       const char *buf, size_t count)
 862 {
 863         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 864         struct it87_data *data = dev_get_drvdata(dev);
 865         int index = sattr->index;
 866         int nr = sattr->nr;
 867         unsigned long val;
 868
 869         if (kstrtoul(buf, 10, &val) < 0)
 870                 return -EINVAL;
 871
 872         mutex_lock(&data->update_lock);
 873         data->in[nr][index] = in_to_reg(data, nr, val);
 874         it87_write_value(data,
 875                          index == 1 ? IT87_REG_VIN_MIN(nr)
 876                                     : IT87_REG_VIN_MAX(nr),
 877                          data->in[nr][index]);
 878         mutex_unlock(&data->update_lock);
 879         return count;
 880 }
 881
 882 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 883 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 884                             0, 1);
 885 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 886                             0, 2);
 887
 888 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 889 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 890                             1, 1);
 891 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 892                             1, 2);
 893
 894 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 895 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 896                             2, 1);
 897 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 898                             2, 2);
 899
 900 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 901 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 902                             3, 1);
 903 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 904                             3, 2);
 905
 906 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 907 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 908                             4, 1);
 909 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 910                             4, 2);
 911
 912 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 913 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 914                             5, 1);
 915 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 916                             5, 2);
 917
 918 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 919 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 920                             6, 1);
 921 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 922                             6, 2);
 923
 924 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 925 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 926                             7, 1);
 927 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 928                             7, 2);
 929
 930 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 931 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 932 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 933 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 934 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 935
 936 /* Up to 6 temperatures */
 937 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 938                          char *buf)
 939 {
 940         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 941         int nr = sattr->nr;
 942         int index = sattr->index;
 943         struct it87_data *data = it87_update_device(dev);
 944
 945         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 946 }
 947
 948 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 949                         const char *buf, size_t count)
 950 {
 951         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 952         int nr = sattr->nr;
 953         int index = sattr->index;
 954         struct it87_data *data = dev_get_drvdata(dev);
 955         long val;
 956         u8 reg, regval;
 957
 958         if (kstrtol(buf, 10, &val) < 0)
 959                 return -EINVAL;
 960
 961         mutex_lock(&data->update_lock);
 962
 963         switch (index) {
 964         default:
 965         case 1:
 966                 reg = IT87_REG_TEMP_LOW(nr);
 967                 break;
 968         case 2:
 969                 reg = IT87_REG_TEMP_HIGH(nr);
 970                 break;
 971         case 3:
 972                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 973                 if (!(regval & 0x80)) {
 974                         regval |= 0x80;
 975                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 976                 }
 977                 data->valid = 0;
 978                 reg = IT87_REG_TEMP_OFFSET[nr];
 979                 break;
 980         }
 981
 982         data->temp[nr][index] = TEMP_TO_REG(val);
 983         it87_write_value(data, reg, data->temp[nr][index]);
 984         mutex_unlock(&data->update_lock);
 985         return count;
 986 }
 987
 988 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 989 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 990                             0, 1);
 991 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 992                             0, 2);
 993 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
 994                             set_temp, 0, 3);
 995 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
 996 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 997                             1, 1);
 998 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 999                             1, 2);
1000 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1001                             set_temp, 1, 3);
1002 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1003 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1004                             2, 1);
1005 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1006                             2, 2);
1007 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1008                             set_temp, 2, 3);
1009 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1010 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1011 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1012
1013 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1014                               char *buf)
1015 {
1016         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1017         int nr = sensor_attr->index;
1018         struct it87_data *data = it87_update_device(dev);
1019         u8 reg = data->sensor;      /* In case value is updated while used */
1020         u8 extra = data->extra;
1021
1022         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1023             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1024                 return sprintf(buf, "6\n");  /* Intel PECI */
1025         if (reg & (1 << nr))
1026                 return sprintf(buf, "3\n");  /* thermal diode */
1027         if (reg & (8 << nr))
1028                 return sprintf(buf, "4\n");  /* thermistor */
1029         return sprintf(buf, "0\n");      /* disabled */
1030 }
1031
1032 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1033                              const char *buf, size_t count)
1034 {
1035         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1036         int nr = sensor_attr->index;
1037
1038         struct it87_data *data = dev_get_drvdata(dev);
1039         long val;
1040         u8 reg, extra;
1041
1042         if (kstrtol(buf, 10, &val) < 0)
1043                 return -EINVAL;
1044
1045         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1046         reg &= ~(1 << nr);
1047         reg &= ~(8 << nr);
1048         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1049                 reg &= 0x3f;
1050         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1051         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1052                 extra &= 0x7f;
1053         if (val == 2) { /* backwards compatibility */
1054                 dev_warn(dev,
1055                          "Sensor type 2 is deprecated, please use 4 instead\n");
1056                 val = 4;
1057         }
1058         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1059         if (val == 3)
1060                 reg |= 1 << nr;
1061         else if (val == 4)
1062                 reg |= 8 << nr;
1063         else if (has_temp_peci(data, nr) && val == 6)
1064                 reg |= (nr + 1) << 6;
1065         else if (has_temp_old_peci(data, nr) && val == 6)
1066                 extra |= 0x80;
1067         else if (val != 0)
1068                 return -EINVAL;
1069
1070         mutex_lock(&data->update_lock);
1071         data->sensor = reg;
1072         data->extra = extra;
1073         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1074         if (has_temp_old_peci(data, nr))
1075                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1076         data->valid = 0;        /* Force cache refresh */
1077         mutex_unlock(&data->update_lock);
1078         return count;
1079 }
1080
1081 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1082                           set_temp_type, 0);
1083 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1084                           set_temp_type, 1);
1085 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1086                           set_temp_type, 2);
1087
1088 /* 6 Fans */
1089
1090 static int pwm_mode(const struct it87_data *data, int nr)
1091 {
1092         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1093                 return 0;                               /* Full speed */
1094         if (data->pwm_ctrl[nr] & 0x80)
1095                 return 2;                               /* Automatic mode */
1096         if ((data->type == it8603 || nr >= 3) &&
1097             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1098                 return 0;                       /* Full speed */
1099
1100         return 1;                               /* Manual mode */
1101 }
1102
1103 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1104                         char *buf)
1105 {
1106         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1107         int nr = sattr->nr;
1108         int index = sattr->index;
1109         int speed;
1110         struct it87_data *data = it87_update_device(dev);
1111
1112         speed = has_16bit_fans(data) ?
1113                 FAN16_FROM_REG(data->fan[nr][index]) :
1114                 FAN_FROM_REG(data->fan[nr][index],
1115                              DIV_FROM_REG(data->fan_div[nr]));
1116         return sprintf(buf, "%d\n", speed);
1117 }
1118
1119 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1120                             char *buf)
1121 {
1122         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1123         struct it87_data *data = it87_update_device(dev);
1124         int nr = sensor_attr->index;
1125
1126         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1127 }
1128
1129 static ssize_t show_pwm_enable(struct device *dev,
1130                                struct device_attribute *attr, char *buf)
1131 {
1132         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1133         struct it87_data *data = it87_update_device(dev);
1134         int nr = sensor_attr->index;
1135
1136         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1137 }
1138
1139 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1140                         char *buf)
1141 {
1142         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1143         struct it87_data *data = it87_update_device(dev);
1144         int nr = sensor_attr->index;
1145
1146         return sprintf(buf, "%d\n",
1147                        pwm_from_reg(data, data->pwm_duty[nr]));
1148 }
1149
1150 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1151                              char *buf)
1152 {
1153         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1154         struct it87_data *data = it87_update_device(dev);
1155         int nr = sensor_attr->index;
1156         unsigned int freq;
1157         int index;
1158
1159         if (has_pwm_freq2(data) && nr == 1)
1160                 index = (data->extra >> 4) & 0x07;
1161         else
1162                 index = (data->fan_ctl >> 4) & 0x07;
1163
1164         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1165
1166         return sprintf(buf, "%u\n", freq);
1167 }
1168
1169 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1170                        const char *buf, size_t count)
1171 {
1172         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1173         int nr = sattr->nr;
1174         int index = sattr->index;
1175
1176         struct it87_data *data = dev_get_drvdata(dev);
1177         long val;
1178         u8 reg;
1179
1180         if (kstrtol(buf, 10, &val) < 0)
1181                 return -EINVAL;
1182
1183         mutex_lock(&data->update_lock);
1184
1185         if (has_16bit_fans(data)) {
1186                 data->fan[nr][index] = FAN16_TO_REG(val);
1187                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1188                                  data->fan[nr][index] & 0xff);
1189                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1190                                  data->fan[nr][index] >> 8);
1191         } else {
1192                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1193                 switch (nr) {
1194                 case 0:
1195                         data->fan_div[nr] = reg & 0x07;
1196                         break;
1197                 case 1:
1198                         data->fan_div[nr] = (reg >> 3) & 0x07;
1199                         break;
1200                 case 2:
1201                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1202                         break;
1203                 }
1204                 data->fan[nr][index] =
1205                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1206                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1207                                  data->fan[nr][index]);
1208         }
1209
1210         mutex_unlock(&data->update_lock);
1211         return count;
1212 }
1213
1214 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1215                            const char *buf, size_t count)
1216 {
1217         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1218         struct it87_data *data = dev_get_drvdata(dev);
1219         int nr = sensor_attr->index;
1220         unsigned long val;
1221         int min;
1222         u8 old;
1223
1224         if (kstrtoul(buf, 10, &val) < 0)
1225                 return -EINVAL;
1226
1227         mutex_lock(&data->update_lock);
1228         old = it87_read_value(data, IT87_REG_FAN_DIV);
1229
1230         /* Save fan min limit */
1231         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1232
1233         switch (nr) {
1234         case 0:
1235         case 1:
1236                 data->fan_div[nr] = DIV_TO_REG(val);
1237                 break;
1238         case 2:
1239                 if (val < 8)
1240                         data->fan_div[nr] = 1;
1241                 else
1242                         data->fan_div[nr] = 3;
1243         }
1244         val = old & 0x80;
1245         val |= (data->fan_div[0] & 0x07);
1246         val |= (data->fan_div[1] & 0x07) << 3;
1247         if (data->fan_div[2] == 3)
1248                 val |= 0x1 << 6;
1249         it87_write_value(data, IT87_REG_FAN_DIV, val);
1250
1251         /* Restore fan min limit */
1252         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1253         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1254
1255         mutex_unlock(&data->update_lock);
1256         return count;
1257 }
1258
1259 /* Returns 0 if OK, -EINVAL otherwise */
1260 static int check_trip_points(struct device *dev, int nr)
1261 {
1262         const struct it87_data *data = dev_get_drvdata(dev);
1263         int i, err = 0;
1264
1265         if (has_old_autopwm(data)) {
1266                 for (i = 0; i < 3; i++) {
1267                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1268                                 err = -EINVAL;
1269                 }
1270                 for (i = 0; i < 2; i++) {
1271                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1272                                 err = -EINVAL;
1273                 }
1274         } else if (has_newer_autopwm(data)) {
1275                 for (i = 1; i < 3; i++) {
1276                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1277                                 err = -EINVAL;
1278                 }
1279         }
1280
1281         if (err) {
1282                 dev_err(dev,
1283                         "Inconsistent trip points, not switching to automatic mode\n");
1284                 dev_err(dev, "Adjust the trip points and try again\n");
1285         }
1286         return err;
1287 }
1288
1289 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1290                               const char *buf, size_t count)
1291 {
1292         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1293         struct it87_data *data = dev_get_drvdata(dev);
1294         int nr = sensor_attr->index;
1295         long val;
1296
1297         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1298                 return -EINVAL;
1299
1300         /* Check trip points before switching to automatic mode */
1301         if (val == 2) {
1302                 if (check_trip_points(dev, nr) < 0)
1303                         return -EINVAL;
1304         }
1305
1306         mutex_lock(&data->update_lock);
1307
1308         if (val == 0) {
1309                 if (nr < 3 && data->type != it8603) {
1310                         int tmp;
1311                         /* make sure the fan is on when in on/off mode */
1312                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1313                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1314                         /* set on/off mode */
1315                         data->fan_main_ctrl &= ~BIT(nr);
1316                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1317                                          data->fan_main_ctrl);
1318                 } else {
1319                         u8 ctrl;
1320
1321                         /* No on/off mode, set maximum pwm value */
1322                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1323                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1324                                          data->pwm_duty[nr]);
1325                         /* and set manual mode */
1326                         if (has_newer_autopwm(data)) {
1327                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1328                                         data->pwm_temp_map[nr];
1329                         } else {
1330                                 ctrl = data->pwm_duty[nr];
1331                         }
1332                         data->pwm_ctrl[nr] = ctrl;
1333                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1334                 }
1335         } else {
1336                 u8 ctrl;
1337
1338                 if (has_newer_autopwm(data)) {
1339                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1340                                 data->pwm_temp_map[nr];
1341                         if (val != 1)
1342                                 ctrl |= 0x80;
1343                 } else {
1344                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1345                 }
1346                 data->pwm_ctrl[nr] = ctrl;
1347                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1348
1349                 if (data->type != it8603 && nr < 3) {
1350                         /* set SmartGuardian mode */
1351                         data->fan_main_ctrl |= BIT(nr);
1352                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1353                                          data->fan_main_ctrl);
1354                 }
1355         }
1356
1357         mutex_unlock(&data->update_lock);
1358         return count;
1359 }
1360
1361 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1362                        const char *buf, size_t count)
1363 {
1364         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1365         struct it87_data *data = dev_get_drvdata(dev);
1366         int nr = sensor_attr->index;
1367         long val;
1368
1369         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1370                 return -EINVAL;
1371
1372         mutex_lock(&data->update_lock);
1373         it87_update_pwm_ctrl(data, nr);
1374         if (has_newer_autopwm(data)) {
1375                 /*
1376                  * If we are in automatic mode, the PWM duty cycle register
1377                  * is read-only so we can't write the value.
1378                  */
1379                 if (data->pwm_ctrl[nr] & 0x80) {
1380                         mutex_unlock(&data->update_lock);
1381                         return -EBUSY;
1382                 }
1383                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1384                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1385                                  data->pwm_duty[nr]);
1386         } else {
1387                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1388                 /*
1389                  * If we are in manual mode, write the duty cycle immediately;
1390                  * otherwise, just store it for later use.
1391                  */
1392                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1393                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1394                         it87_write_value(data, IT87_REG_PWM[nr],
1395                                          data->pwm_ctrl[nr]);
1396                 }
1397         }
1398         mutex_unlock(&data->update_lock);
1399         return count;
1400 }
1401
1402 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1403                             const char *buf, size_t count)
1404 {
1405         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1406         struct it87_data *data = dev_get_drvdata(dev);
1407         int nr = sensor_attr->index;
1408         unsigned long val;
1409         int i;
1410
1411         if (kstrtoul(buf, 10, &val) < 0)
1412                 return -EINVAL;
1413
1414         val = clamp_val(val, 0, 1000000);
1415         val *= has_newer_autopwm(data) ? 256 : 128;
1416
1417         /* Search for the nearest available frequency */
1418         for (i = 0; i < 7; i++) {
1419                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1420                         break;
1421         }
1422
1423         mutex_lock(&data->update_lock);
1424         if (nr == 0) {
1425                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1426                 data->fan_ctl |= i << 4;
1427                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1428         } else {
1429                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1430                 data->extra |= i << 4;
1431                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1432         }
1433         mutex_unlock(&data->update_lock);
1434
1435         return count;
1436 }
1437
1438 static ssize_t show_pwm_temp_map(struct device *dev,
1439                                  struct device_attribute *attr, char *buf)
1440 {
1441         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1442         struct it87_data *data = it87_update_device(dev);
1443         int nr = sensor_attr->index;
1444         int map;
1445
1446         map = data->pwm_temp_map[nr];
1447         if (map >= 3)
1448                 map = 0;        /* Should never happen */
1449         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1450                 map += 3;
1451
1452         return sprintf(buf, "%d\n", (int)BIT(map));
1453 }
1454
1455 static ssize_t set_pwm_temp_map(struct device *dev,
1456                                 struct device_attribute *attr, const char *buf,
1457                                 size_t count)
1458 {
1459         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1460         struct it87_data *data = dev_get_drvdata(dev);
1461         int nr = sensor_attr->index;
1462         long val;
1463         u8 reg;
1464
1465         if (kstrtol(buf, 10, &val) < 0)
1466                 return -EINVAL;
1467
1468         if (nr >= 3)
1469                 val -= 3;
1470
1471         switch (val) {
1472         case BIT(0):
1473                 reg = 0x00;
1474                 break;
1475         case BIT(1):
1476                 reg = 0x01;
1477                 break;
1478         case BIT(2):
1479                 reg = 0x02;
1480                 break;
1481         default:
1482                 return -EINVAL;
1483         }
1484
1485         mutex_lock(&data->update_lock);
1486         it87_update_pwm_ctrl(data, nr);
1487         data->pwm_temp_map[nr] = reg;
1488         /*
1489          * If we are in automatic mode, write the temp mapping immediately;
1490          * otherwise, just store it for later use.
1491          */
1492         if (data->pwm_ctrl[nr] & 0x80) {
1493                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1494                                                 data->pwm_temp_map[nr];
1495                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1496         }
1497         mutex_unlock(&data->update_lock);
1498         return count;
1499 }
1500
1501 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1502                              char *buf)
1503 {
1504         struct it87_data *data = it87_update_device(dev);
1505         struct sensor_device_attribute_2 *sensor_attr =
1506                         to_sensor_dev_attr_2(attr);
1507         int nr = sensor_attr->nr;
1508         int point = sensor_attr->index;
1509
1510         return sprintf(buf, "%d\n",
1511                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1512 }
1513
1514 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1515                             const char *buf, size_t count)
1516 {
1517         struct it87_data *data = dev_get_drvdata(dev);
1518         struct sensor_device_attribute_2 *sensor_attr =
1519                         to_sensor_dev_attr_2(attr);
1520         int nr = sensor_attr->nr;
1521         int point = sensor_attr->index;
1522         int regaddr;
1523         long val;
1524
1525         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1526                 return -EINVAL;
1527
1528         mutex_lock(&data->update_lock);
1529         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1530         if (has_newer_autopwm(data))
1531                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1532         else
1533                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1534         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1535         mutex_unlock(&data->update_lock);
1536         return count;
1537 }
1538
1539 static ssize_t show_auto_pwm_slope(struct device *dev,
1540                                    struct device_attribute *attr, char *buf)
1541 {
1542         struct it87_data *data = it87_update_device(dev);
1543         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1544         int nr = sensor_attr->index;
1545
1546         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1547 }
1548
1549 static ssize_t set_auto_pwm_slope(struct device *dev,
1550                                   struct device_attribute *attr,
1551                                   const char *buf, size_t count)
1552 {
1553         struct it87_data *data = dev_get_drvdata(dev);
1554         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1555         int nr = sensor_attr->index;
1556         unsigned long val;
1557
1558         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1559                 return -EINVAL;
1560
1561         mutex_lock(&data->update_lock);
1562         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1563         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1564                          data->auto_pwm[nr][1]);
1565         mutex_unlock(&data->update_lock);
1566         return count;
1567 }
1568
1569 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1570                               char *buf)
1571 {
1572         struct it87_data *data = it87_update_device(dev);
1573         struct sensor_device_attribute_2 *sensor_attr =
1574                         to_sensor_dev_attr_2(attr);
1575         int nr = sensor_attr->nr;
1576         int point = sensor_attr->index;
1577         int reg;
1578
1579         if (has_old_autopwm(data) || point)
1580                 reg = data->auto_temp[nr][point];
1581         else
1582                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1583
1584         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1585 }
1586
1587 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1588                              const char *buf, size_t count)
1589 {
1590         struct it87_data *data = dev_get_drvdata(dev);
1591         struct sensor_device_attribute_2 *sensor_attr =
1592                         to_sensor_dev_attr_2(attr);
1593         int nr = sensor_attr->nr;
1594         int point = sensor_attr->index;
1595         long val;
1596         int reg;
1597
1598         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1599                 return -EINVAL;
1600
1601         mutex_lock(&data->update_lock);
1602         if (has_newer_autopwm(data) && !point) {
1603                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1604                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1605                 data->auto_temp[nr][0] = reg;
1606                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1607         } else {
1608                 reg = TEMP_TO_REG(val);
1609                 data->auto_temp[nr][point] = reg;
1610                 if (has_newer_autopwm(data))
1611                         point--;
1612                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1613         }
1614         mutex_unlock(&data->update_lock);
1615         return count;
1616 }
1617
1618 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1619 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1620                             0, 1);
1621 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1622                           set_fan_div, 0);
1623
1624 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1625 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1626                             1, 1);
1627 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1628                           set_fan_div, 1);
1629
1630 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1631 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1632                             2, 1);
1633 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1634                           set_fan_div, 2);
1635
1636 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1637 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1638                             3, 1);
1639
1640 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1641 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1642                             4, 1);
1643
1644 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1645 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1646                             5, 1);
1647
1648 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1649                           show_pwm_enable, set_pwm_enable, 0);
1650 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1651 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1652                           set_pwm_freq, 0);
1653 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1654                           show_pwm_temp_map, set_pwm_temp_map, 0);
1655 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1656                             show_auto_pwm, set_auto_pwm, 0, 0);
1657 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1658                             show_auto_pwm, set_auto_pwm, 0, 1);
1659 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1660                             show_auto_pwm, set_auto_pwm, 0, 2);
1661 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1662                             show_auto_pwm, NULL, 0, 3);
1663 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1664                             show_auto_temp, set_auto_temp, 0, 1);
1665 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1666                             show_auto_temp, set_auto_temp, 0, 0);
1667 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1668                             show_auto_temp, set_auto_temp, 0, 2);
1669 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1670                             show_auto_temp, set_auto_temp, 0, 3);
1671 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1672                             show_auto_temp, set_auto_temp, 0, 4);
1673 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1674                             show_auto_pwm, set_auto_pwm, 0, 0);
1675 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1676                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1677
1678 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1679                           show_pwm_enable, set_pwm_enable, 1);
1680 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1681 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1682 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1683                           show_pwm_temp_map, set_pwm_temp_map, 1);
1684 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1685                             show_auto_pwm, set_auto_pwm, 1, 0);
1686 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1687                             show_auto_pwm, set_auto_pwm, 1, 1);
1688 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1689                             show_auto_pwm, set_auto_pwm, 1, 2);
1690 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1691                             show_auto_pwm, NULL, 1, 3);
1692 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1693                             show_auto_temp, set_auto_temp, 1, 1);
1694 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1695                             show_auto_temp, set_auto_temp, 1, 0);
1696 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1697                             show_auto_temp, set_auto_temp, 1, 2);
1698 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1699                             show_auto_temp, set_auto_temp, 1, 3);
1700 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1701                             show_auto_temp, set_auto_temp, 1, 4);
1702 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1703                             show_auto_pwm, set_auto_pwm, 1, 0);
1704 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1705                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1706
1707 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1708                           show_pwm_enable, set_pwm_enable, 2);
1709 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1710 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1711 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1712                           show_pwm_temp_map, set_pwm_temp_map, 2);
1713 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1714                             show_auto_pwm, set_auto_pwm, 2, 0);
1715 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1716                             show_auto_pwm, set_auto_pwm, 2, 1);
1717 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1718                             show_auto_pwm, set_auto_pwm, 2, 2);
1719 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1720                             show_auto_pwm, NULL, 2, 3);
1721 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1722                             show_auto_temp, set_auto_temp, 2, 1);
1723 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1724                             show_auto_temp, set_auto_temp, 2, 0);
1725 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1726                             show_auto_temp, set_auto_temp, 2, 2);
1727 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1728                             show_auto_temp, set_auto_temp, 2, 3);
1729 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1730                             show_auto_temp, set_auto_temp, 2, 4);
1731 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1732                             show_auto_pwm, set_auto_pwm, 2, 0);
1733 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1734                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1735
1736 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1737                           show_pwm_enable, set_pwm_enable, 3);
1738 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1739 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1740 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1741                           show_pwm_temp_map, set_pwm_temp_map, 3);
1742 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1743                             show_auto_temp, set_auto_temp, 2, 1);
1744 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1745                             show_auto_temp, set_auto_temp, 2, 0);
1746 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1747                             show_auto_temp, set_auto_temp, 2, 2);
1748 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1749                             show_auto_temp, set_auto_temp, 2, 3);
1750 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1751                             show_auto_pwm, set_auto_pwm, 3, 0);
1752 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1753                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1754
1755 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1756                           show_pwm_enable, set_pwm_enable, 4);
1757 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1758 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1759 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1760                           show_pwm_temp_map, set_pwm_temp_map, 4);
1761 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1762                             show_auto_temp, set_auto_temp, 2, 1);
1763 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1764                             show_auto_temp, set_auto_temp, 2, 0);
1765 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1766                             show_auto_temp, set_auto_temp, 2, 2);
1767 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1768                             show_auto_temp, set_auto_temp, 2, 3);
1769 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1770                             show_auto_pwm, set_auto_pwm, 4, 0);
1771 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1772                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1773
1774 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1775                           show_pwm_enable, set_pwm_enable, 5);
1776 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1777 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1778 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1779                           show_pwm_temp_map, set_pwm_temp_map, 5);
1780 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1781                             show_auto_temp, set_auto_temp, 2, 1);
1782 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1783                             show_auto_temp, set_auto_temp, 2, 0);
1784 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1785                             show_auto_temp, set_auto_temp, 2, 2);
1786 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1787                             show_auto_temp, set_auto_temp, 2, 3);
1788 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1789                             show_auto_pwm, set_auto_pwm, 5, 0);
1790 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1791                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1792
1793 /* Alarms */
1794 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1795                            char *buf)
1796 {
1797         struct it87_data *data = it87_update_device(dev);
1798
1799         return sprintf(buf, "%u\n", data->alarms);
1800 }
1801 static DEVICE_ATTR_RO(alarms);
1802
1803 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1804                           char *buf)
1805 {
1806         struct it87_data *data = it87_update_device(dev);
1807         int bitnr = to_sensor_dev_attr(attr)->index;
1808
1809         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1810 }
1811
1812 static ssize_t clear_intrusion(struct device *dev,
1813                                struct device_attribute *attr, const char *buf,
1814                                size_t count)
1815 {
1816         struct it87_data *data = dev_get_drvdata(dev);
1817         int config;
1818         long val;
1819
1820         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1821                 return -EINVAL;
1822
1823         mutex_lock(&data->update_lock);
1824         config = it87_read_value(data, IT87_REG_CONFIG);
1825         if (config < 0) {
1826                 count = config;
1827         } else {
1828                 config |= BIT(5);
1829                 it87_write_value(data, IT87_REG_CONFIG, config);
1830                 /* Invalidate cache to force re-read */
1831                 data->valid = 0;
1832         }
1833         mutex_unlock(&data->update_lock);
1834
1835         return count;
1836 }
1837
1838 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1839 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1840 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1841 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1842 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1843 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1844 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1845 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1846 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1847 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1848 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1849 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1850 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1851 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1852 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1853 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1854 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1855 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1856                           show_alarm, clear_intrusion, 4);
1857
1858 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1859                          char *buf)
1860 {
1861         struct it87_data *data = it87_update_device(dev);
1862         int bitnr = to_sensor_dev_attr(attr)->index;
1863
1864         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1865 }
1866
1867 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1868                         const char *buf, size_t count)
1869 {
1870         int bitnr = to_sensor_dev_attr(attr)->index;
1871         struct it87_data *data = dev_get_drvdata(dev);
1872         long val;
1873
1874         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1875                 return -EINVAL;
1876
1877         mutex_lock(&data->update_lock);
1878         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1879         if (val)
1880                 data->beeps |= BIT(bitnr);
1881         else
1882                 data->beeps &= ~BIT(bitnr);
1883         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1884         mutex_unlock(&data->update_lock);
1885         return count;
1886 }
1887
1888 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1889                           show_beep, set_beep, 1);
1890 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1891 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1892 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1893 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1894 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1895 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1896 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1897 /* fanX_beep writability is set later */
1898 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1899 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1900 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1901 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1902 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1903 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1904 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1905                           show_beep, set_beep, 2);
1906 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1907 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1908
1909 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1910                         char *buf)
1911 {
1912         struct it87_data *data = dev_get_drvdata(dev);
1913
1914         return sprintf(buf, "%u\n", data->vrm);
1915 }
1916
1917 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1918                          const char *buf, size_t count)
1919 {
1920         struct it87_data *data = dev_get_drvdata(dev);
1921         unsigned long val;
1922
1923         if (kstrtoul(buf, 10, &val) < 0)
1924                 return -EINVAL;
1925
1926         data->vrm = val;
1927
1928         return count;
1929 }
1930 static DEVICE_ATTR_RW(vrm);
1931
1932 static ssize_t cpu0_vid_show(struct device *dev,
1933                              struct device_attribute *attr, char *buf)
1934 {
1935         struct it87_data *data = it87_update_device(dev);
1936
1937         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1938 }
1939 static DEVICE_ATTR_RO(cpu0_vid);
1940
1941 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1942                           char *buf)
1943 {
1944         static const char * const labels[] = {
1945                 "+5V",
1946                 "5VSB",
1947                 "Vbat",
1948                 "AVCC",
1949         };
1950         static const char * const labels_it8721[] = {
1951                 "+3.3V",
1952                 "3VSB",
1953                 "Vbat",
1954                 "+3.3V",
1955         };
1956         struct it87_data *data = dev_get_drvdata(dev);
1957         int nr = to_sensor_dev_attr(attr)->index;
1958         const char *label;
1959
1960         if (has_vin3_5v(data) && nr == 0)
1961                 label = labels[0];
1962         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1963                 label = labels_it8721[nr];
1964         else
1965                 label = labels[nr];
1966
1967         return sprintf(buf, "%s\n", label);
1968 }
1969 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1970 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1971 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1972 /* AVCC3 */
1973 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1974
1975 static umode_t it87_in_is_visible(struct kobject *kobj,
1976                                   struct attribute *attr, int index)
1977 {
1978         struct device *dev = container_of(kobj, struct device, kobj);
1979         struct it87_data *data = dev_get_drvdata(dev);
1980         int i = index / 5;      /* voltage index */
1981         int a = index % 5;      /* attribute index */
1982
1983         if (index >= 40) {      /* in8 and higher only have input attributes */
1984                 i = index - 40 + 8;
1985                 a = 0;
1986         }
1987
1988         if (!(data->has_in & BIT(i)))
1989                 return 0;
1990
1991         if (a == 4 && !data->has_beep)
1992                 return 0;
1993
1994         return attr->mode;
1995 }
1996
1997 static struct attribute *it87_attributes_in[] = {
1998         &sensor_dev_attr_in0_input.dev_attr.attr,
1999         &sensor_dev_attr_in0_min.dev_attr.attr,
2000         &sensor_dev_attr_in0_max.dev_attr.attr,
2001         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2002         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2003
2004         &sensor_dev_attr_in1_input.dev_attr.attr,
2005         &sensor_dev_attr_in1_min.dev_attr.attr,
2006         &sensor_dev_attr_in1_max.dev_attr.attr,
2007         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2008         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2009
2010         &sensor_dev_attr_in2_input.dev_attr.attr,
2011         &sensor_dev_attr_in2_min.dev_attr.attr,
2012         &sensor_dev_attr_in2_max.dev_attr.attr,
2013         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2014         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2015
2016         &sensor_dev_attr_in3_input.dev_attr.attr,
2017         &sensor_dev_attr_in3_min.dev_attr.attr,
2018         &sensor_dev_attr_in3_max.dev_attr.attr,
2019         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2020         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2021
2022         &sensor_dev_attr_in4_input.dev_attr.attr,
2023         &sensor_dev_attr_in4_min.dev_attr.attr,
2024         &sensor_dev_attr_in4_max.dev_attr.attr,
2025         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2026         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2027
2028         &sensor_dev_attr_in5_input.dev_attr.attr,
2029         &sensor_dev_attr_in5_min.dev_attr.attr,
2030         &sensor_dev_attr_in5_max.dev_attr.attr,
2031         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2032         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2033
2034         &sensor_dev_attr_in6_input.dev_attr.attr,
2035         &sensor_dev_attr_in6_min.dev_attr.attr,
2036         &sensor_dev_attr_in6_max.dev_attr.attr,
2037         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2038         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2039
2040         &sensor_dev_attr_in7_input.dev_attr.attr,
2041         &sensor_dev_attr_in7_min.dev_attr.attr,
2042         &sensor_dev_attr_in7_max.dev_attr.attr,
2043         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2044         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2045
2046         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2047         &sensor_dev_attr_in9_input.dev_attr.attr,
2048         &sensor_dev_attr_in10_input.dev_attr.attr,
2049         &sensor_dev_attr_in11_input.dev_attr.attr,
2050         &sensor_dev_attr_in12_input.dev_attr.attr,
2051         NULL
2052 };
2053
2054 static const struct attribute_group it87_group_in = {
2055         .attrs = it87_attributes_in,
2056         .is_visible = it87_in_is_visible,
2057 };
2058
2059 static umode_t it87_temp_is_visible(struct kobject *kobj,
2060                                     struct attribute *attr, int index)
2061 {
2062         struct device *dev = container_of(kobj, struct device, kobj);
2063         struct it87_data *data = dev_get_drvdata(dev);
2064         int i = index / 7;      /* temperature index */
2065         int a = index % 7;      /* attribute index */
2066
2067         if (index >= 21) {
2068                 i = index - 21 + 3;
2069                 a = 0;
2070         }
2071
2072         if (!(data->has_temp & BIT(i)))
2073                 return 0;
2074
2075         if (a == 5 && !has_temp_offset(data))
2076                 return 0;
2077
2078         if (a == 6 && !data->has_beep)
2079                 return 0;
2080
2081         return attr->mode;
2082 }
2083
2084 static struct attribute *it87_attributes_temp[] = {
2085         &sensor_dev_attr_temp1_input.dev_attr.attr,
2086         &sensor_dev_attr_temp1_max.dev_attr.attr,
2087         &sensor_dev_attr_temp1_min.dev_attr.attr,
2088         &sensor_dev_attr_temp1_type.dev_attr.attr,
2089         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2090         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2091         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2092
2093         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2094         &sensor_dev_attr_temp2_max.dev_attr.attr,
2095         &sensor_dev_attr_temp2_min.dev_attr.attr,
2096         &sensor_dev_attr_temp2_type.dev_attr.attr,
2097         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2098         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2099         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2100
2101         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2102         &sensor_dev_attr_temp3_max.dev_attr.attr,
2103         &sensor_dev_attr_temp3_min.dev_attr.attr,
2104         &sensor_dev_attr_temp3_type.dev_attr.attr,
2105         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2106         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2107         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2108
2109         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2110         &sensor_dev_attr_temp5_input.dev_attr.attr,
2111         &sensor_dev_attr_temp6_input.dev_attr.attr,
2112         NULL
2113 };
2114
2115 static const struct attribute_group it87_group_temp = {
2116         .attrs = it87_attributes_temp,
2117         .is_visible = it87_temp_is_visible,
2118 };
2119
2120 static umode_t it87_is_visible(struct kobject *kobj,
2121                                struct attribute *attr, int index)
2122 {
2123         struct device *dev = container_of(kobj, struct device, kobj);
2124         struct it87_data *data = dev_get_drvdata(dev);
2125
2126         if ((index == 2 || index == 3) && !data->has_vid)
2127                 return 0;
2128
2129         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2130                 return 0;
2131
2132         return attr->mode;
2133 }
2134
2135 static struct attribute *it87_attributes[] = {
2136         &dev_attr_alarms.attr,
2137         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2138         &dev_attr_vrm.attr,                             /* 2 */
2139         &dev_attr_cpu0_vid.attr,                        /* 3 */
2140         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2141         &sensor_dev_attr_in7_label.dev_attr.attr,
2142         &sensor_dev_attr_in8_label.dev_attr.attr,
2143         &sensor_dev_attr_in9_label.dev_attr.attr,
2144         NULL
2145 };
2146
2147 static const struct attribute_group it87_group = {
2148         .attrs = it87_attributes,
2149         .is_visible = it87_is_visible,
2150 };
2151
2152 static umode_t it87_fan_is_visible(struct kobject *kobj,
2153                                    struct attribute *attr, int index)
2154 {
2155         struct device *dev = container_of(kobj, struct device, kobj);
2156         struct it87_data *data = dev_get_drvdata(dev);
2157         int i = index / 5;      /* fan index */
2158         int a = index % 5;      /* attribute index */
2159
2160         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2161                 i = (index - 15) / 4 + 3;
2162                 a = (index - 15) % 4;
2163         }
2164
2165         if (!(data->has_fan & BIT(i)))
2166                 return 0;
2167
2168         if (a == 3) {                           /* beep */
2169                 if (!data->has_beep)
2170                         return 0;
2171                 /* first fan beep attribute is writable */
2172                 if (i == __ffs(data->has_fan))
2173                         return attr->mode | S_IWUSR;
2174         }
2175
2176         if (a == 4 && has_16bit_fans(data))     /* divisor */
2177                 return 0;
2178
2179         return attr->mode;
2180 }
2181
2182 static struct attribute *it87_attributes_fan[] = {
2183         &sensor_dev_attr_fan1_input.dev_attr.attr,
2184         &sensor_dev_attr_fan1_min.dev_attr.attr,
2185         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2186         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2187         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2188
2189         &sensor_dev_attr_fan2_input.dev_attr.attr,
2190         &sensor_dev_attr_fan2_min.dev_attr.attr,
2191         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2192         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2193         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2194
2195         &sensor_dev_attr_fan3_input.dev_attr.attr,
2196         &sensor_dev_attr_fan3_min.dev_attr.attr,
2197         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2198         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2199         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2200
2201         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2202         &sensor_dev_attr_fan4_min.dev_attr.attr,
2203         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2204         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2205
2206         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2207         &sensor_dev_attr_fan5_min.dev_attr.attr,
2208         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2209         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2210
2211         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2212         &sensor_dev_attr_fan6_min.dev_attr.attr,
2213         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2214         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2215         NULL
2216 };
2217
2218 static const struct attribute_group it87_group_fan = {
2219         .attrs = it87_attributes_fan,
2220         .is_visible = it87_fan_is_visible,
2221 };
2222
2223 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2224                                    struct attribute *attr, int index)
2225 {
2226         struct device *dev = container_of(kobj, struct device, kobj);
2227         struct it87_data *data = dev_get_drvdata(dev);
2228         int i = index / 4;      /* pwm index */
2229         int a = index % 4;      /* attribute index */
2230
2231         if (!(data->has_pwm & BIT(i)))
2232                 return 0;
2233
2234         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2235         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2236                 return attr->mode | S_IWUSR;
2237
2238         /* pwm2_freq is writable if there are two pwm frequency selects */
2239         if (has_pwm_freq2(data) && i == 1 && a == 2)
2240                 return attr->mode | S_IWUSR;
2241
2242         return attr->mode;
2243 }
2244
2245 static struct attribute *it87_attributes_pwm[] = {
2246         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2247         &sensor_dev_attr_pwm1.dev_attr.attr,
2248         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2249         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2250
2251         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2252         &sensor_dev_attr_pwm2.dev_attr.attr,
2253         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2254         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2255
2256         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2257         &sensor_dev_attr_pwm3.dev_attr.attr,
2258         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2259         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2260
2261         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2262         &sensor_dev_attr_pwm4.dev_attr.attr,
2263         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2264         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2265
2266         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2267         &sensor_dev_attr_pwm5.dev_attr.attr,
2268         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2269         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2270
2271         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2272         &sensor_dev_attr_pwm6.dev_attr.attr,
2273         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2274         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2275
2276         NULL
2277 };
2278
2279 static const struct attribute_group it87_group_pwm = {
2280         .attrs = it87_attributes_pwm,
2281         .is_visible = it87_pwm_is_visible,
2282 };
2283
2284 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2285                                         struct attribute *attr, int index)
2286 {
2287         struct device *dev = container_of(kobj, struct device, kobj);
2288         struct it87_data *data = dev_get_drvdata(dev);
2289         int i = index / 11;     /* pwm index */
2290         int a = index % 11;     /* attribute index */
2291
2292         if (index >= 33) {      /* pwm 4..6 */
2293                 i = (index - 33) / 6 + 3;
2294                 a = (index - 33) % 6 + 4;
2295         }
2296
2297         if (!(data->has_pwm & BIT(i)))
2298                 return 0;
2299
2300         if (has_newer_autopwm(data)) {
2301                 if (a < 4)      /* no auto point pwm */
2302                         return 0;
2303                 if (a == 8)     /* no auto_point4 */
2304                         return 0;
2305         }
2306         if (has_old_autopwm(data)) {
2307                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2308                         return 0;
2309         }
2310
2311         return attr->mode;
2312 }
2313
2314 static struct attribute *it87_attributes_auto_pwm[] = {
2315         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2316         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2317         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2318         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2319         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2320         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2321         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2322         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2323         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2324         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2325         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2326
2327         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2328         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2329         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2330         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2331         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2332         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2333         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2334         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2335         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2336         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2337         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2338
2339         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2340         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2341         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2342         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2343         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2344         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2345         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2346         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2347         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2348         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2349         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2350
2351         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2352         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2353         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2354         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2355         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2356         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2357
2358         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2359         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2360         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2361         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2362         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2363         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2364
2365         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2366         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2367         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2368         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2369         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2370         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2371
2372         NULL,
2373 };
2374
2375 static const struct attribute_group it87_group_auto_pwm = {
2376         .attrs = it87_attributes_auto_pwm,
2377         .is_visible = it87_auto_pwm_is_visible,
2378 };
2379
2380 /* SuperIO detection - will change isa_address if a chip is found */
2381 static int __init it87_find(int sioaddr, unsigned short *address,
2382                             struct it87_sio_data *sio_data)
2383 {
2384         int err;
2385         u16 chip_type;
2386         const char *board_vendor, *board_name;
2387         const struct it87_devices *config;
2388
2389         err = superio_enter(sioaddr);
2390         if (err)
2391                 return err;
2392
2393         err = -ENODEV;
2394         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2395
2396         switch (chip_type) {
2397         case IT8705F_DEVID:
2398                 sio_data->type = it87;
2399                 break;
2400         case IT8712F_DEVID:
2401                 sio_data->type = it8712;
2402                 break;
2403         case IT8716F_DEVID:
2404         case IT8726F_DEVID:
2405                 sio_data->type = it8716;
2406                 break;
2407         case IT8718F_DEVID:
2408                 sio_data->type = it8718;
2409                 break;
2410         case IT8720F_DEVID:
2411                 sio_data->type = it8720;
2412                 break;
2413         case IT8721F_DEVID:
2414                 sio_data->type = it8721;
2415                 break;
2416         case IT8728F_DEVID:
2417                 sio_data->type = it8728;
2418                 break;
2419         case IT8732F_DEVID:
2420                 sio_data->type = it8732;
2421                 break;
2422         case IT8771E_DEVID:
2423                 sio_data->type = it8771;
2424                 break;
2425         case IT8772E_DEVID:
2426                 sio_data->type = it8772;
2427                 break;
2428         case IT8781F_DEVID:
2429                 sio_data->type = it8781;
2430                 break;
2431         case IT8782F_DEVID:
2432                 sio_data->type = it8782;
2433                 break;
2434         case IT8783E_DEVID:
2435                 sio_data->type = it8783;
2436                 break;
2437         case IT8786E_DEVID:
2438                 sio_data->type = it8786;
2439                 break;
2440         case IT8790E_DEVID:
2441                 sio_data->type = it8790;
2442                 break;
2443         case IT8603E_DEVID:
2444         case IT8623E_DEVID:
2445                 sio_data->type = it8603;
2446                 break;
2447         case IT8620E_DEVID:
2448                 sio_data->type = it8620;
2449                 break;
2450         case IT8622E_DEVID:
2451                 sio_data->type = it8622;
2452                 break;
2453         case IT8628E_DEVID:
2454                 sio_data->type = it8628;
2455                 break;
2456         case 0xffff:    /* No device at all */
2457                 goto exit;
2458         default:
2459                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2460                 goto exit;
2461         }
2462
2463         superio_select(sioaddr, PME);
2464         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2465                 pr_info("Device not activated, skipping\n");
2466                 goto exit;
2467         }
2468
2469         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2470         if (*address == 0) {
2471                 pr_info("Base address not set, skipping\n");
2472                 goto exit;
2473         }
2474
2475         err = 0;
2476         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2477         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2478                 it87_devices[sio_data->type].suffix,
2479                 *address, sio_data->revision);
2480
2481         config = &it87_devices[sio_data->type];
2482
2483         /* in7 (VSB or VCCH5V) is always internal on some chips */
2484         if (has_in7_internal(config))
2485                 sio_data->internal |= BIT(1);
2486
2487         /* in8 (Vbat) is always internal */
2488         sio_data->internal |= BIT(2);
2489
2490         /* in9 (AVCC3), always internal if supported */
2491         if (has_avcc3(config))
2492                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2493         else
2494                 sio_data->skip_in |= BIT(9);
2495
2496         if (!has_five_pwm(config))
2497                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2498         else if (!has_six_pwm(config))
2499                 sio_data->skip_pwm |= BIT(5);
2500
2501         if (!has_vid(config))
2502                 sio_data->skip_vid = 1;
2503
2504         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2505         if (sio_data->type == it87) {
2506                 /* The IT8705F has a different LD number for GPIO */
2507                 superio_select(sioaddr, 5);
2508                 sio_data->beep_pin = superio_inb(sioaddr,
2509                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2510         } else if (sio_data->type == it8783) {
2511                 int reg25, reg27, reg2a, reg2c, regef;
2512
2513                 superio_select(sioaddr, GPIO);
2514
2515                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2516                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2517                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2518                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2519                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2520
2521                 /* Check if fan3 is there or not */
2522                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2523                         sio_data->skip_fan |= BIT(2);
2524                 if ((reg25 & BIT(4)) ||
2525                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2526                         sio_data->skip_pwm |= BIT(2);
2527
2528                 /* Check if fan2 is there or not */
2529                 if (reg27 & BIT(7))
2530                         sio_data->skip_fan |= BIT(1);
2531                 if (reg27 & BIT(3))
2532                         sio_data->skip_pwm |= BIT(1);
2533
2534                 /* VIN5 */
2535                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2536                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2537
2538                 /* VIN6 */
2539                 if (reg27 & BIT(1))
2540                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2541
2542                 /*
2543                  * VIN7
2544                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2545                  */
2546                 if (reg27 & BIT(2)) {
2547                         /*
2548                          * The data sheet is a bit unclear regarding the
2549                          * internal voltage divider for VCCH5V. It says
2550                          * "This bit enables and switches VIN7 (pin 91) to the
2551                          * internal voltage divider for VCCH5V".
2552                          * This is different to other chips, where the internal
2553                          * voltage divider would connect VIN7 to an internal
2554                          * voltage source. Maybe that is the case here as well.
2555                          *
2556                          * Since we don't know for sure, re-route it if that is
2557                          * not the case, and ask the user to report if the
2558                          * resulting voltage is sane.
2559                          */
2560                         if (!(reg2c & BIT(1))) {
2561                                 reg2c |= BIT(1);
2562                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2563                                              reg2c);
2564                                 pr_notice("Routing internal VCCH5V to in7.\n");
2565                         }
2566                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2567                         pr_notice("Please report if it displays a reasonable voltage.\n");
2568                 }
2569
2570                 if (reg2c & BIT(0))
2571                         sio_data->internal |= BIT(0);
2572                 if (reg2c & BIT(1))
2573                         sio_data->internal |= BIT(1);
2574
2575                 sio_data->beep_pin = superio_inb(sioaddr,
2576                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2577         } else if (sio_data->type == it8603) {
2578                 int reg27, reg29;
2579
2580                 superio_select(sioaddr, GPIO);
2581
2582                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2583
2584                 /* Check if fan3 is there or not */
2585                 if (reg27 & BIT(6))
2586                         sio_data->skip_pwm |= BIT(2);
2587                 if (reg27 & BIT(7))
2588                         sio_data->skip_fan |= BIT(2);
2589
2590                 /* Check if fan2 is there or not */
2591                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2592                 if (reg29 & BIT(1))
2593                         sio_data->skip_pwm |= BIT(1);
2594                 if (reg29 & BIT(2))
2595                         sio_data->skip_fan |= BIT(1);
2596
2597                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2598                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2599
2600                 sio_data->beep_pin = superio_inb(sioaddr,
2601                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2602         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2603                 int reg;
2604
2605                 superio_select(sioaddr, GPIO);
2606
2607                 /* Check for pwm5 */
2608                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2609                 if (reg & BIT(6))
2610                         sio_data->skip_pwm |= BIT(4);
2611
2612                 /* Check for fan4, fan5 */
2613                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2614                 if (!(reg & BIT(5)))
2615                         sio_data->skip_fan |= BIT(3);
2616                 if (!(reg & BIT(4)))
2617                         sio_data->skip_fan |= BIT(4);
2618
2619                 /* Check for pwm3, fan3 */
2620                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2621                 if (reg & BIT(6))
2622                         sio_data->skip_pwm |= BIT(2);
2623                 if (reg & BIT(7))
2624                         sio_data->skip_fan |= BIT(2);
2625
2626                 /* Check for pwm4 */
2627                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2628                 if (reg & BIT(2))
2629                         sio_data->skip_pwm |= BIT(3);
2630
2631                 /* Check for pwm2, fan2 */
2632                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2633                 if (reg & BIT(1))
2634                         sio_data->skip_pwm |= BIT(1);
2635                 if (reg & BIT(2))
2636                         sio_data->skip_fan |= BIT(1);
2637                 /* Check for pwm6, fan6 */
2638                 if (!(reg & BIT(7))) {
2639                         sio_data->skip_pwm |= BIT(5);
2640                         sio_data->skip_fan |= BIT(5);
2641                 }
2642
2643                 /* Check if AVCC is on VIN3 */
2644                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2645                 if (reg & BIT(0))
2646                         sio_data->internal |= BIT(0);
2647                 else
2648                         sio_data->skip_in |= BIT(9);
2649
2650                 sio_data->beep_pin = superio_inb(sioaddr,
2651                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2652         } else if (sio_data->type == it8622) {
2653                 int reg;
2654
2655                 superio_select(sioaddr, GPIO);
2656
2657                 /* Check for pwm4, fan4 */
2658                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2659                 if (reg & BIT(6))
2660                         sio_data->skip_fan |= BIT(3);
2661                 if (reg & BIT(5))
2662                         sio_data->skip_pwm |= BIT(3);
2663
2664                 /* Check for pwm3, fan3, pwm5, fan5 */
2665                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2666                 if (reg & BIT(6))
2667                         sio_data->skip_pwm |= BIT(2);
2668                 if (reg & BIT(7))
2669                         sio_data->skip_fan |= BIT(2);
2670                 if (reg & BIT(3))
2671                         sio_data->skip_pwm |= BIT(4);
2672                 if (reg & BIT(1))
2673                         sio_data->skip_fan |= BIT(4);
2674
2675                 /* Check for pwm2, fan2 */
2676                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2677                 if (reg & BIT(1))
2678                         sio_data->skip_pwm |= BIT(1);
2679                 if (reg & BIT(2))
2680                         sio_data->skip_fan |= BIT(1);
2681
2682                 /* Check for AVCC */
2683                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2684                 if (!(reg & BIT(0)))
2685                         sio_data->skip_in |= BIT(9);
2686
2687                 sio_data->beep_pin = superio_inb(sioaddr,
2688                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2689         } else {
2690                 int reg;
2691                 bool uart6;
2692
2693                 superio_select(sioaddr, GPIO);
2694
2695                 /* Check for fan4, fan5 */
2696                 if (has_five_fans(config)) {
2697                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2698                         switch (sio_data->type) {
2699                         case it8718:
2700                                 if (reg & BIT(5))
2701                                         sio_data->skip_fan |= BIT(3);
2702                                 if (reg & BIT(4))
2703                                         sio_data->skip_fan |= BIT(4);
2704                                 break;
2705                         case it8720:
2706                         case it8721:
2707                         case it8728:
2708                                 if (!(reg & BIT(5)))
2709                                         sio_data->skip_fan |= BIT(3);
2710                                 if (!(reg & BIT(4)))
2711                                         sio_data->skip_fan |= BIT(4);
2712                                 break;
2713                         default:
2714                                 break;
2715                         }
2716                 }
2717
2718                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2719                 if (!sio_data->skip_vid) {
2720                         /* We need at least 4 VID pins */
2721                         if (reg & 0x0f) {
2722                                 pr_info("VID is disabled (pins used for GPIO)\n");
2723                                 sio_data->skip_vid = 1;
2724                         }
2725                 }
2726
2727                 /* Check if fan3 is there or not */
2728                 if (reg & BIT(6))
2729                         sio_data->skip_pwm |= BIT(2);
2730                 if (reg & BIT(7))
2731                         sio_data->skip_fan |= BIT(2);
2732
2733                 /* Check if fan2 is there or not */
2734                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2735                 if (reg & BIT(1))
2736                         sio_data->skip_pwm |= BIT(1);
2737                 if (reg & BIT(2))
2738                         sio_data->skip_fan |= BIT(1);
2739
2740                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2741                     !(sio_data->skip_vid))
2742                         sio_data->vid_value = superio_inb(sioaddr,
2743                                                           IT87_SIO_VID_REG);
2744
2745                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2746
2747                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2748
2749                 /*
2750                  * The IT8720F has no VIN7 pin, so VCCH should always be
2751                  * routed internally to VIN7 with an internal divider.
2752                  * Curiously, there still is a configuration bit to control
2753                  * this, which means it can be set incorrectly. And even
2754                  * more curiously, many boards out there are improperly
2755                  * configured, even though the IT8720F datasheet claims
2756                  * that the internal routing of VCCH to VIN7 is the default
2757                  * setting. So we force the internal routing in this case.
2758                  *
2759                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2760                  * If UART6 is enabled, re-route VIN7 to the internal divider
2761                  * if that is not already the case.
2762                  */
2763                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2764                         reg |= BIT(1);
2765                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2766                         pr_notice("Routing internal VCCH to in7\n");
2767                 }
2768                 if (reg & BIT(0))
2769                         sio_data->internal |= BIT(0);
2770                 if (reg & BIT(1))
2771                         sio_data->internal |= BIT(1);
2772
2773                 /*
2774                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2775                  * While VIN7 can be routed to the internal voltage divider,
2776                  * VIN5 and VIN6 are not available if UART6 is enabled.
2777                  *
2778                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2779                  * is the temperature source. Since we can not read the
2780                  * temperature source here, skip_temp is preliminary.
2781                  */
2782                 if (uart6) {
2783                         sio_data->skip_in |= BIT(5) | BIT(6);
2784                         sio_data->skip_temp |= BIT(2);
2785                 }
2786
2787                 sio_data->beep_pin = superio_inb(sioaddr,
2788                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2789         }
2790         if (sio_data->beep_pin)
2791                 pr_info("Beeping is supported\n");
2792
2793         /* Disable specific features based on DMI strings */
2794         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2795         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2796         if (board_vendor && board_name) {
2797                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2798                     strcmp(board_name, "FN68PT") == 0) {
2799                         /*
2800                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2801                          * connected to a fan, but to something else. One user
2802                          * has reported instant system power-off when changing
2803                          * the PWM2 duty cycle, so we disable it.
2804                          * I use the board name string as the trigger in case
2805                          * the same board is ever used in other systems.
2806                          */
2807                         pr_info("Disabling pwm2 due to hardware constraints\n");
2808                         sio_data->skip_pwm = BIT(1);
2809                 }
2810         }
2811
2812 exit:
2813         superio_exit(sioaddr);
2814         return err;
2815 }
2816
2817 /* Called when we have found a new IT87. */
2818 static void it87_init_device(struct platform_device *pdev)
2819 {
2820         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2821         struct it87_data *data = platform_get_drvdata(pdev);
2822         int tmp, i;
2823         u8 mask;
2824
2825         /*
2826          * For each PWM channel:
2827          * - If it is in automatic mode, setting to manual mode should set
2828          *   the fan to full speed by default.
2829          * - If it is in manual mode, we need a mapping to temperature
2830          *   channels to use when later setting to automatic mode later.
2831          *   Use a 1:1 mapping by default (we are clueless.)
2832          * In both cases, the value can (and should) be changed by the user
2833          * prior to switching to a different mode.
2834          * Note that this is no longer needed for the IT8721F and later, as
2835          * these have separate registers for the temperature mapping and the
2836          * manual duty cycle.
2837          */
2838         for (i = 0; i < NUM_AUTO_PWM; i++) {
2839                 data->pwm_temp_map[i] = i;
2840                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2841                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2842         }
2843
2844         /*
2845          * Some chips seem to have default value 0xff for all limit
2846          * registers. For low voltage limits it makes no sense and triggers
2847          * alarms, so change to 0 instead. For high temperature limits, it
2848          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2849          * but is still confusing, so change to 127 degrees C.
2850          */
2851         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2852                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2853                 if (tmp == 0xff)
2854                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2855         }
2856         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2857                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2858                 if (tmp == 0xff)
2859                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2860         }
2861
2862         /*
2863          * Temperature channels are not forcibly enabled, as they can be
2864          * set to two different sensor types and we can't guess which one
2865          * is correct for a given system. These channels can be enabled at
2866          * run-time through the temp{1-3}_type sysfs accessors if needed.
2867          */
2868
2869         /* Check if voltage monitors are reset manually or by some reason */
2870         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2871         if ((tmp & 0xff) == 0) {
2872                 /* Enable all voltage monitors */
2873                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2874         }
2875
2876         /* Check if tachometers are reset manually or by some reason */
2877         mask = 0x70 & ~(sio_data->skip_fan << 4);
2878         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2879         if ((data->fan_main_ctrl & mask) == 0) {
2880                 /* Enable all fan tachometers */
2881                 data->fan_main_ctrl |= mask;
2882                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2883                                  data->fan_main_ctrl);
2884         }
2885         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2886
2887         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2888
2889         /* Set tachometers to 16-bit mode if needed */
2890         if (has_fan16_config(data)) {
2891                 if (~tmp & 0x07 & data->has_fan) {
2892                         dev_dbg(&pdev->dev,
2893                                 "Setting fan1-3 to 16-bit mode\n");
2894                         it87_write_value(data, IT87_REG_FAN_16BIT,
2895                                          tmp | 0x07);
2896                 }
2897         }
2898
2899         /* Check for additional fans */
2900         if (has_five_fans(data)) {
2901                 if (tmp & BIT(4))
2902                         data->has_fan |= BIT(3); /* fan4 enabled */
2903                 if (tmp & BIT(5))
2904                         data->has_fan |= BIT(4); /* fan5 enabled */
2905                 if (has_six_fans(data) && (tmp & BIT(2)))
2906                         data->has_fan |= BIT(5); /* fan6 enabled */
2907         }
2908
2909         /* Fan input pins may be used for alternative functions */
2910         data->has_fan &= ~sio_data->skip_fan;
2911
2912         /* Check if pwm5, pwm6 are enabled */
2913         if (has_six_pwm(data)) {
2914                 /* The following code may be IT8620E specific */
2915                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2916                 if ((tmp & 0xc0) == 0xc0)
2917                         sio_data->skip_pwm |= BIT(4);
2918                 if (!(tmp & BIT(3)))
2919                         sio_data->skip_pwm |= BIT(5);
2920         }
2921
2922         /* Start monitoring */
2923         it87_write_value(data, IT87_REG_CONFIG,
2924                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2925                          | (update_vbat ? 0x41 : 0x01));
2926 }
2927
2928 /* Return 1 if and only if the PWM interface is safe to use */
2929 static int it87_check_pwm(struct device *dev)
2930 {
2931         struct it87_data *data = dev_get_drvdata(dev);
2932         /*
2933          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2934          * and polarity set to active low is sign that this is the case so we
2935          * disable pwm control to protect the user.
2936          */
2937         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2938
2939         if ((tmp & 0x87) == 0) {
2940                 if (fix_pwm_polarity) {
2941                         /*
2942                          * The user asks us to attempt a chip reconfiguration.
2943                          * This means switching to active high polarity and
2944                          * inverting all fan speed values.
2945                          */
2946                         int i;
2947                         u8 pwm[3];
2948
2949                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
2950                                 pwm[i] = it87_read_value(data,
2951                                                          IT87_REG_PWM[i]);
2952
2953                         /*
2954                          * If any fan is in automatic pwm mode, the polarity
2955                          * might be correct, as suspicious as it seems, so we
2956                          * better don't change anything (but still disable the
2957                          * PWM interface).
2958                          */
2959                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2960                                 dev_info(dev,
2961                                          "Reconfiguring PWM to active high polarity\n");
2962                                 it87_write_value(data, IT87_REG_FAN_CTL,
2963                                                  tmp | 0x87);
2964                                 for (i = 0; i < 3; i++)
2965                                         it87_write_value(data,
2966                                                          IT87_REG_PWM[i],
2967                                                          0x7f & ~pwm[i]);
2968                                 return 1;
2969                         }
2970
2971                         dev_info(dev,
2972                                  "PWM configuration is too broken to be fixed\n");
2973                 }
2974
2975                 dev_info(dev,
2976                          "Detected broken BIOS defaults, disabling PWM interface\n");
2977                 return 0;
2978         } else if (fix_pwm_polarity) {
2979                 dev_info(dev,
2980                          "PWM configuration looks sane, won't touch\n");
2981         }
2982
2983         return 1;
2984 }
2985
2986 static int it87_probe(struct platform_device *pdev)
2987 {
2988         struct it87_data *data;
2989         struct resource *res;
2990         struct device *dev = &pdev->dev;
2991         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2992         int enable_pwm_interface;
2993         struct device *hwmon_dev;
2994
2995         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2996         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2997                                  DRVNAME)) {
2998                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2999                         (unsigned long)res->start,
3000                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3001                 return -EBUSY;
3002         }
3003
3004         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3005         if (!data)
3006                 return -ENOMEM;
3007
3008         data->addr = res->start;
3009         data->type = sio_data->type;
3010         data->features = it87_devices[sio_data->type].features;
3011         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3012         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3013         /*
3014          * IT8705F Datasheet 0.4.1, 3h == Version G.
3015          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3016          * These are the first revisions with 16-bit tachometer support.
3017          */
3018         switch (data->type) {
3019         case it87:
3020                 if (sio_data->revision >= 0x03) {
3021                         data->features &= ~FEAT_OLD_AUTOPWM;
3022                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3023                 }
3024                 break;
3025         case it8712:
3026                 if (sio_data->revision >= 0x08) {
3027                         data->features &= ~FEAT_OLD_AUTOPWM;
3028                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3029                                           FEAT_FIVE_FANS;
3030                 }
3031                 break;
3032         default:
3033                 break;
3034         }
3035
3036         /* Now, we do the remaining detection. */
3037         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3038             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3039                 return -ENODEV;
3040
3041         platform_set_drvdata(pdev, data);
3042
3043         mutex_init(&data->update_lock);
3044
3045         /* Check PWM configuration */
3046         enable_pwm_interface = it87_check_pwm(dev);
3047
3048         /* Starting with IT8721F, we handle scaling of internal voltages */
3049         if (has_12mv_adc(data)) {
3050                 if (sio_data->internal & BIT(0))
3051                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3052                 if (sio_data->internal & BIT(1))
3053                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3054                 if (sio_data->internal & BIT(2))
3055                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3056                 if (sio_data->internal & BIT(3))
3057                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3058         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3059                    sio_data->type == it8783) {
3060                 if (sio_data->internal & BIT(0))
3061                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3062                 if (sio_data->internal & BIT(1))
3063                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3064         }
3065
3066         data->has_temp = 0x07;
3067         if (sio_data->skip_temp & BIT(2)) {
3068                 if (sio_data->type == it8782 &&
3069                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3070                         data->has_temp &= ~BIT(2);
3071         }
3072
3073         data->in_internal = sio_data->internal;
3074         data->has_in = 0x3ff & ~sio_data->skip_in;
3075
3076         if (has_six_temp(data)) {
3077                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3078
3079                 /* Check for additional temperature sensors */
3080                 if ((reg & 0x03) >= 0x02)
3081                         data->has_temp |= BIT(3);
3082                 if (((reg >> 2) & 0x03) >= 0x02)
3083                         data->has_temp |= BIT(4);
3084                 if (((reg >> 4) & 0x03) >= 0x02)
3085                         data->has_temp |= BIT(5);
3086
3087                 /* Check for additional voltage sensors */
3088                 if ((reg & 0x03) == 0x01)
3089                         data->has_in |= BIT(10);
3090                 if (((reg >> 2) & 0x03) == 0x01)
3091                         data->has_in |= BIT(11);
3092                 if (((reg >> 4) & 0x03) == 0x01)
3093                         data->has_in |= BIT(12);
3094         }
3095
3096         data->has_beep = !!sio_data->beep_pin;
3097
3098         /* Initialize the IT87 chip */
3099         it87_init_device(pdev);
3100
3101         if (!sio_data->skip_vid) {
3102                 data->has_vid = true;
3103                 data->vrm = vid_which_vrm();
3104                 /* VID reading from Super-I/O config space if available */
3105                 data->vid = sio_data->vid_value;
3106         }
3107
3108         /* Prepare for sysfs hooks */
3109         data->groups[0] = &it87_group;
3110         data->groups[1] = &it87_group_in;
3111         data->groups[2] = &it87_group_temp;
3112         data->groups[3] = &it87_group_fan;
3113
3114         if (enable_pwm_interface) {
3115                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3116                 data->has_pwm &= ~sio_data->skip_pwm;
3117
3118                 data->groups[4] = &it87_group_pwm;
3119                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3120                         data->groups[5] = &it87_group_auto_pwm;
3121         }
3122
3123         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3124                                         it87_devices[sio_data->type].name,
3125                                         data, data->groups);
3126         return PTR_ERR_OR_ZERO(hwmon_dev);
3127 }
3128
3129 static struct platform_driver it87_driver = {
3130         .driver = {
3131                 .name   = DRVNAME,
3132         },
3133         .probe  = it87_probe,
3134 };
3135
3136 static int __init it87_device_add(int index, unsigned short address,
3137                                   const struct it87_sio_data *sio_data)
3138 {
3139         struct platform_device *pdev;
3140         struct resource res = {
3141                 .start  = address + IT87_EC_OFFSET,
3142                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3143                 .name   = DRVNAME,
3144                 .flags  = IORESOURCE_IO,
3145         };
3146         int err;
3147
3148         err = acpi_check_resource_conflict(&res);
3149         if (err)
3150                 return err;
3151
3152         pdev = platform_device_alloc(DRVNAME, address);
3153         if (!pdev)
3154                 return -ENOMEM;
3155
3156         err = platform_device_add_resources(pdev, &res, 1);
3157         if (err) {
3158                 pr_err("Device resource addition failed (%d)\n", err);
3159                 goto exit_device_put;
3160         }
3161
3162         err = platform_device_add_data(pdev, sio_data,
3163                                        sizeof(struct it87_sio_data));
3164         if (err) {
3165                 pr_err("Platform data allocation failed\n");
3166                 goto exit_device_put;
3167         }
3168
3169         err = platform_device_add(pdev);
3170         if (err) {
3171                 pr_err("Device addition failed (%d)\n", err);
3172                 goto exit_device_put;
3173         }
3174
3175         it87_pdev[index] = pdev;
3176         return 0;
3177
3178 exit_device_put:
3179         platform_device_put(pdev);
3180         return err;
3181 }
3182
3183 static int __init sm_it87_init(void)
3184 {
3185         int sioaddr[2] = { REG_2E, REG_4E };
3186         struct it87_sio_data sio_data;
3187         unsigned short isa_address;
3188         bool found = false;
3189         int i, err;
3190
3191         err = platform_driver_register(&it87_driver);
3192         if (err)
3193                 return err;
3194
3195         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3196                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3197                 isa_address = 0;
3198                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3199                 if (err || isa_address == 0)
3200                         continue;
3201
3202                 err = it87_device_add(i, isa_address, &sio_data);
3203                 if (err)
3204                         goto exit_dev_unregister;
3205                 found = true;
3206         }
3207
3208         if (!found) {
3209                 err = -ENODEV;
3210                 goto exit_unregister;
3211         }
3212         return 0;
3213
3214 exit_dev_unregister:
3215         /* NULL check handled by platform_device_unregister */
3216         platform_device_unregister(it87_pdev[0]);
3217 exit_unregister:
3218         platform_driver_unregister(&it87_driver);
3219         return err;
3220 }
3221
3222 static void __exit sm_it87_exit(void)
3223 {
3224         /* NULL check handled by platform_device_unregister */
3225         platform_device_unregister(it87_pdev[1]);
3226         platform_device_unregister(it87_pdev[0]);
3227         platform_driver_unregister(&it87_driver);
3228 }
3229
3230 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3231 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3232 module_param(update_vbat, bool, 0);
3233 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3234 module_param(fix_pwm_polarity, bool, 0);
3235 MODULE_PARM_DESC(fix_pwm_polarity,
3236                  "Force PWM polarity to active high (DANGEROUS)");
3237 MODULE_LICENSE("GPL");
3238
3239 module_init(sm_it87_init);
3240 module_exit(sm_it87_exit);