drivers/hwmon/it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8620E  Super I/O chip w/LPC interface
  15  *            IT8622E  Super I/O chip w/LPC interface
  16  *            IT8623E  Super I/O chip w/LPC interface
  17  *            IT8628E  Super I/O chip w/LPC interface
  18  *            IT8705F  Super I/O chip w/LPC interface
  19  *            IT8712F  Super I/O chip w/LPC interface
  20  *            IT8716F  Super I/O chip w/LPC interface
  21  *            IT8718F  Super I/O chip w/LPC interface
  22  *            IT8720F  Super I/O chip w/LPC interface
  23  *            IT8721F  Super I/O chip w/LPC interface
  24  *            IT8726F  Super I/O chip w/LPC interface
  25  *            IT8728F  Super I/O chip w/LPC interface
  26  *            IT8732F  Super I/O chip w/LPC interface
  27  *            IT8758E  Super I/O chip w/LPC interface
  28  *            IT8771E  Super I/O chip w/LPC interface
  29  *            IT8772E  Super I/O chip w/LPC interface
  30  *            IT8781F  Super I/O chip w/LPC interface
  31  *            IT8782F  Super I/O chip w/LPC interface
  32  *            IT8783E/F Super I/O chip w/LPC interface
  33  *            IT8786E  Super I/O chip w/LPC interface
  34  *            IT8790E  Super I/O chip w/LPC interface
  35  *            Sis950   A clone of the IT8705F
  36  *
  37  *  Copyright (C) 2001 Chris Gauthron
  38  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  39  *
  40  *  This program is free software; you can redistribute it and/or modify
  41  *  it under the terms of the GNU General Public License as published by
  42  *  the Free Software Foundation; either version 2 of the License, or
  43  *  (at your option) any later version.
  44  *
  45  *  This program is distributed in the hope that it will be useful,
  46  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  47  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  48  *  GNU General Public License for more details.
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/bitops.h>
  54 #include <linux/module.h>
  55 #include <linux/init.h>
  56 #include <linux/slab.h>
  57 #include <linux/jiffies.h>
  58 #include <linux/platform_device.h>
  59 #include <linux/hwmon.h>
  60 #include <linux/hwmon-sysfs.h>
  61 #include <linux/hwmon-vid.h>
  62 #include <linux/err.h>
  63 #include <linux/mutex.h>
  64 #include <linux/sysfs.h>
  65 #include <linux/string.h>
  66 #include <linux/dmi.h>
  67 #include <linux/acpi.h>
  68 #include <linux/io.h>
  69
  70 #define DRVNAME "it87"
  71
  72 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  73              it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
  74              it8620, it8622, it8628 };
  75
  76 static unsigned short force_id;
  77 module_param(force_id, ushort, 0);
  78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  79
  80 static struct platform_device *it87_pdev[2];
  81
  82 #define REG_2E  0x2e    /* The register to read/write */
  83 #define REG_4E  0x4e    /* Secondary register to read/write */
  84
  85 #define DEV     0x07    /* Register: Logical device select */
  86 #define PME     0x04    /* The device with the fan registers in it */
  87
  88 /* The device with the IT8718F/IT8720F VID value in it */
  89 #define GPIO    0x07
  90
  91 #define DEVID   0x20    /* Register: Device ID */
  92 #define DEVREV  0x22    /* Register: Device Revision */
  93
  94 static inline int superio_inb(int ioreg, int reg)
  95 {
  96         outb(reg, ioreg);
  97         return inb(ioreg + 1);
  98 }
  99
 100 static inline void superio_outb(int ioreg, int reg, int val)
 101 {
 102         outb(reg, ioreg);
 103         outb(val, ioreg + 1);
 104 }
 105
 106 static int superio_inw(int ioreg, int reg)
 107 {
 108         int val;
 109
 110         outb(reg++, ioreg);
 111         val = inb(ioreg + 1) << 8;
 112         outb(reg, ioreg);
 113         val |= inb(ioreg + 1);
 114         return val;
 115 }
 116
 117 static inline void superio_select(int ioreg, int ldn)
 118 {
 119         outb(DEV, ioreg);
 120         outb(ldn, ioreg + 1);
 121 }
 122
 123 static inline int superio_enter(int ioreg)
 124 {
 125         /*
 126          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 127          */
 128         if (!request_muxed_region(ioreg, 2, DRVNAME))
 129                 return -EBUSY;
 130
 131         outb(0x87, ioreg);
 132         outb(0x01, ioreg);
 133         outb(0x55, ioreg);
 134         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 135         return 0;
 136 }
 137
 138 static inline void superio_exit(int ioreg)
 139 {
 140         outb(0x02, ioreg);
 141         outb(0x02, ioreg + 1);
 142         release_region(ioreg, 2);
 143 }
 144
 145 /* Logical device 4 registers */
 146 #define IT8712F_DEVID 0x8712
 147 #define IT8705F_DEVID 0x8705
 148 #define IT8716F_DEVID 0x8716
 149 #define IT8718F_DEVID 0x8718
 150 #define IT8720F_DEVID 0x8720
 151 #define IT8721F_DEVID 0x8721
 152 #define IT8726F_DEVID 0x8726
 153 #define IT8728F_DEVID 0x8728
 154 #define IT8732F_DEVID 0x8732
 155 #define IT8771E_DEVID 0x8771
 156 #define IT8772E_DEVID 0x8772
 157 #define IT8781F_DEVID 0x8781
 158 #define IT8782F_DEVID 0x8782
 159 #define IT8783E_DEVID 0x8783
 160 #define IT8786E_DEVID 0x8786
 161 #define IT8790E_DEVID 0x8790
 162 #define IT8603E_DEVID 0x8603
 163 #define IT8620E_DEVID 0x8620
 164 #define IT8622E_DEVID 0x8622
 165 #define IT8623E_DEVID 0x8623
 166 #define IT8628E_DEVID 0x8628
 167 #define IT87_ACT_REG  0x30
 168 #define IT87_BASE_REG 0x60
 169
 170 /* Logical device 7 registers (IT8712F and later) */
 171 #define IT87_SIO_GPIO1_REG      0x25
 172 #define IT87_SIO_GPIO2_REG      0x26
 173 #define IT87_SIO_GPIO3_REG      0x27
 174 #define IT87_SIO_GPIO4_REG      0x28
 175 #define IT87_SIO_GPIO5_REG      0x29
 176 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 177 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 178 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 179 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 180 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 181
 182 /* Update battery voltage after every reading if true */
 183 static bool update_vbat;
 184
 185 /* Not all BIOSes properly configure the PWM registers */
 186 static bool fix_pwm_polarity;
 187
 188 /* Many IT87 constants specified below */
 189
 190 /* Length of ISA address segment */
 191 #define IT87_EXTENT 8
 192
 193 /* Length of ISA address segment for Environmental Controller */
 194 #define IT87_EC_EXTENT 2
 195
 196 /* Offset of EC registers from ISA base address */
 197 #define IT87_EC_OFFSET 5
 198
 199 /* Where are the ISA address/data registers relative to the EC base address */
 200 #define IT87_ADDR_REG_OFFSET 0
 201 #define IT87_DATA_REG_OFFSET 1
 202
 203 /*----- The IT87 registers -----*/
 204
 205 #define IT87_REG_CONFIG        0x00
 206
 207 #define IT87_REG_ALARM1        0x01
 208 #define IT87_REG_ALARM2        0x02
 209 #define IT87_REG_ALARM3        0x03
 210
 211 /*
 212  * The IT8718F and IT8720F have the VID value in a different register, in
 213  * Super-I/O configuration space.
 214  */
 215 #define IT87_REG_VID           0x0a
 216 /*
 217  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 218  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 219  * mode.
 220  */
 221 #define IT87_REG_FAN_DIV       0x0b
 222 #define IT87_REG_FAN_16BIT     0x0c
 223
 224 /*
 225  * Monitors:
 226  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 227  * - up to 6 temp (1 to 6)
 228  * - up to 6 fan (1 to 6)
 229  */
 230
 231 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 232 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 233 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 234 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 235 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 236
 237 #define IT87_REG_FAN_MAIN_CTRL 0x13
 238 #define IT87_REG_FAN_CTL       0x14
 239 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 240 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 241
 242 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 243                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 244
 245 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 246
 247 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 248 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 249 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 250 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 251
 252 #define IT87_REG_VIN_ENABLE    0x50
 253 #define IT87_REG_TEMP_ENABLE   0x51
 254 #define IT87_REG_TEMP_EXTRA    0x55
 255 #define IT87_REG_BEEP_ENABLE   0x5c
 256
 257 #define IT87_REG_CHIPID        0x58
 258
 259 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 260
 261 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 262 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 263
 264 #define IT87_REG_TEMP456_ENABLE 0x77
 265
 266 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 267 #define NUM_VIN_LIMIT           8
 268 #define NUM_TEMP                6
 269 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 270 #define NUM_TEMP_LIMIT          3
 271 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 272 #define NUM_FAN_DIV             3
 273 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 274 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 275
 276 struct it87_devices {
 277         const char *name;
 278         const char * const suffix;
 279         u32 features;
 280         u8 peci_mask;
 281         u8 old_peci_mask;
 282 };
 283
 284 #define FEAT_12MV_ADC           BIT(0)
 285 #define FEAT_NEWER_AUTOPWM      BIT(1)
 286 #define FEAT_OLD_AUTOPWM        BIT(2)
 287 #define FEAT_16BIT_FANS         BIT(3)
 288 #define FEAT_TEMP_OFFSET        BIT(4)
 289 #define FEAT_TEMP_PECI          BIT(5)
 290 #define FEAT_TEMP_OLD_PECI      BIT(6)
 291 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 292 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 293 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 294 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 295 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 296 #define FEAT_10_9MV_ADC         BIT(12)
 297 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 298 #define FEAT_SIX_PWM            BIT(14) /* Chip supports 6 pwm chn */
 299 #define FEAT_PWM_FREQ2          BIT(15) /* Separate pwm freq 2 */
 300 #define FEAT_SIX_TEMP           BIT(16) /* Up to 6 temp sensors */
 301 #define FEAT_VIN3_5V            BIT(17) /* VIN3 connected to +5V */
 302
 303 static const struct it87_devices it87_devices[] = {
 304         [it87] = {
 305                 .name = "it87",
 306                 .suffix = "F",
 307                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 308         },
 309         [it8712] = {
 310                 .name = "it8712",
 311                 .suffix = "F",
 312                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 313                                                 /* may need to overwrite */
 314         },
 315         [it8716] = {
 316                 .name = "it8716",
 317                 .suffix = "F",
 318                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 319                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 320         },
 321         [it8718] = {
 322                 .name = "it8718",
 323                 .suffix = "F",
 324                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 325                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 326                   | FEAT_PWM_FREQ2,
 327                 .old_peci_mask = 0x4,
 328         },
 329         [it8720] = {
 330                 .name = "it8720",
 331                 .suffix = "F",
 332                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 333                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 334                   | FEAT_PWM_FREQ2,
 335                 .old_peci_mask = 0x4,
 336         },
 337         [it8721] = {
 338                 .name = "it8721",
 339                 .suffix = "F",
 340                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 341                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 342                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 343                   | FEAT_PWM_FREQ2,
 344                 .peci_mask = 0x05,
 345                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 346         },
 347         [it8728] = {
 348                 .name = "it8728",
 349                 .suffix = "F",
 350                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 351                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 352                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 353                 .peci_mask = 0x07,
 354         },
 355         [it8732] = {
 356                 .name = "it8732",
 357                 .suffix = "F",
 358                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 359                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 360                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 361                 .peci_mask = 0x07,
 362                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 363         },
 364         [it8771] = {
 365                 .name = "it8771",
 366                 .suffix = "E",
 367                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 368                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 369                   | FEAT_PWM_FREQ2,
 370                                 /* PECI: guesswork */
 371                                 /* 12mV ADC (OHM) */
 372                                 /* 16 bit fans (OHM) */
 373                                 /* three fans, always 16 bit (guesswork) */
 374                 .peci_mask = 0x07,
 375         },
 376         [it8772] = {
 377                 .name = "it8772",
 378                 .suffix = "E",
 379                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 380                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 381                   | FEAT_PWM_FREQ2,
 382                                 /* PECI (coreboot) */
 383                                 /* 12mV ADC (HWSensors4, OHM) */
 384                                 /* 16 bit fans (HWSensors4, OHM) */
 385                                 /* three fans, always 16 bit (datasheet) */
 386                 .peci_mask = 0x07,
 387         },
 388         [it8781] = {
 389                 .name = "it8781",
 390                 .suffix = "F",
 391                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 392                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 393                 .old_peci_mask = 0x4,
 394         },
 395         [it8782] = {
 396                 .name = "it8782",
 397                 .suffix = "F",
 398                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 399                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 400                 .old_peci_mask = 0x4,
 401         },
 402         [it8783] = {
 403                 .name = "it8783",
 404                 .suffix = "E/F",
 405                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 406                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 407                 .old_peci_mask = 0x4,
 408         },
 409         [it8786] = {
 410                 .name = "it8786",
 411                 .suffix = "E",
 412                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 413                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 414                   | FEAT_PWM_FREQ2,
 415                 .peci_mask = 0x07,
 416         },
 417         [it8790] = {
 418                 .name = "it8790",
 419                 .suffix = "E",
 420                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 421                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 422                   | FEAT_PWM_FREQ2,
 423                 .peci_mask = 0x07,
 424         },
 425         [it8603] = {
 426                 .name = "it8603",
 427                 .suffix = "E",
 428                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 429                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 430                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 431                 .peci_mask = 0x07,
 432         },
 433         [it8620] = {
 434                 .name = "it8620",
 435                 .suffix = "E",
 436                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 437                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 438                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 439                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 440                 .peci_mask = 0x07,
 441         },
 442         [it8622] = {
 443                 .name = "it8622",
 444                 .suffix = "E",
 445                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 446                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 447                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3
 448                   | FEAT_VIN3_5V,
 449                 .peci_mask = 0x07,
 450         },
 451         [it8628] = {
 452                 .name = "it8628",
 453                 .suffix = "E",
 454                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 455                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 456                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 457                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 458                 .peci_mask = 0x07,
 459         },
 460 };
 461
 462 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 463 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 464 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 465 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 466 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 467 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 468 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 469                                  ((data)->peci_mask & BIT(nr)))
 470 #define has_temp_old_peci(data, nr) \
 471                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 472                                  ((data)->old_peci_mask & BIT(nr)))
 473 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 474 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 475                                                      FEAT_SIX_FANS))
 476 #define has_vid(data)           ((data)->features & FEAT_VID)
 477 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 478 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 479 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 480 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 481 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 482 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 483 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 484
 485 struct it87_sio_data {
 486         enum chips type;
 487         /* Values read from Super-I/O config space */
 488         u8 revision;
 489         u8 vid_value;
 490         u8 beep_pin;
 491         u8 internal;    /* Internal sensors can be labeled */
 492         /* Features skipped based on config or DMI */
 493         u16 skip_in;
 494         u8 skip_vid;
 495         u8 skip_fan;
 496         u8 skip_pwm;
 497         u8 skip_temp;
 498 };
 499
 500 /*
 501  * For each registered chip, we need to keep some data in memory.
 502  * The structure is dynamically allocated.
 503  */
 504 struct it87_data {
 505         const struct attribute_group *groups[7];
 506         enum chips type;
 507         u32 features;
 508         u8 peci_mask;
 509         u8 old_peci_mask;
 510
 511         unsigned short addr;
 512         const char *name;
 513         struct mutex update_lock;
 514         char valid;             /* !=0 if following fields are valid */
 515         unsigned long last_updated;     /* In jiffies */
 516
 517         u16 in_scaled;          /* Internal voltage sensors are scaled */
 518         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 519         u16 has_in;             /* Bitfield, voltage sensors enabled */
 520         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 521         u8 has_fan;             /* Bitfield, fans enabled */
 522         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 523         u8 has_temp;            /* Bitfield, temp sensors enabled */
 524         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 525         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 526         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 527         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 528         bool has_vid;           /* True if VID supported */
 529         u8 vid;                 /* Register encoding, combined */
 530         u8 vrm;
 531         u32 alarms;             /* Register encoding, combined */
 532         bool has_beep;          /* true if beep supported */
 533         u8 beeps;               /* Register encoding */
 534         u8 fan_main_ctrl;       /* Register value */
 535         u8 fan_ctl;             /* Register value */
 536
 537         /*
 538          * The following 3 arrays correspond to the same registers up to
 539          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 540          * 7, and we want to preserve settings on mode changes, so we have
 541          * to track all values separately.
 542          * Starting with the IT8721F, the manual PWM duty cycles are stored
 543          * in separate registers (8-bit values), so the separate tracking
 544          * is no longer needed, but it is still done to keep the driver
 545          * simple.
 546          */
 547         u8 has_pwm;             /* Bitfield, pwm control enabled */
 548         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 549         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 550         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 551
 552         /* Automatic fan speed control registers */
 553         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 554         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 555 };
 556
 557 static int adc_lsb(const struct it87_data *data, int nr)
 558 {
 559         int lsb;
 560
 561         if (has_12mv_adc(data))
 562                 lsb = 120;
 563         else if (has_10_9mv_adc(data))
 564                 lsb = 109;
 565         else
 566                 lsb = 160;
 567         if (data->in_scaled & BIT(nr))
 568                 lsb <<= 1;
 569         return lsb;
 570 }
 571
 572 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 573 {
 574         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 575         return clamp_val(val, 0, 255);
 576 }
 577
 578 static int in_from_reg(const struct it87_data *data, int nr, int val)
 579 {
 580         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 581 }
 582
 583 static inline u8 FAN_TO_REG(long rpm, int div)
 584 {
 585         if (rpm == 0)
 586                 return 255;
 587         rpm = clamp_val(rpm, 1, 1000000);
 588         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 589 }
 590
 591 static inline u16 FAN16_TO_REG(long rpm)
 592 {
 593         if (rpm == 0)
 594                 return 0xffff;
 595         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 596 }
 597
 598 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 599                                 1350000 / ((val) * (div)))
 600 /* The divider is fixed to 2 in 16-bit mode */
 601 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 602                              1350000 / ((val) * 2))
 603
 604 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 605                                     ((val) + 500) / 1000), -128, 127))
 606 #define TEMP_FROM_REG(val) ((val) * 1000)
 607
 608 static u8 pwm_to_reg(const struct it87_data *data, long val)
 609 {
 610         if (has_newer_autopwm(data))
 611                 return val;
 612         else
 613                 return val >> 1;
 614 }
 615
 616 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 617 {
 618         if (has_newer_autopwm(data))
 619                 return reg;
 620         else
 621                 return (reg & 0x7f) << 1;
 622 }
 623
 624 static int DIV_TO_REG(int val)
 625 {
 626         int answer = 0;
 627
 628         while (answer < 7 && (val >>= 1))
 629                 answer++;
 630         return answer;
 631 }
 632
 633 #define DIV_FROM_REG(val) BIT(val)
 634
 635 /*
 636  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 637  * depending on the chip type, to calculate the actual PWM frequency.
 638  *
 639  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 640  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 641  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 642  * sometimes just one. It is unknown if this is a datasheet error or real,
 643  * so this is ignored for now.
 644  */
 645 static const unsigned int pwm_freq[8] = {
 646         48000000,
 647         24000000,
 648         12000000,
 649         8000000,
 650         6000000,
 651         3000000,
 652         1500000,
 653         750000,
 654 };
 655
 656 /*
 657  * Must be called with data->update_lock held, except during initialization.
 658  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 659  * would slow down the IT87 access and should not be necessary.
 660  */
 661 static int it87_read_value(struct it87_data *data, u8 reg)
 662 {
 663         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 664         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 665 }
 666
 667 /*
 668  * Must be called with data->update_lock held, except during initialization.
 669  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 670  * would slow down the IT87 access and should not be necessary.
 671  */
 672 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 673 {
 674         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 675         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 676 }
 677
 678 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 679 {
 680         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 681         if (has_newer_autopwm(data)) {
 682                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 683                 data->pwm_duty[nr] = it87_read_value(data,
 684                                                      IT87_REG_PWM_DUTY[nr]);
 685         } else {
 686                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 687                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 688                 else                            /* Manual mode */
 689                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 690         }
 691
 692         if (has_old_autopwm(data)) {
 693                 int i;
 694
 695                 for (i = 0; i < 5 ; i++)
 696                         data->auto_temp[nr][i] = it87_read_value(data,
 697                                                 IT87_REG_AUTO_TEMP(nr, i));
 698                 for (i = 0; i < 3 ; i++)
 699                         data->auto_pwm[nr][i] = it87_read_value(data,
 700                                                 IT87_REG_AUTO_PWM(nr, i));
 701         } else if (has_newer_autopwm(data)) {
 702                 int i;
 703
 704                 /*
 705                  * 0: temperature hysteresis (base + 5)
 706                  * 1: fan off temperature (base + 0)
 707                  * 2: fan start temperature (base + 1)
 708                  * 3: fan max temperature (base + 2)
 709                  */
 710                 data->auto_temp[nr][0] =
 711                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 712
 713                 for (i = 0; i < 3 ; i++)
 714                         data->auto_temp[nr][i + 1] =
 715                                 it87_read_value(data,
 716                                                 IT87_REG_AUTO_TEMP(nr, i));
 717                 /*
 718                  * 0: start pwm value (base + 3)
 719                  * 1: pwm slope (base + 4, 1/8th pwm)
 720                  */
 721                 data->auto_pwm[nr][0] =
 722                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 723                 data->auto_pwm[nr][1] =
 724                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 725         }
 726 }
 727
 728 static struct it87_data *it87_update_device(struct device *dev)
 729 {
 730         struct it87_data *data = dev_get_drvdata(dev);
 731         int i;
 732
 733         mutex_lock(&data->update_lock);
 734
 735         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 736             !data->valid) {
 737                 if (update_vbat) {
 738                         /*
 739                          * Cleared after each update, so reenable.  Value
 740                          * returned by this read will be previous value
 741                          */
 742                         it87_write_value(data, IT87_REG_CONFIG,
 743                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 744                 }
 745                 for (i = 0; i < NUM_VIN; i++) {
 746                         if (!(data->has_in & BIT(i)))
 747                                 continue;
 748
 749                         data->in[i][0] =
 750                                 it87_read_value(data, IT87_REG_VIN[i]);
 751
 752                         /* VBAT and AVCC don't have limit registers */
 753                         if (i >= NUM_VIN_LIMIT)
 754                                 continue;
 755
 756                         data->in[i][1] =
 757                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 758                         data->in[i][2] =
 759                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 760                 }
 761
 762                 for (i = 0; i < NUM_FAN; i++) {
 763                         /* Skip disabled fans */
 764                         if (!(data->has_fan & BIT(i)))
 765                                 continue;
 766
 767                         data->fan[i][1] =
 768                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 769                         data->fan[i][0] = it87_read_value(data,
 770                                        IT87_REG_FAN[i]);
 771                         /* Add high byte if in 16-bit mode */
 772                         if (has_16bit_fans(data)) {
 773                                 data->fan[i][0] |= it87_read_value(data,
 774                                                 IT87_REG_FANX[i]) << 8;
 775                                 data->fan[i][1] |= it87_read_value(data,
 776                                                 IT87_REG_FANX_MIN[i]) << 8;
 777                         }
 778                 }
 779                 for (i = 0; i < NUM_TEMP; i++) {
 780                         if (!(data->has_temp & BIT(i)))
 781                                 continue;
 782                         data->temp[i][0] =
 783                                 it87_read_value(data, IT87_REG_TEMP(i));
 784
 785                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 786                                 data->temp[i][3] =
 787                                   it87_read_value(data,
 788                                                   IT87_REG_TEMP_OFFSET[i]);
 789
 790                         if (i >= NUM_TEMP_LIMIT)
 791                                 continue;
 792
 793                         data->temp[i][1] =
 794                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 795                         data->temp[i][2] =
 796                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 797                 }
 798
 799                 /* Newer chips don't have clock dividers */
 800                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 801                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 802                         data->fan_div[0] = i & 0x07;
 803                         data->fan_div[1] = (i >> 3) & 0x07;
 804                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 805                 }
 806
 807                 data->alarms =
 808                         it87_read_value(data, IT87_REG_ALARM1) |
 809                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 810                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 811                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 812
 813                 data->fan_main_ctrl = it87_read_value(data,
 814                                 IT87_REG_FAN_MAIN_CTRL);
 815                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 816                 for (i = 0; i < NUM_PWM; i++) {
 817                         if (!(data->has_pwm & BIT(i)))
 818                                 continue;
 819                         it87_update_pwm_ctrl(data, i);
 820                 }
 821
 822                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 823                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 824                 /*
 825                  * The IT8705F does not have VID capability.
 826                  * The IT8718F and later don't use IT87_REG_VID for the
 827                  * same purpose.
 828                  */
 829                 if (data->type == it8712 || data->type == it8716) {
 830                         data->vid = it87_read_value(data, IT87_REG_VID);
 831                         /*
 832                          * The older IT8712F revisions had only 5 VID pins,
 833                          * but we assume it is always safe to read 6 bits.
 834                          */
 835                         data->vid &= 0x3f;
 836                 }
 837                 data->last_updated = jiffies;
 838                 data->valid = 1;
 839         }
 840
 841         mutex_unlock(&data->update_lock);
 842
 843         return data;
 844 }
 845
 846 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 847                        char *buf)
 848 {
 849         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 850         struct it87_data *data = it87_update_device(dev);
 851         int index = sattr->index;
 852         int nr = sattr->nr;
 853
 854         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 855 }
 856
 857 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 858                       const char *buf, size_t count)
 859 {
 860         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 861         struct it87_data *data = dev_get_drvdata(dev);
 862         int index = sattr->index;
 863         int nr = sattr->nr;
 864         unsigned long val;
 865
 866         if (kstrtoul(buf, 10, &val) < 0)
 867                 return -EINVAL;
 868
 869         mutex_lock(&data->update_lock);
 870         data->in[nr][index] = in_to_reg(data, nr, val);
 871         it87_write_value(data,
 872                          index == 1 ? IT87_REG_VIN_MIN(nr)
 873                                     : IT87_REG_VIN_MAX(nr),
 874                          data->in[nr][index]);
 875         mutex_unlock(&data->update_lock);
 876         return count;
 877 }
 878
 879 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 880 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 881                             0, 1);
 882 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 883                             0, 2);
 884
 885 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 886 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 887                             1, 1);
 888 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 889                             1, 2);
 890
 891 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 892 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 893                             2, 1);
 894 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 895                             2, 2);
 896
 897 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 898 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 899                             3, 1);
 900 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 901                             3, 2);
 902
 903 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 904 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 905                             4, 1);
 906 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 907                             4, 2);
 908
 909 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 910 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 911                             5, 1);
 912 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 913                             5, 2);
 914
 915 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 916 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 917                             6, 1);
 918 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 919                             6, 2);
 920
 921 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 922 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 923                             7, 1);
 924 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 925                             7, 2);
 926
 927 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 928 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 929 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 930 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 931 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 932
 933 /* Up to 6 temperatures */
 934 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 935                          char *buf)
 936 {
 937         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 938         int nr = sattr->nr;
 939         int index = sattr->index;
 940         struct it87_data *data = it87_update_device(dev);
 941
 942         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 943 }
 944
 945 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 946                         const char *buf, size_t count)
 947 {
 948         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 949         int nr = sattr->nr;
 950         int index = sattr->index;
 951         struct it87_data *data = dev_get_drvdata(dev);
 952         long val;
 953         u8 reg, regval;
 954
 955         if (kstrtol(buf, 10, &val) < 0)
 956                 return -EINVAL;
 957
 958         mutex_lock(&data->update_lock);
 959
 960         switch (index) {
 961         default:
 962         case 1:
 963                 reg = IT87_REG_TEMP_LOW(nr);
 964                 break;
 965         case 2:
 966                 reg = IT87_REG_TEMP_HIGH(nr);
 967                 break;
 968         case 3:
 969                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 970                 if (!(regval & 0x80)) {
 971                         regval |= 0x80;
 972                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 973                 }
 974                 data->valid = 0;
 975                 reg = IT87_REG_TEMP_OFFSET[nr];
 976                 break;
 977         }
 978
 979         data->temp[nr][index] = TEMP_TO_REG(val);
 980         it87_write_value(data, reg, data->temp[nr][index]);
 981         mutex_unlock(&data->update_lock);
 982         return count;
 983 }
 984
 985 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 986 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 987                             0, 1);
 988 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 989                             0, 2);
 990 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
 991                             set_temp, 0, 3);
 992 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
 993 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 994                             1, 1);
 995 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 996                             1, 2);
 997 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
 998                             set_temp, 1, 3);
 999 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1000 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1001                             2, 1);
1002 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1003                             2, 2);
1004 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1005                             set_temp, 2, 3);
1006 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1007 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1008 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1009
1010 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1011                               char *buf)
1012 {
1013         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1014         int nr = sensor_attr->index;
1015         struct it87_data *data = it87_update_device(dev);
1016         u8 reg = data->sensor;      /* In case value is updated while used */
1017         u8 extra = data->extra;
1018
1019         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1020             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1021                 return sprintf(buf, "6\n");  /* Intel PECI */
1022         if (reg & (1 << nr))
1023                 return sprintf(buf, "3\n");  /* thermal diode */
1024         if (reg & (8 << nr))
1025                 return sprintf(buf, "4\n");  /* thermistor */
1026         return sprintf(buf, "0\n");      /* disabled */
1027 }
1028
1029 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1030                              const char *buf, size_t count)
1031 {
1032         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1033         int nr = sensor_attr->index;
1034
1035         struct it87_data *data = dev_get_drvdata(dev);
1036         long val;
1037         u8 reg, extra;
1038
1039         if (kstrtol(buf, 10, &val) < 0)
1040                 return -EINVAL;
1041
1042         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1043         reg &= ~(1 << nr);
1044         reg &= ~(8 << nr);
1045         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1046                 reg &= 0x3f;
1047         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1048         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1049                 extra &= 0x7f;
1050         if (val == 2) { /* backwards compatibility */
1051                 dev_warn(dev,
1052                          "Sensor type 2 is deprecated, please use 4 instead\n");
1053                 val = 4;
1054         }
1055         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1056         if (val == 3)
1057                 reg |= 1 << nr;
1058         else if (val == 4)
1059                 reg |= 8 << nr;
1060         else if (has_temp_peci(data, nr) && val == 6)
1061                 reg |= (nr + 1) << 6;
1062         else if (has_temp_old_peci(data, nr) && val == 6)
1063                 extra |= 0x80;
1064         else if (val != 0)
1065                 return -EINVAL;
1066
1067         mutex_lock(&data->update_lock);
1068         data->sensor = reg;
1069         data->extra = extra;
1070         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1071         if (has_temp_old_peci(data, nr))
1072                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1073         data->valid = 0;        /* Force cache refresh */
1074         mutex_unlock(&data->update_lock);
1075         return count;
1076 }
1077
1078 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1079                           set_temp_type, 0);
1080 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1081                           set_temp_type, 1);
1082 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1083                           set_temp_type, 2);
1084
1085 /* 6 Fans */
1086
1087 static int pwm_mode(const struct it87_data *data, int nr)
1088 {
1089         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1090                 return 0;                               /* Full speed */
1091         if (data->pwm_ctrl[nr] & 0x80)
1092                 return 2;                               /* Automatic mode */
1093         if ((data->type == it8603 || nr >= 3) &&
1094             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1095                 return 0;                       /* Full speed */
1096
1097         return 1;                               /* Manual mode */
1098 }
1099
1100 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1101                         char *buf)
1102 {
1103         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1104         int nr = sattr->nr;
1105         int index = sattr->index;
1106         int speed;
1107         struct it87_data *data = it87_update_device(dev);
1108
1109         speed = has_16bit_fans(data) ?
1110                 FAN16_FROM_REG(data->fan[nr][index]) :
1111                 FAN_FROM_REG(data->fan[nr][index],
1112                              DIV_FROM_REG(data->fan_div[nr]));
1113         return sprintf(buf, "%d\n", speed);
1114 }
1115
1116 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1117                             char *buf)
1118 {
1119         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1120         struct it87_data *data = it87_update_device(dev);
1121         int nr = sensor_attr->index;
1122
1123         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1124 }
1125
1126 static ssize_t show_pwm_enable(struct device *dev,
1127                                struct device_attribute *attr, char *buf)
1128 {
1129         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1130         struct it87_data *data = it87_update_device(dev);
1131         int nr = sensor_attr->index;
1132
1133         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1134 }
1135
1136 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1137                         char *buf)
1138 {
1139         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1140         struct it87_data *data = it87_update_device(dev);
1141         int nr = sensor_attr->index;
1142
1143         return sprintf(buf, "%d\n",
1144                        pwm_from_reg(data, data->pwm_duty[nr]));
1145 }
1146
1147 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1148                              char *buf)
1149 {
1150         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1151         struct it87_data *data = it87_update_device(dev);
1152         int nr = sensor_attr->index;
1153         unsigned int freq;
1154         int index;
1155
1156         if (has_pwm_freq2(data) && nr == 1)
1157                 index = (data->extra >> 4) & 0x07;
1158         else
1159                 index = (data->fan_ctl >> 4) & 0x07;
1160
1161         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1162
1163         return sprintf(buf, "%u\n", freq);
1164 }
1165
1166 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1167                        const char *buf, size_t count)
1168 {
1169         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1170         int nr = sattr->nr;
1171         int index = sattr->index;
1172
1173         struct it87_data *data = dev_get_drvdata(dev);
1174         long val;
1175         u8 reg;
1176
1177         if (kstrtol(buf, 10, &val) < 0)
1178                 return -EINVAL;
1179
1180         mutex_lock(&data->update_lock);
1181
1182         if (has_16bit_fans(data)) {
1183                 data->fan[nr][index] = FAN16_TO_REG(val);
1184                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1185                                  data->fan[nr][index] & 0xff);
1186                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1187                                  data->fan[nr][index] >> 8);
1188         } else {
1189                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1190                 switch (nr) {
1191                 case 0:
1192                         data->fan_div[nr] = reg & 0x07;
1193                         break;
1194                 case 1:
1195                         data->fan_div[nr] = (reg >> 3) & 0x07;
1196                         break;
1197                 case 2:
1198                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1199                         break;
1200                 }
1201                 data->fan[nr][index] =
1202                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1203                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1204                                  data->fan[nr][index]);
1205         }
1206
1207         mutex_unlock(&data->update_lock);
1208         return count;
1209 }
1210
1211 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1212                            const char *buf, size_t count)
1213 {
1214         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1215         struct it87_data *data = dev_get_drvdata(dev);
1216         int nr = sensor_attr->index;
1217         unsigned long val;
1218         int min;
1219         u8 old;
1220
1221         if (kstrtoul(buf, 10, &val) < 0)
1222                 return -EINVAL;
1223
1224         mutex_lock(&data->update_lock);
1225         old = it87_read_value(data, IT87_REG_FAN_DIV);
1226
1227         /* Save fan min limit */
1228         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1229
1230         switch (nr) {
1231         case 0:
1232         case 1:
1233                 data->fan_div[nr] = DIV_TO_REG(val);
1234                 break;
1235         case 2:
1236                 if (val < 8)
1237                         data->fan_div[nr] = 1;
1238                 else
1239                         data->fan_div[nr] = 3;
1240         }
1241         val = old & 0x80;
1242         val |= (data->fan_div[0] & 0x07);
1243         val |= (data->fan_div[1] & 0x07) << 3;
1244         if (data->fan_div[2] == 3)
1245                 val |= 0x1 << 6;
1246         it87_write_value(data, IT87_REG_FAN_DIV, val);
1247
1248         /* Restore fan min limit */
1249         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1250         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1251
1252         mutex_unlock(&data->update_lock);
1253         return count;
1254 }
1255
1256 /* Returns 0 if OK, -EINVAL otherwise */
1257 static int check_trip_points(struct device *dev, int nr)
1258 {
1259         const struct it87_data *data = dev_get_drvdata(dev);
1260         int i, err = 0;
1261
1262         if (has_old_autopwm(data)) {
1263                 for (i = 0; i < 3; i++) {
1264                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1265                                 err = -EINVAL;
1266                 }
1267                 for (i = 0; i < 2; i++) {
1268                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1269                                 err = -EINVAL;
1270                 }
1271         } else if (has_newer_autopwm(data)) {
1272                 for (i = 1; i < 3; i++) {
1273                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1274                                 err = -EINVAL;
1275                 }
1276         }
1277
1278         if (err) {
1279                 dev_err(dev,
1280                         "Inconsistent trip points, not switching to automatic mode\n");
1281                 dev_err(dev, "Adjust the trip points and try again\n");
1282         }
1283         return err;
1284 }
1285
1286 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1287                               const char *buf, size_t count)
1288 {
1289         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1290         struct it87_data *data = dev_get_drvdata(dev);
1291         int nr = sensor_attr->index;
1292         long val;
1293
1294         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1295                 return -EINVAL;
1296
1297         /* Check trip points before switching to automatic mode */
1298         if (val == 2) {
1299                 if (check_trip_points(dev, nr) < 0)
1300                         return -EINVAL;
1301         }
1302
1303         mutex_lock(&data->update_lock);
1304
1305         if (val == 0) {
1306                 if (nr < 3 && data->type != it8603) {
1307                         int tmp;
1308                         /* make sure the fan is on when in on/off mode */
1309                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1310                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1311                         /* set on/off mode */
1312                         data->fan_main_ctrl &= ~BIT(nr);
1313                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1314                                          data->fan_main_ctrl);
1315                 } else {
1316                         /* No on/off mode, set maximum pwm value */
1317                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1318                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1319                                          data->pwm_duty[nr]);
1320                         /* and set manual mode */
1321                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1322                                              data->pwm_temp_map[nr] :
1323                                              data->pwm_duty[nr];
1324                         it87_write_value(data, IT87_REG_PWM[nr],
1325                                          data->pwm_ctrl[nr]);
1326                 }
1327         } else {
1328                 if (val == 1)                           /* Manual mode */
1329                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1330                                              data->pwm_temp_map[nr] :
1331                                              data->pwm_duty[nr];
1332                 else                                    /* Automatic mode */
1333                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1334                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1335
1336                 if (data->type != it8603 && nr < 3) {
1337                         /* set SmartGuardian mode */
1338                         data->fan_main_ctrl |= BIT(nr);
1339                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1340                                          data->fan_main_ctrl);
1341                 }
1342         }
1343
1344         mutex_unlock(&data->update_lock);
1345         return count;
1346 }
1347
1348 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1349                        const char *buf, size_t count)
1350 {
1351         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1352         struct it87_data *data = dev_get_drvdata(dev);
1353         int nr = sensor_attr->index;
1354         long val;
1355
1356         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1357                 return -EINVAL;
1358
1359         mutex_lock(&data->update_lock);
1360         if (has_newer_autopwm(data)) {
1361                 /*
1362                  * If we are in automatic mode, the PWM duty cycle register
1363                  * is read-only so we can't write the value.
1364                  */
1365                 if (data->pwm_ctrl[nr] & 0x80) {
1366                         mutex_unlock(&data->update_lock);
1367                         return -EBUSY;
1368                 }
1369                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1370                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1371                                  data->pwm_duty[nr]);
1372         } else {
1373                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1374                 /*
1375                  * If we are in manual mode, write the duty cycle immediately;
1376                  * otherwise, just store it for later use.
1377                  */
1378                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1379                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1380                         it87_write_value(data, IT87_REG_PWM[nr],
1381                                          data->pwm_ctrl[nr]);
1382                 }
1383         }
1384         mutex_unlock(&data->update_lock);
1385         return count;
1386 }
1387
1388 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1389                             const char *buf, size_t count)
1390 {
1391         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1392         struct it87_data *data = dev_get_drvdata(dev);
1393         int nr = sensor_attr->index;
1394         unsigned long val;
1395         int i;
1396
1397         if (kstrtoul(buf, 10, &val) < 0)
1398                 return -EINVAL;
1399
1400         val = clamp_val(val, 0, 1000000);
1401         val *= has_newer_autopwm(data) ? 256 : 128;
1402
1403         /* Search for the nearest available frequency */
1404         for (i = 0; i < 7; i++) {
1405                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1406                         break;
1407         }
1408
1409         mutex_lock(&data->update_lock);
1410         if (nr == 0) {
1411                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1412                 data->fan_ctl |= i << 4;
1413                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1414         } else {
1415                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1416                 data->extra |= i << 4;
1417                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1418         }
1419         mutex_unlock(&data->update_lock);
1420
1421         return count;
1422 }
1423
1424 static ssize_t show_pwm_temp_map(struct device *dev,
1425                                  struct device_attribute *attr, char *buf)
1426 {
1427         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1428         struct it87_data *data = it87_update_device(dev);
1429         int nr = sensor_attr->index;
1430         int map;
1431
1432         map = data->pwm_temp_map[nr];
1433         if (map >= 3)
1434                 map = 0;        /* Should never happen */
1435         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1436                 map += 3;
1437
1438         return sprintf(buf, "%d\n", (int)BIT(map));
1439 }
1440
1441 static ssize_t set_pwm_temp_map(struct device *dev,
1442                                 struct device_attribute *attr, const char *buf,
1443                                 size_t count)
1444 {
1445         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1446         struct it87_data *data = dev_get_drvdata(dev);
1447         int nr = sensor_attr->index;
1448         long val;
1449         u8 reg;
1450
1451         if (kstrtol(buf, 10, &val) < 0)
1452                 return -EINVAL;
1453
1454         if (nr >= 3)
1455                 val -= 3;
1456
1457         switch (val) {
1458         case BIT(0):
1459                 reg = 0x00;
1460                 break;
1461         case BIT(1):
1462                 reg = 0x01;
1463                 break;
1464         case BIT(2):
1465                 reg = 0x02;
1466                 break;
1467         default:
1468                 return -EINVAL;
1469         }
1470
1471         mutex_lock(&data->update_lock);
1472         data->pwm_temp_map[nr] = reg;
1473         /*
1474          * If we are in automatic mode, write the temp mapping immediately;
1475          * otherwise, just store it for later use.
1476          */
1477         if (data->pwm_ctrl[nr] & 0x80) {
1478                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1479                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1480         }
1481         mutex_unlock(&data->update_lock);
1482         return count;
1483 }
1484
1485 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1486                              char *buf)
1487 {
1488         struct it87_data *data = it87_update_device(dev);
1489         struct sensor_device_attribute_2 *sensor_attr =
1490                         to_sensor_dev_attr_2(attr);
1491         int nr = sensor_attr->nr;
1492         int point = sensor_attr->index;
1493
1494         return sprintf(buf, "%d\n",
1495                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1496 }
1497
1498 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1499                             const char *buf, size_t count)
1500 {
1501         struct it87_data *data = dev_get_drvdata(dev);
1502         struct sensor_device_attribute_2 *sensor_attr =
1503                         to_sensor_dev_attr_2(attr);
1504         int nr = sensor_attr->nr;
1505         int point = sensor_attr->index;
1506         int regaddr;
1507         long val;
1508
1509         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1510                 return -EINVAL;
1511
1512         mutex_lock(&data->update_lock);
1513         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1514         if (has_newer_autopwm(data))
1515                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1516         else
1517                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1518         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1519         mutex_unlock(&data->update_lock);
1520         return count;
1521 }
1522
1523 static ssize_t show_auto_pwm_slope(struct device *dev,
1524                                    struct device_attribute *attr, char *buf)
1525 {
1526         struct it87_data *data = it87_update_device(dev);
1527         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1528         int nr = sensor_attr->index;
1529
1530         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1531 }
1532
1533 static ssize_t set_auto_pwm_slope(struct device *dev,
1534                                   struct device_attribute *attr,
1535                                   const char *buf, size_t count)
1536 {
1537         struct it87_data *data = dev_get_drvdata(dev);
1538         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1539         int nr = sensor_attr->index;
1540         unsigned long val;
1541
1542         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1543                 return -EINVAL;
1544
1545         mutex_lock(&data->update_lock);
1546         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1547         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1548                          data->auto_pwm[nr][1]);
1549         mutex_unlock(&data->update_lock);
1550         return count;
1551 }
1552
1553 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1554                               char *buf)
1555 {
1556         struct it87_data *data = it87_update_device(dev);
1557         struct sensor_device_attribute_2 *sensor_attr =
1558                         to_sensor_dev_attr_2(attr);
1559         int nr = sensor_attr->nr;
1560         int point = sensor_attr->index;
1561         int reg;
1562
1563         if (has_old_autopwm(data) || point)
1564                 reg = data->auto_temp[nr][point];
1565         else
1566                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1567
1568         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1569 }
1570
1571 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1572                              const char *buf, size_t count)
1573 {
1574         struct it87_data *data = dev_get_drvdata(dev);
1575         struct sensor_device_attribute_2 *sensor_attr =
1576                         to_sensor_dev_attr_2(attr);
1577         int nr = sensor_attr->nr;
1578         int point = sensor_attr->index;
1579         long val;
1580         int reg;
1581
1582         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1583                 return -EINVAL;
1584
1585         mutex_lock(&data->update_lock);
1586         if (has_newer_autopwm(data) && !point) {
1587                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1588                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1589                 data->auto_temp[nr][0] = reg;
1590                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1591         } else {
1592                 reg = TEMP_TO_REG(val);
1593                 data->auto_temp[nr][point] = reg;
1594                 if (has_newer_autopwm(data))
1595                         point--;
1596                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1597         }
1598         mutex_unlock(&data->update_lock);
1599         return count;
1600 }
1601
1602 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1603 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1604                             0, 1);
1605 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1606                           set_fan_div, 0);
1607
1608 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1609 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1610                             1, 1);
1611 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1612                           set_fan_div, 1);
1613
1614 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1615 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1616                             2, 1);
1617 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1618                           set_fan_div, 2);
1619
1620 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1621 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1622                             3, 1);
1623
1624 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1625 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1626                             4, 1);
1627
1628 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1629 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1630                             5, 1);
1631
1632 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1633                           show_pwm_enable, set_pwm_enable, 0);
1634 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1635 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1636                           set_pwm_freq, 0);
1637 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1638                           show_pwm_temp_map, set_pwm_temp_map, 0);
1639 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1640                             show_auto_pwm, set_auto_pwm, 0, 0);
1641 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1642                             show_auto_pwm, set_auto_pwm, 0, 1);
1643 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1644                             show_auto_pwm, set_auto_pwm, 0, 2);
1645 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1646                             show_auto_pwm, NULL, 0, 3);
1647 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1648                             show_auto_temp, set_auto_temp, 0, 1);
1649 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1650                             show_auto_temp, set_auto_temp, 0, 0);
1651 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1652                             show_auto_temp, set_auto_temp, 0, 2);
1653 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1654                             show_auto_temp, set_auto_temp, 0, 3);
1655 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1656                             show_auto_temp, set_auto_temp, 0, 4);
1657 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1658                             show_auto_pwm, set_auto_pwm, 0, 0);
1659 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1660                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1661
1662 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1663                           show_pwm_enable, set_pwm_enable, 1);
1664 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1665 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1666 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1667                           show_pwm_temp_map, set_pwm_temp_map, 1);
1668 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1669                             show_auto_pwm, set_auto_pwm, 1, 0);
1670 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1671                             show_auto_pwm, set_auto_pwm, 1, 1);
1672 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1673                             show_auto_pwm, set_auto_pwm, 1, 2);
1674 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1675                             show_auto_pwm, NULL, 1, 3);
1676 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1677                             show_auto_temp, set_auto_temp, 1, 1);
1678 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1679                             show_auto_temp, set_auto_temp, 1, 0);
1680 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1681                             show_auto_temp, set_auto_temp, 1, 2);
1682 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1683                             show_auto_temp, set_auto_temp, 1, 3);
1684 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1685                             show_auto_temp, set_auto_temp, 1, 4);
1686 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1687                             show_auto_pwm, set_auto_pwm, 1, 0);
1688 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1689                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1690
1691 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1692                           show_pwm_enable, set_pwm_enable, 2);
1693 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1694 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1695 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1696                           show_pwm_temp_map, set_pwm_temp_map, 2);
1697 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1698                             show_auto_pwm, set_auto_pwm, 2, 0);
1699 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1700                             show_auto_pwm, set_auto_pwm, 2, 1);
1701 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1702                             show_auto_pwm, set_auto_pwm, 2, 2);
1703 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1704                             show_auto_pwm, NULL, 2, 3);
1705 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1706                             show_auto_temp, set_auto_temp, 2, 1);
1707 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1708                             show_auto_temp, set_auto_temp, 2, 0);
1709 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1710                             show_auto_temp, set_auto_temp, 2, 2);
1711 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1712                             show_auto_temp, set_auto_temp, 2, 3);
1713 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1714                             show_auto_temp, set_auto_temp, 2, 4);
1715 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1716                             show_auto_pwm, set_auto_pwm, 2, 0);
1717 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1718                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1719
1720 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1721                           show_pwm_enable, set_pwm_enable, 3);
1722 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1723 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1724 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1725                           show_pwm_temp_map, set_pwm_temp_map, 3);
1726 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1727                             show_auto_temp, set_auto_temp, 2, 1);
1728 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1729                             show_auto_temp, set_auto_temp, 2, 0);
1730 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1731                             show_auto_temp, set_auto_temp, 2, 2);
1732 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1733                             show_auto_temp, set_auto_temp, 2, 3);
1734 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1735                             show_auto_pwm, set_auto_pwm, 3, 0);
1736 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1737                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1738
1739 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1740                           show_pwm_enable, set_pwm_enable, 4);
1741 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1742 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1743 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1744                           show_pwm_temp_map, set_pwm_temp_map, 4);
1745 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1746                             show_auto_temp, set_auto_temp, 2, 1);
1747 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1748                             show_auto_temp, set_auto_temp, 2, 0);
1749 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1750                             show_auto_temp, set_auto_temp, 2, 2);
1751 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1752                             show_auto_temp, set_auto_temp, 2, 3);
1753 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1754                             show_auto_pwm, set_auto_pwm, 4, 0);
1755 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1756                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1757
1758 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1759                           show_pwm_enable, set_pwm_enable, 5);
1760 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1761 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1762 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1763                           show_pwm_temp_map, set_pwm_temp_map, 5);
1764 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1765                             show_auto_temp, set_auto_temp, 2, 1);
1766 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1767                             show_auto_temp, set_auto_temp, 2, 0);
1768 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1769                             show_auto_temp, set_auto_temp, 2, 2);
1770 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1771                             show_auto_temp, set_auto_temp, 2, 3);
1772 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1773                             show_auto_pwm, set_auto_pwm, 5, 0);
1774 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1775                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1776
1777 /* Alarms */
1778 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1779                            char *buf)
1780 {
1781         struct it87_data *data = it87_update_device(dev);
1782
1783         return sprintf(buf, "%u\n", data->alarms);
1784 }
1785 static DEVICE_ATTR_RO(alarms);
1786
1787 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1788                           char *buf)
1789 {
1790         struct it87_data *data = it87_update_device(dev);
1791         int bitnr = to_sensor_dev_attr(attr)->index;
1792
1793         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1794 }
1795
1796 static ssize_t clear_intrusion(struct device *dev,
1797                                struct device_attribute *attr, const char *buf,
1798                                size_t count)
1799 {
1800         struct it87_data *data = dev_get_drvdata(dev);
1801         int config;
1802         long val;
1803
1804         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1805                 return -EINVAL;
1806
1807         mutex_lock(&data->update_lock);
1808         config = it87_read_value(data, IT87_REG_CONFIG);
1809         if (config < 0) {
1810                 count = config;
1811         } else {
1812                 config |= BIT(5);
1813                 it87_write_value(data, IT87_REG_CONFIG, config);
1814                 /* Invalidate cache to force re-read */
1815                 data->valid = 0;
1816         }
1817         mutex_unlock(&data->update_lock);
1818
1819         return count;
1820 }
1821
1822 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1823 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1824 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1825 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1826 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1827 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1828 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1829 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1830 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1831 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1832 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1833 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1834 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1835 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1836 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1837 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1838 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1839 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1840                           show_alarm, clear_intrusion, 4);
1841
1842 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1843                          char *buf)
1844 {
1845         struct it87_data *data = it87_update_device(dev);
1846         int bitnr = to_sensor_dev_attr(attr)->index;
1847
1848         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1849 }
1850
1851 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1852                         const char *buf, size_t count)
1853 {
1854         int bitnr = to_sensor_dev_attr(attr)->index;
1855         struct it87_data *data = dev_get_drvdata(dev);
1856         long val;
1857
1858         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1859                 return -EINVAL;
1860
1861         mutex_lock(&data->update_lock);
1862         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1863         if (val)
1864                 data->beeps |= BIT(bitnr);
1865         else
1866                 data->beeps &= ~BIT(bitnr);
1867         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1868         mutex_unlock(&data->update_lock);
1869         return count;
1870 }
1871
1872 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1873                           show_beep, set_beep, 1);
1874 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1875 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1876 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1877 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1878 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1879 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1880 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1881 /* fanX_beep writability is set later */
1882 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1883 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1884 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1885 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1886 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1887 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1888 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1889                           show_beep, set_beep, 2);
1890 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1891 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1892
1893 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1894                         char *buf)
1895 {
1896         struct it87_data *data = dev_get_drvdata(dev);
1897
1898         return sprintf(buf, "%u\n", data->vrm);
1899 }
1900
1901 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1902                          const char *buf, size_t count)
1903 {
1904         struct it87_data *data = dev_get_drvdata(dev);
1905         unsigned long val;
1906
1907         if (kstrtoul(buf, 10, &val) < 0)
1908                 return -EINVAL;
1909
1910         data->vrm = val;
1911
1912         return count;
1913 }
1914 static DEVICE_ATTR_RW(vrm);
1915
1916 static ssize_t cpu0_vid_show(struct device *dev,
1917                              struct device_attribute *attr, char *buf)
1918 {
1919         struct it87_data *data = it87_update_device(dev);
1920
1921         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1922 }
1923 static DEVICE_ATTR_RO(cpu0_vid);
1924
1925 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1926                           char *buf)
1927 {
1928         static const char * const labels[] = {
1929                 "+5V",
1930                 "5VSB",
1931                 "Vbat",
1932         };
1933         static const char * const labels_it8721[] = {
1934                 "+3.3V",
1935                 "3VSB",
1936                 "Vbat",
1937         };
1938         struct it87_data *data = dev_get_drvdata(dev);
1939         int nr = to_sensor_dev_attr(attr)->index;
1940         const char *label;
1941
1942         if (has_vin3_5v(data) && nr == 0)
1943                 label = labels[0];
1944         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1945                 label = labels_it8721[nr];
1946         else
1947                 label = labels[nr];
1948
1949         return sprintf(buf, "%s\n", label);
1950 }
1951 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1952 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1953 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1954 /* AVCC3 */
1955 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1956
1957 static umode_t it87_in_is_visible(struct kobject *kobj,
1958                                   struct attribute *attr, int index)
1959 {
1960         struct device *dev = container_of(kobj, struct device, kobj);
1961         struct it87_data *data = dev_get_drvdata(dev);
1962         int i = index / 5;      /* voltage index */
1963         int a = index % 5;      /* attribute index */
1964
1965         if (index >= 40) {      /* in8 and higher only have input attributes */
1966                 i = index - 40 + 8;
1967                 a = 0;
1968         }
1969
1970         if (!(data->has_in & BIT(i)))
1971                 return 0;
1972
1973         if (a == 4 && !data->has_beep)
1974                 return 0;
1975
1976         return attr->mode;
1977 }
1978
1979 static struct attribute *it87_attributes_in[] = {
1980         &sensor_dev_attr_in0_input.dev_attr.attr,
1981         &sensor_dev_attr_in0_min.dev_attr.attr,
1982         &sensor_dev_attr_in0_max.dev_attr.attr,
1983         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1984         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
1985
1986         &sensor_dev_attr_in1_input.dev_attr.attr,
1987         &sensor_dev_attr_in1_min.dev_attr.attr,
1988         &sensor_dev_attr_in1_max.dev_attr.attr,
1989         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1990         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
1991
1992         &sensor_dev_attr_in2_input.dev_attr.attr,
1993         &sensor_dev_attr_in2_min.dev_attr.attr,
1994         &sensor_dev_attr_in2_max.dev_attr.attr,
1995         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1996         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
1997
1998         &sensor_dev_attr_in3_input.dev_attr.attr,
1999         &sensor_dev_attr_in3_min.dev_attr.attr,
2000         &sensor_dev_attr_in3_max.dev_attr.attr,
2001         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2002         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2003
2004         &sensor_dev_attr_in4_input.dev_attr.attr,
2005         &sensor_dev_attr_in4_min.dev_attr.attr,
2006         &sensor_dev_attr_in4_max.dev_attr.attr,
2007         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2008         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2009
2010         &sensor_dev_attr_in5_input.dev_attr.attr,
2011         &sensor_dev_attr_in5_min.dev_attr.attr,
2012         &sensor_dev_attr_in5_max.dev_attr.attr,
2013         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2014         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2015
2016         &sensor_dev_attr_in6_input.dev_attr.attr,
2017         &sensor_dev_attr_in6_min.dev_attr.attr,
2018         &sensor_dev_attr_in6_max.dev_attr.attr,
2019         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2020         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2021
2022         &sensor_dev_attr_in7_input.dev_attr.attr,
2023         &sensor_dev_attr_in7_min.dev_attr.attr,
2024         &sensor_dev_attr_in7_max.dev_attr.attr,
2025         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2026         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2027
2028         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2029         &sensor_dev_attr_in9_input.dev_attr.attr,
2030         &sensor_dev_attr_in10_input.dev_attr.attr,
2031         &sensor_dev_attr_in11_input.dev_attr.attr,
2032         &sensor_dev_attr_in12_input.dev_attr.attr,
2033         NULL
2034 };
2035
2036 static const struct attribute_group it87_group_in = {
2037         .attrs = it87_attributes_in,
2038         .is_visible = it87_in_is_visible,
2039 };
2040
2041 static umode_t it87_temp_is_visible(struct kobject *kobj,
2042                                     struct attribute *attr, int index)
2043 {
2044         struct device *dev = container_of(kobj, struct device, kobj);
2045         struct it87_data *data = dev_get_drvdata(dev);
2046         int i = index / 7;      /* temperature index */
2047         int a = index % 7;      /* attribute index */
2048
2049         if (index >= 21) {
2050                 i = index - 21 + 3;
2051                 a = 0;
2052         }
2053
2054         if (!(data->has_temp & BIT(i)))
2055                 return 0;
2056
2057         if (a == 5 && !has_temp_offset(data))
2058                 return 0;
2059
2060         if (a == 6 && !data->has_beep)
2061                 return 0;
2062
2063         return attr->mode;
2064 }
2065
2066 static struct attribute *it87_attributes_temp[] = {
2067         &sensor_dev_attr_temp1_input.dev_attr.attr,
2068         &sensor_dev_attr_temp1_max.dev_attr.attr,
2069         &sensor_dev_attr_temp1_min.dev_attr.attr,
2070         &sensor_dev_attr_temp1_type.dev_attr.attr,
2071         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2072         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2073         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2074
2075         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2076         &sensor_dev_attr_temp2_max.dev_attr.attr,
2077         &sensor_dev_attr_temp2_min.dev_attr.attr,
2078         &sensor_dev_attr_temp2_type.dev_attr.attr,
2079         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2080         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2081         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2082
2083         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2084         &sensor_dev_attr_temp3_max.dev_attr.attr,
2085         &sensor_dev_attr_temp3_min.dev_attr.attr,
2086         &sensor_dev_attr_temp3_type.dev_attr.attr,
2087         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2088         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2089         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2090
2091         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2092         &sensor_dev_attr_temp5_input.dev_attr.attr,
2093         &sensor_dev_attr_temp6_input.dev_attr.attr,
2094         NULL
2095 };
2096
2097 static const struct attribute_group it87_group_temp = {
2098         .attrs = it87_attributes_temp,
2099         .is_visible = it87_temp_is_visible,
2100 };
2101
2102 static umode_t it87_is_visible(struct kobject *kobj,
2103                                struct attribute *attr, int index)
2104 {
2105         struct device *dev = container_of(kobj, struct device, kobj);
2106         struct it87_data *data = dev_get_drvdata(dev);
2107
2108         if ((index == 2 || index == 3) && !data->has_vid)
2109                 return 0;
2110
2111         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2112                 return 0;
2113
2114         return attr->mode;
2115 }
2116
2117 static struct attribute *it87_attributes[] = {
2118         &dev_attr_alarms.attr,
2119         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2120         &dev_attr_vrm.attr,                             /* 2 */
2121         &dev_attr_cpu0_vid.attr,                        /* 3 */
2122         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2123         &sensor_dev_attr_in7_label.dev_attr.attr,
2124         &sensor_dev_attr_in8_label.dev_attr.attr,
2125         &sensor_dev_attr_in9_label.dev_attr.attr,
2126         NULL
2127 };
2128
2129 static const struct attribute_group it87_group = {
2130         .attrs = it87_attributes,
2131         .is_visible = it87_is_visible,
2132 };
2133
2134 static umode_t it87_fan_is_visible(struct kobject *kobj,
2135                                    struct attribute *attr, int index)
2136 {
2137         struct device *dev = container_of(kobj, struct device, kobj);
2138         struct it87_data *data = dev_get_drvdata(dev);
2139         int i = index / 5;      /* fan index */
2140         int a = index % 5;      /* attribute index */
2141
2142         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2143                 i = (index - 15) / 4 + 3;
2144                 a = (index - 15) % 4;
2145         }
2146
2147         if (!(data->has_fan & BIT(i)))
2148                 return 0;
2149
2150         if (a == 3) {                           /* beep */
2151                 if (!data->has_beep)
2152                         return 0;
2153                 /* first fan beep attribute is writable */
2154                 if (i == __ffs(data->has_fan))
2155                         return attr->mode | S_IWUSR;
2156         }
2157
2158         if (a == 4 && has_16bit_fans(data))     /* divisor */
2159                 return 0;
2160
2161         return attr->mode;
2162 }
2163
2164 static struct attribute *it87_attributes_fan[] = {
2165         &sensor_dev_attr_fan1_input.dev_attr.attr,
2166         &sensor_dev_attr_fan1_min.dev_attr.attr,
2167         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2168         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2169         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2170
2171         &sensor_dev_attr_fan2_input.dev_attr.attr,
2172         &sensor_dev_attr_fan2_min.dev_attr.attr,
2173         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2174         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2175         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2176
2177         &sensor_dev_attr_fan3_input.dev_attr.attr,
2178         &sensor_dev_attr_fan3_min.dev_attr.attr,
2179         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2180         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2181         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2182
2183         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2184         &sensor_dev_attr_fan4_min.dev_attr.attr,
2185         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2186         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2187
2188         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2189         &sensor_dev_attr_fan5_min.dev_attr.attr,
2190         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2191         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2192
2193         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2194         &sensor_dev_attr_fan6_min.dev_attr.attr,
2195         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2196         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2197         NULL
2198 };
2199
2200 static const struct attribute_group it87_group_fan = {
2201         .attrs = it87_attributes_fan,
2202         .is_visible = it87_fan_is_visible,
2203 };
2204
2205 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2206                                    struct attribute *attr, int index)
2207 {
2208         struct device *dev = container_of(kobj, struct device, kobj);
2209         struct it87_data *data = dev_get_drvdata(dev);
2210         int i = index / 4;      /* pwm index */
2211         int a = index % 4;      /* attribute index */
2212
2213         if (!(data->has_pwm & BIT(i)))
2214                 return 0;
2215
2216         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2217         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2218                 return attr->mode | S_IWUSR;
2219
2220         /* pwm2_freq is writable if there are two pwm frequency selects */
2221         if (has_pwm_freq2(data) && i == 1 && a == 2)
2222                 return attr->mode | S_IWUSR;
2223
2224         return attr->mode;
2225 }
2226
2227 static struct attribute *it87_attributes_pwm[] = {
2228         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2229         &sensor_dev_attr_pwm1.dev_attr.attr,
2230         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2231         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2232
2233         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2234         &sensor_dev_attr_pwm2.dev_attr.attr,
2235         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2236         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2237
2238         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2239         &sensor_dev_attr_pwm3.dev_attr.attr,
2240         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2241         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2242
2243         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2244         &sensor_dev_attr_pwm4.dev_attr.attr,
2245         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2246         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2247
2248         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2249         &sensor_dev_attr_pwm5.dev_attr.attr,
2250         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2251         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2252
2253         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2254         &sensor_dev_attr_pwm6.dev_attr.attr,
2255         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2256         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2257
2258         NULL
2259 };
2260
2261 static const struct attribute_group it87_group_pwm = {
2262         .attrs = it87_attributes_pwm,
2263         .is_visible = it87_pwm_is_visible,
2264 };
2265
2266 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2267                                         struct attribute *attr, int index)
2268 {
2269         struct device *dev = container_of(kobj, struct device, kobj);
2270         struct it87_data *data = dev_get_drvdata(dev);
2271         int i = index / 11;     /* pwm index */
2272         int a = index % 11;     /* attribute index */
2273
2274         if (index >= 33) {      /* pwm 4..6 */
2275                 i = (index - 33) / 6 + 3;
2276                 a = (index - 33) % 6 + 4;
2277         }
2278
2279         if (!(data->has_pwm & BIT(i)))
2280                 return 0;
2281
2282         if (has_newer_autopwm(data)) {
2283                 if (a < 4)      /* no auto point pwm */
2284                         return 0;
2285                 if (a == 8)     /* no auto_point4 */
2286                         return 0;
2287         }
2288         if (has_old_autopwm(data)) {
2289                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2290                         return 0;
2291         }
2292
2293         return attr->mode;
2294 }
2295
2296 static struct attribute *it87_attributes_auto_pwm[] = {
2297         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2298         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2299         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2300         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2301         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2302         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2303         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2304         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2305         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2306         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2307         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2308
2309         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2310         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2311         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2312         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2313         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2314         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2315         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2316         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2317         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2318         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2319         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2320
2321         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2322         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2323         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2324         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2325         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2326         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2327         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2328         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2329         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2330         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2331         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2332
2333         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2334         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2335         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2336         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2337         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2338         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2339
2340         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2341         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2342         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2343         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2344         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2345         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2346
2347         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2348         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2349         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2350         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2351         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2352         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2353
2354         NULL,
2355 };
2356
2357 static const struct attribute_group it87_group_auto_pwm = {
2358         .attrs = it87_attributes_auto_pwm,
2359         .is_visible = it87_auto_pwm_is_visible,
2360 };
2361
2362 /* SuperIO detection - will change isa_address if a chip is found */
2363 static int __init it87_find(int sioaddr, unsigned short *address,
2364                             struct it87_sio_data *sio_data)
2365 {
2366         int err;
2367         u16 chip_type;
2368         const char *board_vendor, *board_name;
2369         const struct it87_devices *config;
2370
2371         err = superio_enter(sioaddr);
2372         if (err)
2373                 return err;
2374
2375         err = -ENODEV;
2376         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2377
2378         switch (chip_type) {
2379         case IT8705F_DEVID:
2380                 sio_data->type = it87;
2381                 break;
2382         case IT8712F_DEVID:
2383                 sio_data->type = it8712;
2384                 break;
2385         case IT8716F_DEVID:
2386         case IT8726F_DEVID:
2387                 sio_data->type = it8716;
2388                 break;
2389         case IT8718F_DEVID:
2390                 sio_data->type = it8718;
2391                 break;
2392         case IT8720F_DEVID:
2393                 sio_data->type = it8720;
2394                 break;
2395         case IT8721F_DEVID:
2396                 sio_data->type = it8721;
2397                 break;
2398         case IT8728F_DEVID:
2399                 sio_data->type = it8728;
2400                 break;
2401         case IT8732F_DEVID:
2402                 sio_data->type = it8732;
2403                 break;
2404         case IT8771E_DEVID:
2405                 sio_data->type = it8771;
2406                 break;
2407         case IT8772E_DEVID:
2408                 sio_data->type = it8772;
2409                 break;
2410         case IT8781F_DEVID:
2411                 sio_data->type = it8781;
2412                 break;
2413         case IT8782F_DEVID:
2414                 sio_data->type = it8782;
2415                 break;
2416         case IT8783E_DEVID:
2417                 sio_data->type = it8783;
2418                 break;
2419         case IT8786E_DEVID:
2420                 sio_data->type = it8786;
2421                 break;
2422         case IT8790E_DEVID:
2423                 sio_data->type = it8790;
2424                 break;
2425         case IT8603E_DEVID:
2426         case IT8623E_DEVID:
2427                 sio_data->type = it8603;
2428                 break;
2429         case IT8620E_DEVID:
2430                 sio_data->type = it8620;
2431                 break;
2432         case IT8622E_DEVID:
2433                 sio_data->type = it8622;
2434                 break;
2435         case IT8628E_DEVID:
2436                 sio_data->type = it8628;
2437                 break;
2438         case 0xffff:    /* No device at all */
2439                 goto exit;
2440         default:
2441                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2442                 goto exit;
2443         }
2444
2445         superio_select(sioaddr, PME);
2446         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2447                 pr_info("Device not activated, skipping\n");
2448                 goto exit;
2449         }
2450
2451         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2452         if (*address == 0) {
2453                 pr_info("Base address not set, skipping\n");
2454                 goto exit;
2455         }
2456
2457         err = 0;
2458         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2459         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2460                 it87_devices[sio_data->type].suffix,
2461                 *address, sio_data->revision);
2462
2463         config = &it87_devices[sio_data->type];
2464
2465         /* in7 (VSB or VCCH5V) is always internal on some chips */
2466         if (has_in7_internal(config))
2467                 sio_data->internal |= BIT(1);
2468
2469         /* in8 (Vbat) is always internal */
2470         sio_data->internal |= BIT(2);
2471
2472         /* in9 (AVCC3), always internal if supported */
2473         if (has_avcc3(config))
2474                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2475         else
2476                 sio_data->skip_in |= BIT(9);
2477
2478         if (!has_six_pwm(config))
2479                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2480
2481         if (!has_vid(config))
2482                 sio_data->skip_vid = 1;
2483
2484         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2485         if (sio_data->type == it87) {
2486                 /* The IT8705F has a different LD number for GPIO */
2487                 superio_select(sioaddr, 5);
2488                 sio_data->beep_pin = superio_inb(sioaddr,
2489                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2490         } else if (sio_data->type == it8783) {
2491                 int reg25, reg27, reg2a, reg2c, regef;
2492
2493                 superio_select(sioaddr, GPIO);
2494
2495                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2496                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2497                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2498                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2499                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2500
2501                 /* Check if fan3 is there or not */
2502                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2503                         sio_data->skip_fan |= BIT(2);
2504                 if ((reg25 & BIT(4)) ||
2505                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2506                         sio_data->skip_pwm |= BIT(2);
2507
2508                 /* Check if fan2 is there or not */
2509                 if (reg27 & BIT(7))
2510                         sio_data->skip_fan |= BIT(1);
2511                 if (reg27 & BIT(3))
2512                         sio_data->skip_pwm |= BIT(1);
2513
2514                 /* VIN5 */
2515                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2516                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2517
2518                 /* VIN6 */
2519                 if (reg27 & BIT(1))
2520                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2521
2522                 /*
2523                  * VIN7
2524                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2525                  */
2526                 if (reg27 & BIT(2)) {
2527                         /*
2528                          * The data sheet is a bit unclear regarding the
2529                          * internal voltage divider for VCCH5V. It says
2530                          * "This bit enables and switches VIN7 (pin 91) to the
2531                          * internal voltage divider for VCCH5V".
2532                          * This is different to other chips, where the internal
2533                          * voltage divider would connect VIN7 to an internal
2534                          * voltage source. Maybe that is the case here as well.
2535                          *
2536                          * Since we don't know for sure, re-route it if that is
2537                          * not the case, and ask the user to report if the
2538                          * resulting voltage is sane.
2539                          */
2540                         if (!(reg2c & BIT(1))) {
2541                                 reg2c |= BIT(1);
2542                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2543                                              reg2c);
2544                                 pr_notice("Routing internal VCCH5V to in7.\n");
2545                         }
2546                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2547                         pr_notice("Please report if it displays a reasonable voltage.\n");
2548                 }
2549
2550                 if (reg2c & BIT(0))
2551                         sio_data->internal |= BIT(0);
2552                 if (reg2c & BIT(1))
2553                         sio_data->internal |= BIT(1);
2554
2555                 sio_data->beep_pin = superio_inb(sioaddr,
2556                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2557         } else if (sio_data->type == it8603) {
2558                 int reg27, reg29;
2559
2560                 superio_select(sioaddr, GPIO);
2561
2562                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2563
2564                 /* Check if fan3 is there or not */
2565                 if (reg27 & BIT(6))
2566                         sio_data->skip_pwm |= BIT(2);
2567                 if (reg27 & BIT(7))
2568                         sio_data->skip_fan |= BIT(2);
2569
2570                 /* Check if fan2 is there or not */
2571                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2572                 if (reg29 & BIT(1))
2573                         sio_data->skip_pwm |= BIT(1);
2574                 if (reg29 & BIT(2))
2575                         sio_data->skip_fan |= BIT(1);
2576
2577                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2578                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2579
2580                 sio_data->beep_pin = superio_inb(sioaddr,
2581                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2582         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2583                 int reg;
2584
2585                 superio_select(sioaddr, GPIO);
2586
2587                 /* Check for pwm5 */
2588                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2589                 if (reg & BIT(6))
2590                         sio_data->skip_pwm |= BIT(4);
2591
2592                 /* Check for fan4, fan5 */
2593                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2594                 if (!(reg & BIT(5)))
2595                         sio_data->skip_fan |= BIT(3);
2596                 if (!(reg & BIT(4)))
2597                         sio_data->skip_fan |= BIT(4);
2598
2599                 /* Check for pwm3, fan3 */
2600                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2601                 if (reg & BIT(6))
2602                         sio_data->skip_pwm |= BIT(2);
2603                 if (reg & BIT(7))
2604                         sio_data->skip_fan |= BIT(2);
2605
2606                 /* Check for pwm4 */
2607                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2608                 if (!(reg & BIT(2)))
2609                         sio_data->skip_pwm |= BIT(3);
2610
2611                 /* Check for pwm2, fan2 */
2612                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2613                 if (reg & BIT(1))
2614                         sio_data->skip_pwm |= BIT(1);
2615                 if (reg & BIT(2))
2616                         sio_data->skip_fan |= BIT(1);
2617                 /* Check for pwm6, fan6 */
2618                 if (!(reg & BIT(7))) {
2619                         sio_data->skip_pwm |= BIT(5);
2620                         sio_data->skip_fan |= BIT(5);
2621                 }
2622
2623                 sio_data->beep_pin = superio_inb(sioaddr,
2624                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2625         } else {
2626                 int reg;
2627                 bool uart6;
2628
2629                 superio_select(sioaddr, GPIO);
2630
2631                 /* Check for fan4, fan5 */
2632                 if (has_five_fans(config)) {
2633                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2634                         switch (sio_data->type) {
2635                         case it8718:
2636                                 if (reg & BIT(5))
2637                                         sio_data->skip_fan |= BIT(3);
2638                                 if (reg & BIT(4))
2639                                         sio_data->skip_fan |= BIT(4);
2640                                 break;
2641                         case it8720:
2642                         case it8721:
2643                         case it8728:
2644                                 if (!(reg & BIT(5)))
2645                                         sio_data->skip_fan |= BIT(3);
2646                                 if (!(reg & BIT(4)))
2647                                         sio_data->skip_fan |= BIT(4);
2648                                 break;
2649                         default:
2650                                 break;
2651                         }
2652                 }
2653
2654                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2655                 if (!sio_data->skip_vid) {
2656                         /* We need at least 4 VID pins */
2657                         if (reg & 0x0f) {
2658                                 pr_info("VID is disabled (pins used for GPIO)\n");
2659                                 sio_data->skip_vid = 1;
2660                         }
2661                 }
2662
2663                 /* Check if fan3 is there or not */
2664                 if (reg & BIT(6))
2665                         sio_data->skip_pwm |= BIT(2);
2666                 if (reg & BIT(7))
2667                         sio_data->skip_fan |= BIT(2);
2668
2669                 /* Check if fan2 is there or not */
2670                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2671                 if (reg & BIT(1))
2672                         sio_data->skip_pwm |= BIT(1);
2673                 if (reg & BIT(2))
2674                         sio_data->skip_fan |= BIT(1);
2675
2676                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2677                     !(sio_data->skip_vid))
2678                         sio_data->vid_value = superio_inb(sioaddr,
2679                                                           IT87_SIO_VID_REG);
2680
2681                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2682
2683                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2684
2685                 /*
2686                  * The IT8720F has no VIN7 pin, so VCCH should always be
2687                  * routed internally to VIN7 with an internal divider.
2688                  * Curiously, there still is a configuration bit to control
2689                  * this, which means it can be set incorrectly. And even
2690                  * more curiously, many boards out there are improperly
2691                  * configured, even though the IT8720F datasheet claims
2692                  * that the internal routing of VCCH to VIN7 is the default
2693                  * setting. So we force the internal routing in this case.
2694                  *
2695                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2696                  * If UART6 is enabled, re-route VIN7 to the internal divider
2697                  * if that is not already the case.
2698                  */
2699                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2700                         reg |= BIT(1);
2701                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2702                         pr_notice("Routing internal VCCH to in7\n");
2703                 }
2704                 if (reg & BIT(0))
2705                         sio_data->internal |= BIT(0);
2706                 if (reg & BIT(1))
2707                         sio_data->internal |= BIT(1);
2708
2709                 /*
2710                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2711                  * While VIN7 can be routed to the internal voltage divider,
2712                  * VIN5 and VIN6 are not available if UART6 is enabled.
2713                  *
2714                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2715                  * is the temperature source. Since we can not read the
2716                  * temperature source here, skip_temp is preliminary.
2717                  */
2718                 if (uart6) {
2719                         sio_data->skip_in |= BIT(5) | BIT(6);
2720                         sio_data->skip_temp |= BIT(2);
2721                 }
2722
2723                 sio_data->beep_pin = superio_inb(sioaddr,
2724                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2725         }
2726         if (sio_data->beep_pin)
2727                 pr_info("Beeping is supported\n");
2728
2729         /* Disable specific features based on DMI strings */
2730         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2731         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2732         if (board_vendor && board_name) {
2733                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2734                     strcmp(board_name, "FN68PT") == 0) {
2735                         /*
2736                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2737                          * connected to a fan, but to something else. One user
2738                          * has reported instant system power-off when changing
2739                          * the PWM2 duty cycle, so we disable it.
2740                          * I use the board name string as the trigger in case
2741                          * the same board is ever used in other systems.
2742                          */
2743                         pr_info("Disabling pwm2 due to hardware constraints\n");
2744                         sio_data->skip_pwm = BIT(1);
2745                 }
2746         }
2747
2748 exit:
2749         superio_exit(sioaddr);
2750         return err;
2751 }
2752
2753 /* Called when we have found a new IT87. */
2754 static void it87_init_device(struct platform_device *pdev)
2755 {
2756         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2757         struct it87_data *data = platform_get_drvdata(pdev);
2758         int tmp, i;
2759         u8 mask;
2760
2761         /*
2762          * For each PWM channel:
2763          * - If it is in automatic mode, setting to manual mode should set
2764          *   the fan to full speed by default.
2765          * - If it is in manual mode, we need a mapping to temperature
2766          *   channels to use when later setting to automatic mode later.
2767          *   Use a 1:1 mapping by default (we are clueless.)
2768          * In both cases, the value can (and should) be changed by the user
2769          * prior to switching to a different mode.
2770          * Note that this is no longer needed for the IT8721F and later, as
2771          * these have separate registers for the temperature mapping and the
2772          * manual duty cycle.
2773          */
2774         for (i = 0; i < NUM_AUTO_PWM; i++) {
2775                 data->pwm_temp_map[i] = i;
2776                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2777                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2778         }
2779
2780         /*
2781          * Some chips seem to have default value 0xff for all limit
2782          * registers. For low voltage limits it makes no sense and triggers
2783          * alarms, so change to 0 instead. For high temperature limits, it
2784          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2785          * but is still confusing, so change to 127 degrees C.
2786          */
2787         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2788                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2789                 if (tmp == 0xff)
2790                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2791         }
2792         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2793                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2794                 if (tmp == 0xff)
2795                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2796         }
2797
2798         /*
2799          * Temperature channels are not forcibly enabled, as they can be
2800          * set to two different sensor types and we can't guess which one
2801          * is correct for a given system. These channels can be enabled at
2802          * run-time through the temp{1-3}_type sysfs accessors if needed.
2803          */
2804
2805         /* Check if voltage monitors are reset manually or by some reason */
2806         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2807         if ((tmp & 0xff) == 0) {
2808                 /* Enable all voltage monitors */
2809                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2810         }
2811
2812         /* Check if tachometers are reset manually or by some reason */
2813         mask = 0x70 & ~(sio_data->skip_fan << 4);
2814         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2815         if ((data->fan_main_ctrl & mask) == 0) {
2816                 /* Enable all fan tachometers */
2817                 data->fan_main_ctrl |= mask;
2818                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2819                                  data->fan_main_ctrl);
2820         }
2821         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2822
2823         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2824
2825         /* Set tachometers to 16-bit mode if needed */
2826         if (has_fan16_config(data)) {
2827                 if (~tmp & 0x07 & data->has_fan) {
2828                         dev_dbg(&pdev->dev,
2829                                 "Setting fan1-3 to 16-bit mode\n");
2830                         it87_write_value(data, IT87_REG_FAN_16BIT,
2831                                          tmp | 0x07);
2832                 }
2833         }
2834
2835         /* Check for additional fans */
2836         if (has_five_fans(data)) {
2837                 if (tmp & BIT(4))
2838                         data->has_fan |= BIT(3); /* fan4 enabled */
2839                 if (tmp & BIT(5))
2840                         data->has_fan |= BIT(4); /* fan5 enabled */
2841                 if (has_six_fans(data) && (tmp & BIT(2)))
2842                         data->has_fan |= BIT(5); /* fan6 enabled */
2843         }
2844
2845         /* Fan input pins may be used for alternative functions */
2846         data->has_fan &= ~sio_data->skip_fan;
2847
2848         /* Check if pwm5, pwm6 are enabled */
2849         if (has_six_pwm(data)) {
2850                 /* The following code may be IT8620E specific */
2851                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2852                 if ((tmp & 0xc0) == 0xc0)
2853                         sio_data->skip_pwm |= BIT(4);
2854                 if (!(tmp & BIT(3)))
2855                         sio_data->skip_pwm |= BIT(5);
2856         }
2857
2858         /* Start monitoring */
2859         it87_write_value(data, IT87_REG_CONFIG,
2860                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2861                          | (update_vbat ? 0x41 : 0x01));
2862 }
2863
2864 /* Return 1 if and only if the PWM interface is safe to use */
2865 static int it87_check_pwm(struct device *dev)
2866 {
2867         struct it87_data *data = dev_get_drvdata(dev);
2868         /*
2869          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2870          * and polarity set to active low is sign that this is the case so we
2871          * disable pwm control to protect the user.
2872          */
2873         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2874
2875         if ((tmp & 0x87) == 0) {
2876                 if (fix_pwm_polarity) {
2877                         /*
2878                          * The user asks us to attempt a chip reconfiguration.
2879                          * This means switching to active high polarity and
2880                          * inverting all fan speed values.
2881                          */
2882                         int i;
2883                         u8 pwm[3];
2884
2885                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
2886                                 pwm[i] = it87_read_value(data,
2887                                                          IT87_REG_PWM[i]);
2888
2889                         /*
2890                          * If any fan is in automatic pwm mode, the polarity
2891                          * might be correct, as suspicious as it seems, so we
2892                          * better don't change anything (but still disable the
2893                          * PWM interface).
2894                          */
2895                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2896                                 dev_info(dev,
2897                                          "Reconfiguring PWM to active high polarity\n");
2898                                 it87_write_value(data, IT87_REG_FAN_CTL,
2899                                                  tmp | 0x87);
2900                                 for (i = 0; i < 3; i++)
2901                                         it87_write_value(data,
2902                                                          IT87_REG_PWM[i],
2903                                                          0x7f & ~pwm[i]);
2904                                 return 1;
2905                         }
2906
2907                         dev_info(dev,
2908                                  "PWM configuration is too broken to be fixed\n");
2909                 }
2910
2911                 dev_info(dev,
2912                          "Detected broken BIOS defaults, disabling PWM interface\n");
2913                 return 0;
2914         } else if (fix_pwm_polarity) {
2915                 dev_info(dev,
2916                          "PWM configuration looks sane, won't touch\n");
2917         }
2918
2919         return 1;
2920 }
2921
2922 static int it87_probe(struct platform_device *pdev)
2923 {
2924         struct it87_data *data;
2925         struct resource *res;
2926         struct device *dev = &pdev->dev;
2927         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2928         int enable_pwm_interface;
2929         struct device *hwmon_dev;
2930
2931         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2932         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2933                                  DRVNAME)) {
2934                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2935                         (unsigned long)res->start,
2936                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2937                 return -EBUSY;
2938         }
2939
2940         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2941         if (!data)
2942                 return -ENOMEM;
2943
2944         data->addr = res->start;
2945         data->type = sio_data->type;
2946         data->features = it87_devices[sio_data->type].features;
2947         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2948         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2949         /*
2950          * IT8705F Datasheet 0.4.1, 3h == Version G.
2951          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2952          * These are the first revisions with 16-bit tachometer support.
2953          */
2954         switch (data->type) {
2955         case it87:
2956                 if (sio_data->revision >= 0x03) {
2957                         data->features &= ~FEAT_OLD_AUTOPWM;
2958                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2959                 }
2960                 break;
2961         case it8712:
2962                 if (sio_data->revision >= 0x08) {
2963                         data->features &= ~FEAT_OLD_AUTOPWM;
2964                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2965                                           FEAT_FIVE_FANS;
2966                 }
2967                 break;
2968         default:
2969                 break;
2970         }
2971
2972         /* Now, we do the remaining detection. */
2973         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
2974             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2975                 return -ENODEV;
2976
2977         platform_set_drvdata(pdev, data);
2978
2979         mutex_init(&data->update_lock);
2980
2981         /* Check PWM configuration */
2982         enable_pwm_interface = it87_check_pwm(dev);
2983
2984         /* Starting with IT8721F, we handle scaling of internal voltages */
2985         if (has_12mv_adc(data)) {
2986                 if (sio_data->internal & BIT(0))
2987                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
2988                 if (sio_data->internal & BIT(1))
2989                         data->in_scaled |= BIT(7);      /* in7 is VSB */
2990                 if (sio_data->internal & BIT(2))
2991                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
2992                 if (sio_data->internal & BIT(3))
2993                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
2994         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2995                    sio_data->type == it8783) {
2996                 if (sio_data->internal & BIT(0))
2997                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
2998                 if (sio_data->internal & BIT(1))
2999                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3000         }
3001
3002         data->has_temp = 0x07;
3003         if (sio_data->skip_temp & BIT(2)) {
3004                 if (sio_data->type == it8782 &&
3005                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3006                         data->has_temp &= ~BIT(2);
3007         }
3008
3009         data->in_internal = sio_data->internal;
3010         data->has_in = 0x3ff & ~sio_data->skip_in;
3011
3012         if (has_six_temp(data)) {
3013                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3014
3015                 /* Check for additional temperature sensors */
3016                 if ((reg & 0x03) >= 0x02)
3017                         data->has_temp |= BIT(3);
3018                 if (((reg >> 2) & 0x03) >= 0x02)
3019                         data->has_temp |= BIT(4);
3020                 if (((reg >> 4) & 0x03) >= 0x02)
3021                         data->has_temp |= BIT(5);
3022
3023                 /* Check for additional voltage sensors */
3024                 if ((reg & 0x03) == 0x01)
3025                         data->has_in |= BIT(10);
3026                 if (((reg >> 2) & 0x03) == 0x01)
3027                         data->has_in |= BIT(11);
3028                 if (((reg >> 4) & 0x03) == 0x01)
3029                         data->has_in |= BIT(12);
3030         }
3031
3032         data->has_beep = !!sio_data->beep_pin;
3033
3034         /* Initialize the IT87 chip */
3035         it87_init_device(pdev);
3036
3037         if (!sio_data->skip_vid) {
3038                 data->has_vid = true;
3039                 data->vrm = vid_which_vrm();
3040                 /* VID reading from Super-I/O config space if available */
3041                 data->vid = sio_data->vid_value;
3042         }
3043
3044         /* Prepare for sysfs hooks */
3045         data->groups[0] = &it87_group;
3046         data->groups[1] = &it87_group_in;
3047         data->groups[2] = &it87_group_temp;
3048         data->groups[3] = &it87_group_fan;
3049
3050         if (enable_pwm_interface) {
3051                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3052                 data->has_pwm &= ~sio_data->skip_pwm;
3053
3054                 data->groups[4] = &it87_group_pwm;
3055                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3056                         data->groups[5] = &it87_group_auto_pwm;
3057         }
3058
3059         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3060                                         it87_devices[sio_data->type].name,
3061                                         data, data->groups);
3062         return PTR_ERR_OR_ZERO(hwmon_dev);
3063 }
3064
3065 static struct platform_driver it87_driver = {
3066         .driver = {
3067                 .name   = DRVNAME,
3068         },
3069         .probe  = it87_probe,
3070 };
3071
3072 static int __init it87_device_add(int index, unsigned short address,
3073                                   const struct it87_sio_data *sio_data)
3074 {
3075         struct platform_device *pdev;
3076         struct resource res = {
3077                 .start  = address + IT87_EC_OFFSET,
3078                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3079                 .name   = DRVNAME,
3080                 .flags  = IORESOURCE_IO,
3081         };
3082         int err;
3083
3084         err = acpi_check_resource_conflict(&res);
3085         if (err)
3086                 return err;
3087
3088         pdev = platform_device_alloc(DRVNAME, address);
3089         if (!pdev)
3090                 return -ENOMEM;
3091
3092         err = platform_device_add_resources(pdev, &res, 1);
3093         if (err) {
3094                 pr_err("Device resource addition failed (%d)\n", err);
3095                 goto exit_device_put;
3096         }
3097
3098         err = platform_device_add_data(pdev, sio_data,
3099                                        sizeof(struct it87_sio_data));
3100         if (err) {
3101                 pr_err("Platform data allocation failed\n");
3102                 goto exit_device_put;
3103         }
3104
3105         err = platform_device_add(pdev);
3106         if (err) {
3107                 pr_err("Device addition failed (%d)\n", err);
3108                 goto exit_device_put;
3109         }
3110
3111         it87_pdev[index] = pdev;
3112         return 0;
3113
3114 exit_device_put:
3115         platform_device_put(pdev);
3116         return err;
3117 }
3118
3119 static int __init sm_it87_init(void)
3120 {
3121         int sioaddr[2] = { REG_2E, REG_4E };
3122         struct it87_sio_data sio_data;
3123         unsigned short isa_address;
3124         bool found = false;
3125         int i, err;
3126
3127         err = platform_driver_register(&it87_driver);
3128         if (err)
3129                 return err;
3130
3131         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3132                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3133                 isa_address = 0;
3134                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3135                 if (err || isa_address == 0)
3136                         continue;
3137
3138                 err = it87_device_add(i, isa_address, &sio_data);
3139                 if (err)
3140                         goto exit_dev_unregister;
3141                 found = true;
3142         }
3143
3144         if (!found) {
3145                 err = -ENODEV;
3146                 goto exit_unregister;
3147         }
3148         return 0;
3149
3150 exit_dev_unregister:
3151         /* NULL check handled by platform_device_unregister */
3152         platform_device_unregister(it87_pdev[0]);
3153 exit_unregister:
3154         platform_driver_unregister(&it87_driver);
3155         return err;
3156 }
3157
3158 static void __exit sm_it87_exit(void)
3159 {
3160         /* NULL check handled by platform_device_unregister */
3161         platform_device_unregister(it87_pdev[1]);
3162         platform_device_unregister(it87_pdev[0]);
3163         platform_driver_unregister(&it87_driver);
3164 }
3165
3166 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3167 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3168 module_param(update_vbat, bool, 0);
3169 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3170 module_param(fix_pwm_polarity, bool, 0);
3171 MODULE_PARM_DESC(fix_pwm_polarity,
3172                  "Force PWM polarity to active high (DANGEROUS)");
3173 MODULE_LICENSE("GPL");
3174
3175 module_init(sm_it87_init);
3176 module_exit(sm_it87_exit);