drivers/hwmon/it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8620E  Super I/O chip w/LPC interface
  15  *            IT8623E  Super I/O chip w/LPC interface
  16  *            IT8628E  Super I/O chip w/LPC interface
  17  *            IT8705F  Super I/O chip w/LPC interface
  18  *            IT8712F  Super I/O chip w/LPC interface
  19  *            IT8716F  Super I/O chip w/LPC interface
  20  *            IT8718F  Super I/O chip w/LPC interface
  21  *            IT8720F  Super I/O chip w/LPC interface
  22  *            IT8721F  Super I/O chip w/LPC interface
  23  *            IT8726F  Super I/O chip w/LPC interface
  24  *            IT8728F  Super I/O chip w/LPC interface
  25  *            IT8732F  Super I/O chip w/LPC interface
  26  *            IT8758E  Super I/O chip w/LPC interface
  27  *            IT8771E  Super I/O chip w/LPC interface
  28  *            IT8772E  Super I/O chip w/LPC interface
  29  *            IT8781F  Super I/O chip w/LPC interface
  30  *            IT8782F  Super I/O chip w/LPC interface
  31  *            IT8783E/F Super I/O chip w/LPC interface
  32  *            IT8786E  Super I/O chip w/LPC interface
  33  *            IT8790E  Super I/O chip w/LPC interface
  34  *            Sis950   A clone of the IT8705F
  35  *
  36  *  Copyright (C) 2001 Chris Gauthron
  37  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  38  *
  39  *  This program is free software; you can redistribute it and/or modify
  40  *  it under the terms of the GNU General Public License as published by
  41  *  the Free Software Foundation; either version 2 of the License, or
  42  *  (at your option) any later version.
  43  *
  44  *  This program is distributed in the hope that it will be useful,
  45  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  46  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  47  *  GNU General Public License for more details.
  48  */
  49
  50 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  51
  52 #include <linux/bitops.h>
  53 #include <linux/module.h>
  54 #include <linux/init.h>
  55 #include <linux/slab.h>
  56 #include <linux/jiffies.h>
  57 #include <linux/platform_device.h>
  58 #include <linux/hwmon.h>
  59 #include <linux/hwmon-sysfs.h>
  60 #include <linux/hwmon-vid.h>
  61 #include <linux/err.h>
  62 #include <linux/mutex.h>
  63 #include <linux/sysfs.h>
  64 #include <linux/string.h>
  65 #include <linux/dmi.h>
  66 #include <linux/acpi.h>
  67 #include <linux/io.h>
  68
  69 #define DRVNAME "it87"
  70
  71 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  72              it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603,
  73              it8620, it8628 };
  74
  75 static unsigned short force_id;
  76 module_param(force_id, ushort, 0);
  77 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  78
  79 static struct platform_device *it87_pdev[2];
  80
  81 #define REG_2E  0x2e    /* The register to read/write */
  82 #define REG_4E  0x4e    /* Secondary register to read/write */
  83
  84 #define DEV     0x07    /* Register: Logical device select */
  85 #define PME     0x04    /* The device with the fan registers in it */
  86
  87 /* The device with the IT8718F/IT8720F VID value in it */
  88 #define GPIO    0x07
  89
  90 #define DEVID   0x20    /* Register: Device ID */
  91 #define DEVREV  0x22    /* Register: Device Revision */
  92
  93 static inline int superio_inb(int ioreg, int reg)
  94 {
  95         outb(reg, ioreg);
  96         return inb(ioreg + 1);
  97 }
  98
  99 static inline void superio_outb(int ioreg, int reg, int val)
 100 {
 101         outb(reg, ioreg);
 102         outb(val, ioreg + 1);
 103 }
 104
 105 static int superio_inw(int ioreg, int reg)
 106 {
 107         int val;
 108
 109         outb(reg++, ioreg);
 110         val = inb(ioreg + 1) << 8;
 111         outb(reg, ioreg);
 112         val |= inb(ioreg + 1);
 113         return val;
 114 }
 115
 116 static inline void superio_select(int ioreg, int ldn)
 117 {
 118         outb(DEV, ioreg);
 119         outb(ldn, ioreg + 1);
 120 }
 121
 122 static inline int superio_enter(int ioreg)
 123 {
 124         /*
 125          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 126          */
 127         if (!request_muxed_region(ioreg, 2, DRVNAME))
 128                 return -EBUSY;
 129
 130         outb(0x87, ioreg);
 131         outb(0x01, ioreg);
 132         outb(0x55, ioreg);
 133         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 134         return 0;
 135 }
 136
 137 static inline void superio_exit(int ioreg)
 138 {
 139         outb(0x02, ioreg);
 140         outb(0x02, ioreg + 1);
 141         release_region(ioreg, 2);
 142 }
 143
 144 /* Logical device 4 registers */
 145 #define IT8712F_DEVID 0x8712
 146 #define IT8705F_DEVID 0x8705
 147 #define IT8716F_DEVID 0x8716
 148 #define IT8718F_DEVID 0x8718
 149 #define IT8720F_DEVID 0x8720
 150 #define IT8721F_DEVID 0x8721
 151 #define IT8726F_DEVID 0x8726
 152 #define IT8728F_DEVID 0x8728
 153 #define IT8732F_DEVID 0x8732
 154 #define IT8771E_DEVID 0x8771
 155 #define IT8772E_DEVID 0x8772
 156 #define IT8781F_DEVID 0x8781
 157 #define IT8782F_DEVID 0x8782
 158 #define IT8783E_DEVID 0x8783
 159 #define IT8786E_DEVID 0x8786
 160 #define IT8790E_DEVID 0x8790
 161 #define IT8603E_DEVID 0x8603
 162 #define IT8620E_DEVID 0x8620
 163 #define IT8623E_DEVID 0x8623
 164 #define IT8628E_DEVID 0x8628
 165 #define IT87_ACT_REG  0x30
 166 #define IT87_BASE_REG 0x60
 167
 168 /* Logical device 7 registers (IT8712F and later) */
 169 #define IT87_SIO_GPIO1_REG      0x25
 170 #define IT87_SIO_GPIO2_REG      0x26
 171 #define IT87_SIO_GPIO3_REG      0x27
 172 #define IT87_SIO_GPIO4_REG      0x28
 173 #define IT87_SIO_GPIO5_REG      0x29
 174 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 175 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 176 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 177 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 178 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 179
 180 /* Update battery voltage after every reading if true */
 181 static bool update_vbat;
 182
 183 /* Not all BIOSes properly configure the PWM registers */
 184 static bool fix_pwm_polarity;
 185
 186 /* Many IT87 constants specified below */
 187
 188 /* Length of ISA address segment */
 189 #define IT87_EXTENT 8
 190
 191 /* Length of ISA address segment for Environmental Controller */
 192 #define IT87_EC_EXTENT 2
 193
 194 /* Offset of EC registers from ISA base address */
 195 #define IT87_EC_OFFSET 5
 196
 197 /* Where are the ISA address/data registers relative to the EC base address */
 198 #define IT87_ADDR_REG_OFFSET 0
 199 #define IT87_DATA_REG_OFFSET 1
 200
 201 /*----- The IT87 registers -----*/
 202
 203 #define IT87_REG_CONFIG        0x00
 204
 205 #define IT87_REG_ALARM1        0x01
 206 #define IT87_REG_ALARM2        0x02
 207 #define IT87_REG_ALARM3        0x03
 208
 209 /*
 210  * The IT8718F and IT8720F have the VID value in a different register, in
 211  * Super-I/O configuration space.
 212  */
 213 #define IT87_REG_VID           0x0a
 214 /*
 215  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 216  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 217  * mode.
 218  */
 219 #define IT87_REG_FAN_DIV       0x0b
 220 #define IT87_REG_FAN_16BIT     0x0c
 221
 222 /*
 223  * Monitors:
 224  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 225  * - up to 6 temp (1 to 6)
 226  * - up to 6 fan (1 to 6)
 227  */
 228
 229 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 230 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 231 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 232 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 233 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 234
 235 #define IT87_REG_FAN_MAIN_CTRL 0x13
 236 #define IT87_REG_FAN_CTL       0x14
 237 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 238 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 239
 240 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 241                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 242
 243 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 244
 245 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 246 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 247 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 248 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 249
 250 #define IT87_REG_VIN_ENABLE    0x50
 251 #define IT87_REG_TEMP_ENABLE   0x51
 252 #define IT87_REG_TEMP_EXTRA    0x55
 253 #define IT87_REG_BEEP_ENABLE   0x5c
 254
 255 #define IT87_REG_CHIPID        0x58
 256
 257 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 258
 259 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 260 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 261
 262 #define IT87_REG_TEMP456_ENABLE 0x77
 263
 264 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 265 #define NUM_VIN_LIMIT           8
 266 #define NUM_TEMP                6
 267 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 268 #define NUM_TEMP_LIMIT          3
 269 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 270 #define NUM_FAN_DIV             3
 271 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 272 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 273
 274 struct it87_devices {
 275         const char *name;
 276         const char * const suffix;
 277         u32 features;
 278         u8 peci_mask;
 279         u8 old_peci_mask;
 280 };
 281
 282 #define FEAT_12MV_ADC           BIT(0)
 283 #define FEAT_NEWER_AUTOPWM      BIT(1)
 284 #define FEAT_OLD_AUTOPWM        BIT(2)
 285 #define FEAT_16BIT_FANS         BIT(3)
 286 #define FEAT_TEMP_OFFSET        BIT(4)
 287 #define FEAT_TEMP_PECI          BIT(5)
 288 #define FEAT_TEMP_OLD_PECI      BIT(6)
 289 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 290 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 291 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 292 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 293 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 294 #define FEAT_10_9MV_ADC         BIT(12)
 295 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 296 #define FEAT_SIX_PWM            BIT(14) /* Chip supports 6 pwm chn */
 297 #define FEAT_PWM_FREQ2          BIT(15) /* Separate pwm freq 2 */
 298 #define FEAT_SIX_TEMP           BIT(16) /* Up to 6 temp sensors */
 299 #define FEAT_VIN3_5V            BIT(17) /* VIN3 connected to +5V */
 300
 301 static const struct it87_devices it87_devices[] = {
 302         [it87] = {
 303                 .name = "it87",
 304                 .suffix = "F",
 305                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 306         },
 307         [it8712] = {
 308                 .name = "it8712",
 309                 .suffix = "F",
 310                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 311                                                 /* may need to overwrite */
 312         },
 313         [it8716] = {
 314                 .name = "it8716",
 315                 .suffix = "F",
 316                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 317                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 318         },
 319         [it8718] = {
 320                 .name = "it8718",
 321                 .suffix = "F",
 322                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 323                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 324                   | FEAT_PWM_FREQ2,
 325                 .old_peci_mask = 0x4,
 326         },
 327         [it8720] = {
 328                 .name = "it8720",
 329                 .suffix = "F",
 330                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 331                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 332                   | FEAT_PWM_FREQ2,
 333                 .old_peci_mask = 0x4,
 334         },
 335         [it8721] = {
 336                 .name = "it8721",
 337                 .suffix = "F",
 338                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 339                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 340                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 341                   | FEAT_PWM_FREQ2,
 342                 .peci_mask = 0x05,
 343                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 344         },
 345         [it8728] = {
 346                 .name = "it8728",
 347                 .suffix = "F",
 348                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 349                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 350                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 351                 .peci_mask = 0x07,
 352         },
 353         [it8732] = {
 354                 .name = "it8732",
 355                 .suffix = "F",
 356                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 357                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 358                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 359                 .peci_mask = 0x07,
 360                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 361         },
 362         [it8771] = {
 363                 .name = "it8771",
 364                 .suffix = "E",
 365                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 366                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 367                   | FEAT_PWM_FREQ2,
 368                                 /* PECI: guesswork */
 369                                 /* 12mV ADC (OHM) */
 370                                 /* 16 bit fans (OHM) */
 371                                 /* three fans, always 16 bit (guesswork) */
 372                 .peci_mask = 0x07,
 373         },
 374         [it8772] = {
 375                 .name = "it8772",
 376                 .suffix = "E",
 377                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 378                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 379                   | FEAT_PWM_FREQ2,
 380                                 /* PECI (coreboot) */
 381                                 /* 12mV ADC (HWSensors4, OHM) */
 382                                 /* 16 bit fans (HWSensors4, OHM) */
 383                                 /* three fans, always 16 bit (datasheet) */
 384                 .peci_mask = 0x07,
 385         },
 386         [it8781] = {
 387                 .name = "it8781",
 388                 .suffix = "F",
 389                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 390                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 391                 .old_peci_mask = 0x4,
 392         },
 393         [it8782] = {
 394                 .name = "it8782",
 395                 .suffix = "F",
 396                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 397                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 398                 .old_peci_mask = 0x4,
 399         },
 400         [it8783] = {
 401                 .name = "it8783",
 402                 .suffix = "E/F",
 403                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 404                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 405                 .old_peci_mask = 0x4,
 406         },
 407         [it8786] = {
 408                 .name = "it8786",
 409                 .suffix = "E",
 410                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 411                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 412                   | FEAT_PWM_FREQ2,
 413                 .peci_mask = 0x07,
 414         },
 415         [it8790] = {
 416                 .name = "it8790",
 417                 .suffix = "E",
 418                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 419                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 420                   | FEAT_PWM_FREQ2,
 421                 .peci_mask = 0x07,
 422         },
 423         [it8603] = {
 424                 .name = "it8603",
 425                 .suffix = "E",
 426                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 427                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 428                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 429                 .peci_mask = 0x07,
 430         },
 431         [it8620] = {
 432                 .name = "it8620",
 433                 .suffix = "E",
 434                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 435                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 436                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 437                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 438                 .peci_mask = 0x07,
 439         },
 440         [it8628] = {
 441                 .name = "it8628",
 442                 .suffix = "E",
 443                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 444                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 445                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 446                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 447                 .peci_mask = 0x07,
 448         },
 449 };
 450
 451 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 452 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 453 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 454 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 455 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 456 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 457 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 458                                  ((data)->peci_mask & BIT(nr)))
 459 #define has_temp_old_peci(data, nr) \
 460                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 461                                  ((data)->old_peci_mask & BIT(nr)))
 462 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 463 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 464                                                      FEAT_SIX_FANS))
 465 #define has_vid(data)           ((data)->features & FEAT_VID)
 466 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 467 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 468 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 469 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 470 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 471 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 472 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 473
 474 struct it87_sio_data {
 475         enum chips type;
 476         /* Values read from Super-I/O config space */
 477         u8 revision;
 478         u8 vid_value;
 479         u8 beep_pin;
 480         u8 internal;    /* Internal sensors can be labeled */
 481         /* Features skipped based on config or DMI */
 482         u16 skip_in;
 483         u8 skip_vid;
 484         u8 skip_fan;
 485         u8 skip_pwm;
 486         u8 skip_temp;
 487 };
 488
 489 /*
 490  * For each registered chip, we need to keep some data in memory.
 491  * The structure is dynamically allocated.
 492  */
 493 struct it87_data {
 494         const struct attribute_group *groups[7];
 495         enum chips type;
 496         u32 features;
 497         u8 peci_mask;
 498         u8 old_peci_mask;
 499
 500         unsigned short addr;
 501         const char *name;
 502         struct mutex update_lock;
 503         char valid;             /* !=0 if following fields are valid */
 504         unsigned long last_updated;     /* In jiffies */
 505
 506         u16 in_scaled;          /* Internal voltage sensors are scaled */
 507         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 508         u16 has_in;             /* Bitfield, voltage sensors enabled */
 509         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 510         u8 has_fan;             /* Bitfield, fans enabled */
 511         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 512         u8 has_temp;            /* Bitfield, temp sensors enabled */
 513         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 514         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 515         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 516         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 517         bool has_vid;           /* True if VID supported */
 518         u8 vid;                 /* Register encoding, combined */
 519         u8 vrm;
 520         u32 alarms;             /* Register encoding, combined */
 521         bool has_beep;          /* true if beep supported */
 522         u8 beeps;               /* Register encoding */
 523         u8 fan_main_ctrl;       /* Register value */
 524         u8 fan_ctl;             /* Register value */
 525
 526         /*
 527          * The following 3 arrays correspond to the same registers up to
 528          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 529          * 7, and we want to preserve settings on mode changes, so we have
 530          * to track all values separately.
 531          * Starting with the IT8721F, the manual PWM duty cycles are stored
 532          * in separate registers (8-bit values), so the separate tracking
 533          * is no longer needed, but it is still done to keep the driver
 534          * simple.
 535          */
 536         u8 has_pwm;             /* Bitfield, pwm control enabled */
 537         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 538         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 539         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 540
 541         /* Automatic fan speed control registers */
 542         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 543         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 544 };
 545
 546 static int adc_lsb(const struct it87_data *data, int nr)
 547 {
 548         int lsb;
 549
 550         if (has_12mv_adc(data))
 551                 lsb = 120;
 552         else if (has_10_9mv_adc(data))
 553                 lsb = 109;
 554         else
 555                 lsb = 160;
 556         if (data->in_scaled & BIT(nr))
 557                 lsb <<= 1;
 558         return lsb;
 559 }
 560
 561 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 562 {
 563         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 564         return clamp_val(val, 0, 255);
 565 }
 566
 567 static int in_from_reg(const struct it87_data *data, int nr, int val)
 568 {
 569         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 570 }
 571
 572 static inline u8 FAN_TO_REG(long rpm, int div)
 573 {
 574         if (rpm == 0)
 575                 return 255;
 576         rpm = clamp_val(rpm, 1, 1000000);
 577         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 578 }
 579
 580 static inline u16 FAN16_TO_REG(long rpm)
 581 {
 582         if (rpm == 0)
 583                 return 0xffff;
 584         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 585 }
 586
 587 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 588                                 1350000 / ((val) * (div)))
 589 /* The divider is fixed to 2 in 16-bit mode */
 590 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 591                              1350000 / ((val) * 2))
 592
 593 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 594                                     ((val) + 500) / 1000), -128, 127))
 595 #define TEMP_FROM_REG(val) ((val) * 1000)
 596
 597 static u8 pwm_to_reg(const struct it87_data *data, long val)
 598 {
 599         if (has_newer_autopwm(data))
 600                 return val;
 601         else
 602                 return val >> 1;
 603 }
 604
 605 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 606 {
 607         if (has_newer_autopwm(data))
 608                 return reg;
 609         else
 610                 return (reg & 0x7f) << 1;
 611 }
 612
 613 static int DIV_TO_REG(int val)
 614 {
 615         int answer = 0;
 616
 617         while (answer < 7 && (val >>= 1))
 618                 answer++;
 619         return answer;
 620 }
 621
 622 #define DIV_FROM_REG(val) BIT(val)
 623
 624 /*
 625  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 626  * depending on the chip type, to calculate the actual PWM frequency.
 627  *
 628  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 629  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 630  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 631  * sometimes just one. It is unknown if this is a datasheet error or real,
 632  * so this is ignored for now.
 633  */
 634 static const unsigned int pwm_freq[8] = {
 635         48000000,
 636         24000000,
 637         12000000,
 638         8000000,
 639         6000000,
 640         3000000,
 641         1500000,
 642         750000,
 643 };
 644
 645 /*
 646  * Must be called with data->update_lock held, except during initialization.
 647  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 648  * would slow down the IT87 access and should not be necessary.
 649  */
 650 static int it87_read_value(struct it87_data *data, u8 reg)
 651 {
 652         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 653         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 654 }
 655
 656 /*
 657  * Must be called with data->update_lock held, except during initialization.
 658  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 659  * would slow down the IT87 access and should not be necessary.
 660  */
 661 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 662 {
 663         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 664         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 665 }
 666
 667 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 668 {
 669         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 670         if (has_newer_autopwm(data)) {
 671                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 672                 data->pwm_duty[nr] = it87_read_value(data,
 673                                                      IT87_REG_PWM_DUTY[nr]);
 674         } else {
 675                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 676                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 677                 else                            /* Manual mode */
 678                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 679         }
 680
 681         if (has_old_autopwm(data)) {
 682                 int i;
 683
 684                 for (i = 0; i < 5 ; i++)
 685                         data->auto_temp[nr][i] = it87_read_value(data,
 686                                                 IT87_REG_AUTO_TEMP(nr, i));
 687                 for (i = 0; i < 3 ; i++)
 688                         data->auto_pwm[nr][i] = it87_read_value(data,
 689                                                 IT87_REG_AUTO_PWM(nr, i));
 690         } else if (has_newer_autopwm(data)) {
 691                 int i;
 692
 693                 /*
 694                  * 0: temperature hysteresis (base + 5)
 695                  * 1: fan off temperature (base + 0)
 696                  * 2: fan start temperature (base + 1)
 697                  * 3: fan max temperature (base + 2)
 698                  */
 699                 data->auto_temp[nr][0] =
 700                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 701
 702                 for (i = 0; i < 3 ; i++)
 703                         data->auto_temp[nr][i + 1] =
 704                                 it87_read_value(data,
 705                                                 IT87_REG_AUTO_TEMP(nr, i));
 706                 /*
 707                  * 0: start pwm value (base + 3)
 708                  * 1: pwm slope (base + 4, 1/8th pwm)
 709                  */
 710                 data->auto_pwm[nr][0] =
 711                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 712                 data->auto_pwm[nr][1] =
 713                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 714         }
 715 }
 716
 717 static struct it87_data *it87_update_device(struct device *dev)
 718 {
 719         struct it87_data *data = dev_get_drvdata(dev);
 720         int i;
 721
 722         mutex_lock(&data->update_lock);
 723
 724         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 725             !data->valid) {
 726                 if (update_vbat) {
 727                         /*
 728                          * Cleared after each update, so reenable.  Value
 729                          * returned by this read will be previous value
 730                          */
 731                         it87_write_value(data, IT87_REG_CONFIG,
 732                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 733                 }
 734                 for (i = 0; i < NUM_VIN; i++) {
 735                         if (!(data->has_in & BIT(i)))
 736                                 continue;
 737
 738                         data->in[i][0] =
 739                                 it87_read_value(data, IT87_REG_VIN[i]);
 740
 741                         /* VBAT and AVCC don't have limit registers */
 742                         if (i >= NUM_VIN_LIMIT)
 743                                 continue;
 744
 745                         data->in[i][1] =
 746                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 747                         data->in[i][2] =
 748                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 749                 }
 750
 751                 for (i = 0; i < NUM_FAN; i++) {
 752                         /* Skip disabled fans */
 753                         if (!(data->has_fan & BIT(i)))
 754                                 continue;
 755
 756                         data->fan[i][1] =
 757                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 758                         data->fan[i][0] = it87_read_value(data,
 759                                        IT87_REG_FAN[i]);
 760                         /* Add high byte if in 16-bit mode */
 761                         if (has_16bit_fans(data)) {
 762                                 data->fan[i][0] |= it87_read_value(data,
 763                                                 IT87_REG_FANX[i]) << 8;
 764                                 data->fan[i][1] |= it87_read_value(data,
 765                                                 IT87_REG_FANX_MIN[i]) << 8;
 766                         }
 767                 }
 768                 for (i = 0; i < NUM_TEMP; i++) {
 769                         if (!(data->has_temp & BIT(i)))
 770                                 continue;
 771                         data->temp[i][0] =
 772                                 it87_read_value(data, IT87_REG_TEMP(i));
 773
 774                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 775                                 data->temp[i][3] =
 776                                   it87_read_value(data,
 777                                                   IT87_REG_TEMP_OFFSET[i]);
 778
 779                         if (i >= NUM_TEMP_LIMIT)
 780                                 continue;
 781
 782                         data->temp[i][1] =
 783                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 784                         data->temp[i][2] =
 785                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 786                 }
 787
 788                 /* Newer chips don't have clock dividers */
 789                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 790                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 791                         data->fan_div[0] = i & 0x07;
 792                         data->fan_div[1] = (i >> 3) & 0x07;
 793                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 794                 }
 795
 796                 data->alarms =
 797                         it87_read_value(data, IT87_REG_ALARM1) |
 798                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 799                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 800                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 801
 802                 data->fan_main_ctrl = it87_read_value(data,
 803                                 IT87_REG_FAN_MAIN_CTRL);
 804                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 805                 for (i = 0; i < NUM_PWM; i++) {
 806                         if (!(data->has_pwm & BIT(i)))
 807                                 continue;
 808                         it87_update_pwm_ctrl(data, i);
 809                 }
 810
 811                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 812                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 813                 /*
 814                  * The IT8705F does not have VID capability.
 815                  * The IT8718F and later don't use IT87_REG_VID for the
 816                  * same purpose.
 817                  */
 818                 if (data->type == it8712 || data->type == it8716) {
 819                         data->vid = it87_read_value(data, IT87_REG_VID);
 820                         /*
 821                          * The older IT8712F revisions had only 5 VID pins,
 822                          * but we assume it is always safe to read 6 bits.
 823                          */
 824                         data->vid &= 0x3f;
 825                 }
 826                 data->last_updated = jiffies;
 827                 data->valid = 1;
 828         }
 829
 830         mutex_unlock(&data->update_lock);
 831
 832         return data;
 833 }
 834
 835 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 836                        char *buf)
 837 {
 838         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 839         struct it87_data *data = it87_update_device(dev);
 840         int index = sattr->index;
 841         int nr = sattr->nr;
 842
 843         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 844 }
 845
 846 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 847                       const char *buf, size_t count)
 848 {
 849         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 850         struct it87_data *data = dev_get_drvdata(dev);
 851         int index = sattr->index;
 852         int nr = sattr->nr;
 853         unsigned long val;
 854
 855         if (kstrtoul(buf, 10, &val) < 0)
 856                 return -EINVAL;
 857
 858         mutex_lock(&data->update_lock);
 859         data->in[nr][index] = in_to_reg(data, nr, val);
 860         it87_write_value(data,
 861                          index == 1 ? IT87_REG_VIN_MIN(nr)
 862                                     : IT87_REG_VIN_MAX(nr),
 863                          data->in[nr][index]);
 864         mutex_unlock(&data->update_lock);
 865         return count;
 866 }
 867
 868 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 869 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 870                             0, 1);
 871 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 872                             0, 2);
 873
 874 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 875 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 876                             1, 1);
 877 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 878                             1, 2);
 879
 880 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 881 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 882                             2, 1);
 883 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 884                             2, 2);
 885
 886 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 887 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 888                             3, 1);
 889 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 890                             3, 2);
 891
 892 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 893 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 894                             4, 1);
 895 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 896                             4, 2);
 897
 898 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 899 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 900                             5, 1);
 901 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 902                             5, 2);
 903
 904 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 905 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 906                             6, 1);
 907 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 908                             6, 2);
 909
 910 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 911 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 912                             7, 1);
 913 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 914                             7, 2);
 915
 916 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 917 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 918 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 919 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 920 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 921
 922 /* Up to 6 temperatures */
 923 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 924                          char *buf)
 925 {
 926         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 927         int nr = sattr->nr;
 928         int index = sattr->index;
 929         struct it87_data *data = it87_update_device(dev);
 930
 931         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 932 }
 933
 934 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 935                         const char *buf, size_t count)
 936 {
 937         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 938         int nr = sattr->nr;
 939         int index = sattr->index;
 940         struct it87_data *data = dev_get_drvdata(dev);
 941         long val;
 942         u8 reg, regval;
 943
 944         if (kstrtol(buf, 10, &val) < 0)
 945                 return -EINVAL;
 946
 947         mutex_lock(&data->update_lock);
 948
 949         switch (index) {
 950         default:
 951         case 1:
 952                 reg = IT87_REG_TEMP_LOW(nr);
 953                 break;
 954         case 2:
 955                 reg = IT87_REG_TEMP_HIGH(nr);
 956                 break;
 957         case 3:
 958                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 959                 if (!(regval & 0x80)) {
 960                         regval |= 0x80;
 961                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 962                 }
 963                 data->valid = 0;
 964                 reg = IT87_REG_TEMP_OFFSET[nr];
 965                 break;
 966         }
 967
 968         data->temp[nr][index] = TEMP_TO_REG(val);
 969         it87_write_value(data, reg, data->temp[nr][index]);
 970         mutex_unlock(&data->update_lock);
 971         return count;
 972 }
 973
 974 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 975 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 976                             0, 1);
 977 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 978                             0, 2);
 979 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
 980                             set_temp, 0, 3);
 981 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
 982 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 983                             1, 1);
 984 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 985                             1, 2);
 986 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
 987                             set_temp, 1, 3);
 988 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
 989 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 990                             2, 1);
 991 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
 992                             2, 2);
 993 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
 994                             set_temp, 2, 3);
 995 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
 996 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
 997 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
 998
 999 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1000                               char *buf)
1001 {
1002         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1003         int nr = sensor_attr->index;
1004         struct it87_data *data = it87_update_device(dev);
1005         u8 reg = data->sensor;      /* In case value is updated while used */
1006         u8 extra = data->extra;
1007
1008         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1009             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1010                 return sprintf(buf, "6\n");  /* Intel PECI */
1011         if (reg & (1 << nr))
1012                 return sprintf(buf, "3\n");  /* thermal diode */
1013         if (reg & (8 << nr))
1014                 return sprintf(buf, "4\n");  /* thermistor */
1015         return sprintf(buf, "0\n");      /* disabled */
1016 }
1017
1018 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1019                              const char *buf, size_t count)
1020 {
1021         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1022         int nr = sensor_attr->index;
1023
1024         struct it87_data *data = dev_get_drvdata(dev);
1025         long val;
1026         u8 reg, extra;
1027
1028         if (kstrtol(buf, 10, &val) < 0)
1029                 return -EINVAL;
1030
1031         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1032         reg &= ~(1 << nr);
1033         reg &= ~(8 << nr);
1034         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1035                 reg &= 0x3f;
1036         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1037         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1038                 extra &= 0x7f;
1039         if (val == 2) { /* backwards compatibility */
1040                 dev_warn(dev,
1041                          "Sensor type 2 is deprecated, please use 4 instead\n");
1042                 val = 4;
1043         }
1044         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1045         if (val == 3)
1046                 reg |= 1 << nr;
1047         else if (val == 4)
1048                 reg |= 8 << nr;
1049         else if (has_temp_peci(data, nr) && val == 6)
1050                 reg |= (nr + 1) << 6;
1051         else if (has_temp_old_peci(data, nr) && val == 6)
1052                 extra |= 0x80;
1053         else if (val != 0)
1054                 return -EINVAL;
1055
1056         mutex_lock(&data->update_lock);
1057         data->sensor = reg;
1058         data->extra = extra;
1059         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1060         if (has_temp_old_peci(data, nr))
1061                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1062         data->valid = 0;        /* Force cache refresh */
1063         mutex_unlock(&data->update_lock);
1064         return count;
1065 }
1066
1067 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1068                           set_temp_type, 0);
1069 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1070                           set_temp_type, 1);
1071 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1072                           set_temp_type, 2);
1073
1074 /* 6 Fans */
1075
1076 static int pwm_mode(const struct it87_data *data, int nr)
1077 {
1078         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1079                 return 0;                               /* Full speed */
1080         if (data->pwm_ctrl[nr] & 0x80)
1081                 return 2;                               /* Automatic mode */
1082         if ((data->type == it8603 || nr >= 3) &&
1083             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1084                 return 0;                       /* Full speed */
1085
1086         return 1;                               /* Manual mode */
1087 }
1088
1089 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1090                         char *buf)
1091 {
1092         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1093         int nr = sattr->nr;
1094         int index = sattr->index;
1095         int speed;
1096         struct it87_data *data = it87_update_device(dev);
1097
1098         speed = has_16bit_fans(data) ?
1099                 FAN16_FROM_REG(data->fan[nr][index]) :
1100                 FAN_FROM_REG(data->fan[nr][index],
1101                              DIV_FROM_REG(data->fan_div[nr]));
1102         return sprintf(buf, "%d\n", speed);
1103 }
1104
1105 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1106                             char *buf)
1107 {
1108         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1109         struct it87_data *data = it87_update_device(dev);
1110         int nr = sensor_attr->index;
1111
1112         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1113 }
1114
1115 static ssize_t show_pwm_enable(struct device *dev,
1116                                struct device_attribute *attr, char *buf)
1117 {
1118         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1119         struct it87_data *data = it87_update_device(dev);
1120         int nr = sensor_attr->index;
1121
1122         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1123 }
1124
1125 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1126                         char *buf)
1127 {
1128         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1129         struct it87_data *data = it87_update_device(dev);
1130         int nr = sensor_attr->index;
1131
1132         return sprintf(buf, "%d\n",
1133                        pwm_from_reg(data, data->pwm_duty[nr]));
1134 }
1135
1136 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1137                              char *buf)
1138 {
1139         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1140         struct it87_data *data = it87_update_device(dev);
1141         int nr = sensor_attr->index;
1142         unsigned int freq;
1143         int index;
1144
1145         if (has_pwm_freq2(data) && nr == 1)
1146                 index = (data->extra >> 4) & 0x07;
1147         else
1148                 index = (data->fan_ctl >> 4) & 0x07;
1149
1150         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1151
1152         return sprintf(buf, "%u\n", freq);
1153 }
1154
1155 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1156                        const char *buf, size_t count)
1157 {
1158         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1159         int nr = sattr->nr;
1160         int index = sattr->index;
1161
1162         struct it87_data *data = dev_get_drvdata(dev);
1163         long val;
1164         u8 reg;
1165
1166         if (kstrtol(buf, 10, &val) < 0)
1167                 return -EINVAL;
1168
1169         mutex_lock(&data->update_lock);
1170
1171         if (has_16bit_fans(data)) {
1172                 data->fan[nr][index] = FAN16_TO_REG(val);
1173                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1174                                  data->fan[nr][index] & 0xff);
1175                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1176                                  data->fan[nr][index] >> 8);
1177         } else {
1178                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1179                 switch (nr) {
1180                 case 0:
1181                         data->fan_div[nr] = reg & 0x07;
1182                         break;
1183                 case 1:
1184                         data->fan_div[nr] = (reg >> 3) & 0x07;
1185                         break;
1186                 case 2:
1187                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1188                         break;
1189                 }
1190                 data->fan[nr][index] =
1191                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1192                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1193                                  data->fan[nr][index]);
1194         }
1195
1196         mutex_unlock(&data->update_lock);
1197         return count;
1198 }
1199
1200 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1201                            const char *buf, size_t count)
1202 {
1203         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1204         struct it87_data *data = dev_get_drvdata(dev);
1205         int nr = sensor_attr->index;
1206         unsigned long val;
1207         int min;
1208         u8 old;
1209
1210         if (kstrtoul(buf, 10, &val) < 0)
1211                 return -EINVAL;
1212
1213         mutex_lock(&data->update_lock);
1214         old = it87_read_value(data, IT87_REG_FAN_DIV);
1215
1216         /* Save fan min limit */
1217         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1218
1219         switch (nr) {
1220         case 0:
1221         case 1:
1222                 data->fan_div[nr] = DIV_TO_REG(val);
1223                 break;
1224         case 2:
1225                 if (val < 8)
1226                         data->fan_div[nr] = 1;
1227                 else
1228                         data->fan_div[nr] = 3;
1229         }
1230         val = old & 0x80;
1231         val |= (data->fan_div[0] & 0x07);
1232         val |= (data->fan_div[1] & 0x07) << 3;
1233         if (data->fan_div[2] == 3)
1234                 val |= 0x1 << 6;
1235         it87_write_value(data, IT87_REG_FAN_DIV, val);
1236
1237         /* Restore fan min limit */
1238         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1239         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1240
1241         mutex_unlock(&data->update_lock);
1242         return count;
1243 }
1244
1245 /* Returns 0 if OK, -EINVAL otherwise */
1246 static int check_trip_points(struct device *dev, int nr)
1247 {
1248         const struct it87_data *data = dev_get_drvdata(dev);
1249         int i, err = 0;
1250
1251         if (has_old_autopwm(data)) {
1252                 for (i = 0; i < 3; i++) {
1253                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1254                                 err = -EINVAL;
1255                 }
1256                 for (i = 0; i < 2; i++) {
1257                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1258                                 err = -EINVAL;
1259                 }
1260         } else if (has_newer_autopwm(data)) {
1261                 for (i = 1; i < 3; i++) {
1262                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1263                                 err = -EINVAL;
1264                 }
1265         }
1266
1267         if (err) {
1268                 dev_err(dev,
1269                         "Inconsistent trip points, not switching to automatic mode\n");
1270                 dev_err(dev, "Adjust the trip points and try again\n");
1271         }
1272         return err;
1273 }
1274
1275 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1276                               const char *buf, size_t count)
1277 {
1278         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1279         struct it87_data *data = dev_get_drvdata(dev);
1280         int nr = sensor_attr->index;
1281         long val;
1282
1283         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1284                 return -EINVAL;
1285
1286         /* Check trip points before switching to automatic mode */
1287         if (val == 2) {
1288                 if (check_trip_points(dev, nr) < 0)
1289                         return -EINVAL;
1290         }
1291
1292         mutex_lock(&data->update_lock);
1293
1294         if (val == 0) {
1295                 if (nr < 3 && data->type != it8603) {
1296                         int tmp;
1297                         /* make sure the fan is on when in on/off mode */
1298                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1299                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1300                         /* set on/off mode */
1301                         data->fan_main_ctrl &= ~BIT(nr);
1302                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1303                                          data->fan_main_ctrl);
1304                 } else {
1305                         /* No on/off mode, set maximum pwm value */
1306                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1307                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1308                                          data->pwm_duty[nr]);
1309                         /* and set manual mode */
1310                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1311                                              data->pwm_temp_map[nr] :
1312                                              data->pwm_duty[nr];
1313                         it87_write_value(data, IT87_REG_PWM[nr],
1314                                          data->pwm_ctrl[nr]);
1315                 }
1316         } else {
1317                 if (val == 1)                           /* Manual mode */
1318                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1319                                              data->pwm_temp_map[nr] :
1320                                              data->pwm_duty[nr];
1321                 else                                    /* Automatic mode */
1322                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1323                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1324
1325                 if (data->type != it8603 && nr < 3) {
1326                         /* set SmartGuardian mode */
1327                         data->fan_main_ctrl |= BIT(nr);
1328                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1329                                          data->fan_main_ctrl);
1330                 }
1331         }
1332
1333         mutex_unlock(&data->update_lock);
1334         return count;
1335 }
1336
1337 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1338                        const char *buf, size_t count)
1339 {
1340         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1341         struct it87_data *data = dev_get_drvdata(dev);
1342         int nr = sensor_attr->index;
1343         long val;
1344
1345         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1346                 return -EINVAL;
1347
1348         mutex_lock(&data->update_lock);
1349         if (has_newer_autopwm(data)) {
1350                 /*
1351                  * If we are in automatic mode, the PWM duty cycle register
1352                  * is read-only so we can't write the value.
1353                  */
1354                 if (data->pwm_ctrl[nr] & 0x80) {
1355                         mutex_unlock(&data->update_lock);
1356                         return -EBUSY;
1357                 }
1358                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1359                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1360                                  data->pwm_duty[nr]);
1361         } else {
1362                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1363                 /*
1364                  * If we are in manual mode, write the duty cycle immediately;
1365                  * otherwise, just store it for later use.
1366                  */
1367                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1368                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1369                         it87_write_value(data, IT87_REG_PWM[nr],
1370                                          data->pwm_ctrl[nr]);
1371                 }
1372         }
1373         mutex_unlock(&data->update_lock);
1374         return count;
1375 }
1376
1377 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1378                             const char *buf, size_t count)
1379 {
1380         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1381         struct it87_data *data = dev_get_drvdata(dev);
1382         int nr = sensor_attr->index;
1383         unsigned long val;
1384         int i;
1385
1386         if (kstrtoul(buf, 10, &val) < 0)
1387                 return -EINVAL;
1388
1389         val = clamp_val(val, 0, 1000000);
1390         val *= has_newer_autopwm(data) ? 256 : 128;
1391
1392         /* Search for the nearest available frequency */
1393         for (i = 0; i < 7; i++) {
1394                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1395                         break;
1396         }
1397
1398         mutex_lock(&data->update_lock);
1399         if (nr == 0) {
1400                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1401                 data->fan_ctl |= i << 4;
1402                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1403         } else {
1404                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1405                 data->extra |= i << 4;
1406                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1407         }
1408         mutex_unlock(&data->update_lock);
1409
1410         return count;
1411 }
1412
1413 static ssize_t show_pwm_temp_map(struct device *dev,
1414                                  struct device_attribute *attr, char *buf)
1415 {
1416         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1417         struct it87_data *data = it87_update_device(dev);
1418         int nr = sensor_attr->index;
1419         int map;
1420
1421         map = data->pwm_temp_map[nr];
1422         if (map >= 3)
1423                 map = 0;        /* Should never happen */
1424         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1425                 map += 3;
1426
1427         return sprintf(buf, "%d\n", (int)BIT(map));
1428 }
1429
1430 static ssize_t set_pwm_temp_map(struct device *dev,
1431                                 struct device_attribute *attr, const char *buf,
1432                                 size_t count)
1433 {
1434         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1435         struct it87_data *data = dev_get_drvdata(dev);
1436         int nr = sensor_attr->index;
1437         long val;
1438         u8 reg;
1439
1440         if (kstrtol(buf, 10, &val) < 0)
1441                 return -EINVAL;
1442
1443         if (nr >= 3)
1444                 val -= 3;
1445
1446         switch (val) {
1447         case BIT(0):
1448                 reg = 0x00;
1449                 break;
1450         case BIT(1):
1451                 reg = 0x01;
1452                 break;
1453         case BIT(2):
1454                 reg = 0x02;
1455                 break;
1456         default:
1457                 return -EINVAL;
1458         }
1459
1460         mutex_lock(&data->update_lock);
1461         data->pwm_temp_map[nr] = reg;
1462         /*
1463          * If we are in automatic mode, write the temp mapping immediately;
1464          * otherwise, just store it for later use.
1465          */
1466         if (data->pwm_ctrl[nr] & 0x80) {
1467                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1468                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1469         }
1470         mutex_unlock(&data->update_lock);
1471         return count;
1472 }
1473
1474 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1475                              char *buf)
1476 {
1477         struct it87_data *data = it87_update_device(dev);
1478         struct sensor_device_attribute_2 *sensor_attr =
1479                         to_sensor_dev_attr_2(attr);
1480         int nr = sensor_attr->nr;
1481         int point = sensor_attr->index;
1482
1483         return sprintf(buf, "%d\n",
1484                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1485 }
1486
1487 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1488                             const char *buf, size_t count)
1489 {
1490         struct it87_data *data = dev_get_drvdata(dev);
1491         struct sensor_device_attribute_2 *sensor_attr =
1492                         to_sensor_dev_attr_2(attr);
1493         int nr = sensor_attr->nr;
1494         int point = sensor_attr->index;
1495         int regaddr;
1496         long val;
1497
1498         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1499                 return -EINVAL;
1500
1501         mutex_lock(&data->update_lock);
1502         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1503         if (has_newer_autopwm(data))
1504                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1505         else
1506                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1507         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1508         mutex_unlock(&data->update_lock);
1509         return count;
1510 }
1511
1512 static ssize_t show_auto_pwm_slope(struct device *dev,
1513                                    struct device_attribute *attr, char *buf)
1514 {
1515         struct it87_data *data = it87_update_device(dev);
1516         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1517         int nr = sensor_attr->index;
1518
1519         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1520 }
1521
1522 static ssize_t set_auto_pwm_slope(struct device *dev,
1523                                   struct device_attribute *attr,
1524                                   const char *buf, size_t count)
1525 {
1526         struct it87_data *data = dev_get_drvdata(dev);
1527         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1528         int nr = sensor_attr->index;
1529         unsigned long val;
1530
1531         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1532                 return -EINVAL;
1533
1534         mutex_lock(&data->update_lock);
1535         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1536         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1537                          data->auto_pwm[nr][1]);
1538         mutex_unlock(&data->update_lock);
1539         return count;
1540 }
1541
1542 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1543                               char *buf)
1544 {
1545         struct it87_data *data = it87_update_device(dev);
1546         struct sensor_device_attribute_2 *sensor_attr =
1547                         to_sensor_dev_attr_2(attr);
1548         int nr = sensor_attr->nr;
1549         int point = sensor_attr->index;
1550         int reg;
1551
1552         if (has_old_autopwm(data) || point)
1553                 reg = data->auto_temp[nr][point];
1554         else
1555                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1556
1557         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1558 }
1559
1560 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1561                              const char *buf, size_t count)
1562 {
1563         struct it87_data *data = dev_get_drvdata(dev);
1564         struct sensor_device_attribute_2 *sensor_attr =
1565                         to_sensor_dev_attr_2(attr);
1566         int nr = sensor_attr->nr;
1567         int point = sensor_attr->index;
1568         long val;
1569         int reg;
1570
1571         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1572                 return -EINVAL;
1573
1574         mutex_lock(&data->update_lock);
1575         if (has_newer_autopwm(data) && !point) {
1576                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1577                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1578                 data->auto_temp[nr][0] = reg;
1579                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1580         } else {
1581                 reg = TEMP_TO_REG(val);
1582                 data->auto_temp[nr][point] = reg;
1583                 if (has_newer_autopwm(data))
1584                         point--;
1585                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1586         }
1587         mutex_unlock(&data->update_lock);
1588         return count;
1589 }
1590
1591 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1592 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1593                             0, 1);
1594 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1595                           set_fan_div, 0);
1596
1597 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1598 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1599                             1, 1);
1600 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1601                           set_fan_div, 1);
1602
1603 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1604 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1605                             2, 1);
1606 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1607                           set_fan_div, 2);
1608
1609 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1610 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1611                             3, 1);
1612
1613 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1614 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1615                             4, 1);
1616
1617 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1618 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1619                             5, 1);
1620
1621 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1622                           show_pwm_enable, set_pwm_enable, 0);
1623 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1624 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1625                           set_pwm_freq, 0);
1626 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1627                           show_pwm_temp_map, set_pwm_temp_map, 0);
1628 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1629                             show_auto_pwm, set_auto_pwm, 0, 0);
1630 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1631                             show_auto_pwm, set_auto_pwm, 0, 1);
1632 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1633                             show_auto_pwm, set_auto_pwm, 0, 2);
1634 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1635                             show_auto_pwm, NULL, 0, 3);
1636 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1637                             show_auto_temp, set_auto_temp, 0, 1);
1638 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1639                             show_auto_temp, set_auto_temp, 0, 0);
1640 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1641                             show_auto_temp, set_auto_temp, 0, 2);
1642 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1643                             show_auto_temp, set_auto_temp, 0, 3);
1644 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1645                             show_auto_temp, set_auto_temp, 0, 4);
1646 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1647                             show_auto_pwm, set_auto_pwm, 0, 0);
1648 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1649                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1650
1651 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1652                           show_pwm_enable, set_pwm_enable, 1);
1653 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1654 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1655 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1656                           show_pwm_temp_map, set_pwm_temp_map, 1);
1657 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1658                             show_auto_pwm, set_auto_pwm, 1, 0);
1659 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1660                             show_auto_pwm, set_auto_pwm, 1, 1);
1661 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1662                             show_auto_pwm, set_auto_pwm, 1, 2);
1663 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1664                             show_auto_pwm, NULL, 1, 3);
1665 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1666                             show_auto_temp, set_auto_temp, 1, 1);
1667 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1668                             show_auto_temp, set_auto_temp, 1, 0);
1669 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1670                             show_auto_temp, set_auto_temp, 1, 2);
1671 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1672                             show_auto_temp, set_auto_temp, 1, 3);
1673 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1674                             show_auto_temp, set_auto_temp, 1, 4);
1675 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1676                             show_auto_pwm, set_auto_pwm, 1, 0);
1677 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1678                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1679
1680 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1681                           show_pwm_enable, set_pwm_enable, 2);
1682 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1683 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1684 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1685                           show_pwm_temp_map, set_pwm_temp_map, 2);
1686 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1687                             show_auto_pwm, set_auto_pwm, 2, 0);
1688 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1689                             show_auto_pwm, set_auto_pwm, 2, 1);
1690 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1691                             show_auto_pwm, set_auto_pwm, 2, 2);
1692 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1693                             show_auto_pwm, NULL, 2, 3);
1694 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1695                             show_auto_temp, set_auto_temp, 2, 1);
1696 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1697                             show_auto_temp, set_auto_temp, 2, 0);
1698 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1699                             show_auto_temp, set_auto_temp, 2, 2);
1700 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1701                             show_auto_temp, set_auto_temp, 2, 3);
1702 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1703                             show_auto_temp, set_auto_temp, 2, 4);
1704 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1705                             show_auto_pwm, set_auto_pwm, 2, 0);
1706 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1707                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1708
1709 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1710                           show_pwm_enable, set_pwm_enable, 3);
1711 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1712 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1713 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1714                           show_pwm_temp_map, set_pwm_temp_map, 3);
1715 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1716                             show_auto_temp, set_auto_temp, 2, 1);
1717 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1718                             show_auto_temp, set_auto_temp, 2, 0);
1719 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1720                             show_auto_temp, set_auto_temp, 2, 2);
1721 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1722                             show_auto_temp, set_auto_temp, 2, 3);
1723 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1724                             show_auto_pwm, set_auto_pwm, 3, 0);
1725 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1726                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1727
1728 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1729                           show_pwm_enable, set_pwm_enable, 4);
1730 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1731 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1732 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1733                           show_pwm_temp_map, set_pwm_temp_map, 4);
1734 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1735                             show_auto_temp, set_auto_temp, 2, 1);
1736 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1737                             show_auto_temp, set_auto_temp, 2, 0);
1738 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1739                             show_auto_temp, set_auto_temp, 2, 2);
1740 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1741                             show_auto_temp, set_auto_temp, 2, 3);
1742 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1743                             show_auto_pwm, set_auto_pwm, 4, 0);
1744 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1745                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1746
1747 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1748                           show_pwm_enable, set_pwm_enable, 5);
1749 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1750 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1751 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1752                           show_pwm_temp_map, set_pwm_temp_map, 5);
1753 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1754                             show_auto_temp, set_auto_temp, 2, 1);
1755 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1756                             show_auto_temp, set_auto_temp, 2, 0);
1757 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1758                             show_auto_temp, set_auto_temp, 2, 2);
1759 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1760                             show_auto_temp, set_auto_temp, 2, 3);
1761 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1762                             show_auto_pwm, set_auto_pwm, 5, 0);
1763 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1764                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1765
1766 /* Alarms */
1767 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1768                            char *buf)
1769 {
1770         struct it87_data *data = it87_update_device(dev);
1771
1772         return sprintf(buf, "%u\n", data->alarms);
1773 }
1774 static DEVICE_ATTR_RO(alarms);
1775
1776 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1777                           char *buf)
1778 {
1779         struct it87_data *data = it87_update_device(dev);
1780         int bitnr = to_sensor_dev_attr(attr)->index;
1781
1782         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1783 }
1784
1785 static ssize_t clear_intrusion(struct device *dev,
1786                                struct device_attribute *attr, const char *buf,
1787                                size_t count)
1788 {
1789         struct it87_data *data = dev_get_drvdata(dev);
1790         int config;
1791         long val;
1792
1793         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1794                 return -EINVAL;
1795
1796         mutex_lock(&data->update_lock);
1797         config = it87_read_value(data, IT87_REG_CONFIG);
1798         if (config < 0) {
1799                 count = config;
1800         } else {
1801                 config |= BIT(5);
1802                 it87_write_value(data, IT87_REG_CONFIG, config);
1803                 /* Invalidate cache to force re-read */
1804                 data->valid = 0;
1805         }
1806         mutex_unlock(&data->update_lock);
1807
1808         return count;
1809 }
1810
1811 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1812 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1813 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1814 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1815 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1816 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1817 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1818 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1819 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1820 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1821 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1822 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1823 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1824 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1825 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1826 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1827 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1828 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1829                           show_alarm, clear_intrusion, 4);
1830
1831 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1832                          char *buf)
1833 {
1834         struct it87_data *data = it87_update_device(dev);
1835         int bitnr = to_sensor_dev_attr(attr)->index;
1836
1837         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1838 }
1839
1840 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1841                         const char *buf, size_t count)
1842 {
1843         int bitnr = to_sensor_dev_attr(attr)->index;
1844         struct it87_data *data = dev_get_drvdata(dev);
1845         long val;
1846
1847         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1848                 return -EINVAL;
1849
1850         mutex_lock(&data->update_lock);
1851         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1852         if (val)
1853                 data->beeps |= BIT(bitnr);
1854         else
1855                 data->beeps &= ~BIT(bitnr);
1856         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1857         mutex_unlock(&data->update_lock);
1858         return count;
1859 }
1860
1861 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1862                           show_beep, set_beep, 1);
1863 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1864 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1865 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1866 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1867 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1868 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1869 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1870 /* fanX_beep writability is set later */
1871 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1872 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1873 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1874 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1875 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1876 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1877 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1878                           show_beep, set_beep, 2);
1879 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1880 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1881
1882 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1883                         char *buf)
1884 {
1885         struct it87_data *data = dev_get_drvdata(dev);
1886
1887         return sprintf(buf, "%u\n", data->vrm);
1888 }
1889
1890 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1891                          const char *buf, size_t count)
1892 {
1893         struct it87_data *data = dev_get_drvdata(dev);
1894         unsigned long val;
1895
1896         if (kstrtoul(buf, 10, &val) < 0)
1897                 return -EINVAL;
1898
1899         data->vrm = val;
1900
1901         return count;
1902 }
1903 static DEVICE_ATTR_RW(vrm);
1904
1905 static ssize_t cpu0_vid_show(struct device *dev,
1906                              struct device_attribute *attr, char *buf)
1907 {
1908         struct it87_data *data = it87_update_device(dev);
1909
1910         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1911 }
1912 static DEVICE_ATTR_RO(cpu0_vid);
1913
1914 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1915                           char *buf)
1916 {
1917         static const char * const labels[] = {
1918                 "+5V",
1919                 "5VSB",
1920                 "Vbat",
1921         };
1922         static const char * const labels_it8721[] = {
1923                 "+3.3V",
1924                 "3VSB",
1925                 "Vbat",
1926         };
1927         struct it87_data *data = dev_get_drvdata(dev);
1928         int nr = to_sensor_dev_attr(attr)->index;
1929         const char *label;
1930
1931         if (has_vin3_5v(data) && nr == 0)
1932                 label = labels[0];
1933         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1934                 label = labels_it8721[nr];
1935         else
1936                 label = labels[nr];
1937
1938         return sprintf(buf, "%s\n", label);
1939 }
1940 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1941 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1942 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1943 /* AVCC3 */
1944 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1945
1946 static umode_t it87_in_is_visible(struct kobject *kobj,
1947                                   struct attribute *attr, int index)
1948 {
1949         struct device *dev = container_of(kobj, struct device, kobj);
1950         struct it87_data *data = dev_get_drvdata(dev);
1951         int i = index / 5;      /* voltage index */
1952         int a = index % 5;      /* attribute index */
1953
1954         if (index >= 40) {      /* in8 and higher only have input attributes */
1955                 i = index - 40 + 8;
1956                 a = 0;
1957         }
1958
1959         if (!(data->has_in & BIT(i)))
1960                 return 0;
1961
1962         if (a == 4 && !data->has_beep)
1963                 return 0;
1964
1965         return attr->mode;
1966 }
1967
1968 static struct attribute *it87_attributes_in[] = {
1969         &sensor_dev_attr_in0_input.dev_attr.attr,
1970         &sensor_dev_attr_in0_min.dev_attr.attr,
1971         &sensor_dev_attr_in0_max.dev_attr.attr,
1972         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1973         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
1974
1975         &sensor_dev_attr_in1_input.dev_attr.attr,
1976         &sensor_dev_attr_in1_min.dev_attr.attr,
1977         &sensor_dev_attr_in1_max.dev_attr.attr,
1978         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1979         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
1980
1981         &sensor_dev_attr_in2_input.dev_attr.attr,
1982         &sensor_dev_attr_in2_min.dev_attr.attr,
1983         &sensor_dev_attr_in2_max.dev_attr.attr,
1984         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1985         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
1986
1987         &sensor_dev_attr_in3_input.dev_attr.attr,
1988         &sensor_dev_attr_in3_min.dev_attr.attr,
1989         &sensor_dev_attr_in3_max.dev_attr.attr,
1990         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1991         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
1992
1993         &sensor_dev_attr_in4_input.dev_attr.attr,
1994         &sensor_dev_attr_in4_min.dev_attr.attr,
1995         &sensor_dev_attr_in4_max.dev_attr.attr,
1996         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1997         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
1998
1999         &sensor_dev_attr_in5_input.dev_attr.attr,
2000         &sensor_dev_attr_in5_min.dev_attr.attr,
2001         &sensor_dev_attr_in5_max.dev_attr.attr,
2002         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2003         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2004
2005         &sensor_dev_attr_in6_input.dev_attr.attr,
2006         &sensor_dev_attr_in6_min.dev_attr.attr,
2007         &sensor_dev_attr_in6_max.dev_attr.attr,
2008         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2009         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2010
2011         &sensor_dev_attr_in7_input.dev_attr.attr,
2012         &sensor_dev_attr_in7_min.dev_attr.attr,
2013         &sensor_dev_attr_in7_max.dev_attr.attr,
2014         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2015         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2016
2017         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2018         &sensor_dev_attr_in9_input.dev_attr.attr,
2019         &sensor_dev_attr_in10_input.dev_attr.attr,
2020         &sensor_dev_attr_in11_input.dev_attr.attr,
2021         &sensor_dev_attr_in12_input.dev_attr.attr,
2022         NULL
2023 };
2024
2025 static const struct attribute_group it87_group_in = {
2026         .attrs = it87_attributes_in,
2027         .is_visible = it87_in_is_visible,
2028 };
2029
2030 static umode_t it87_temp_is_visible(struct kobject *kobj,
2031                                     struct attribute *attr, int index)
2032 {
2033         struct device *dev = container_of(kobj, struct device, kobj);
2034         struct it87_data *data = dev_get_drvdata(dev);
2035         int i = index / 7;      /* temperature index */
2036         int a = index % 7;      /* attribute index */
2037
2038         if (index >= 21) {
2039                 i = index - 21 + 3;
2040                 a = 0;
2041         }
2042
2043         if (!(data->has_temp & BIT(i)))
2044                 return 0;
2045
2046         if (a == 5 && !has_temp_offset(data))
2047                 return 0;
2048
2049         if (a == 6 && !data->has_beep)
2050                 return 0;
2051
2052         return attr->mode;
2053 }
2054
2055 static struct attribute *it87_attributes_temp[] = {
2056         &sensor_dev_attr_temp1_input.dev_attr.attr,
2057         &sensor_dev_attr_temp1_max.dev_attr.attr,
2058         &sensor_dev_attr_temp1_min.dev_attr.attr,
2059         &sensor_dev_attr_temp1_type.dev_attr.attr,
2060         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2061         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2062         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2063
2064         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2065         &sensor_dev_attr_temp2_max.dev_attr.attr,
2066         &sensor_dev_attr_temp2_min.dev_attr.attr,
2067         &sensor_dev_attr_temp2_type.dev_attr.attr,
2068         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2069         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2070         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2071
2072         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2073         &sensor_dev_attr_temp3_max.dev_attr.attr,
2074         &sensor_dev_attr_temp3_min.dev_attr.attr,
2075         &sensor_dev_attr_temp3_type.dev_attr.attr,
2076         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2077         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2078         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2079
2080         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2081         &sensor_dev_attr_temp5_input.dev_attr.attr,
2082         &sensor_dev_attr_temp6_input.dev_attr.attr,
2083         NULL
2084 };
2085
2086 static const struct attribute_group it87_group_temp = {
2087         .attrs = it87_attributes_temp,
2088         .is_visible = it87_temp_is_visible,
2089 };
2090
2091 static umode_t it87_is_visible(struct kobject *kobj,
2092                                struct attribute *attr, int index)
2093 {
2094         struct device *dev = container_of(kobj, struct device, kobj);
2095         struct it87_data *data = dev_get_drvdata(dev);
2096
2097         if ((index == 2 || index == 3) && !data->has_vid)
2098                 return 0;
2099
2100         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2101                 return 0;
2102
2103         return attr->mode;
2104 }
2105
2106 static struct attribute *it87_attributes[] = {
2107         &dev_attr_alarms.attr,
2108         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2109         &dev_attr_vrm.attr,                             /* 2 */
2110         &dev_attr_cpu0_vid.attr,                        /* 3 */
2111         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2112         &sensor_dev_attr_in7_label.dev_attr.attr,
2113         &sensor_dev_attr_in8_label.dev_attr.attr,
2114         &sensor_dev_attr_in9_label.dev_attr.attr,
2115         NULL
2116 };
2117
2118 static const struct attribute_group it87_group = {
2119         .attrs = it87_attributes,
2120         .is_visible = it87_is_visible,
2121 };
2122
2123 static umode_t it87_fan_is_visible(struct kobject *kobj,
2124                                    struct attribute *attr, int index)
2125 {
2126         struct device *dev = container_of(kobj, struct device, kobj);
2127         struct it87_data *data = dev_get_drvdata(dev);
2128         int i = index / 5;      /* fan index */
2129         int a = index % 5;      /* attribute index */
2130
2131         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2132                 i = (index - 15) / 4 + 3;
2133                 a = (index - 15) % 4;
2134         }
2135
2136         if (!(data->has_fan & BIT(i)))
2137                 return 0;
2138
2139         if (a == 3) {                           /* beep */
2140                 if (!data->has_beep)
2141                         return 0;
2142                 /* first fan beep attribute is writable */
2143                 if (i == __ffs(data->has_fan))
2144                         return attr->mode | S_IWUSR;
2145         }
2146
2147         if (a == 4 && has_16bit_fans(data))     /* divisor */
2148                 return 0;
2149
2150         return attr->mode;
2151 }
2152
2153 static struct attribute *it87_attributes_fan[] = {
2154         &sensor_dev_attr_fan1_input.dev_attr.attr,
2155         &sensor_dev_attr_fan1_min.dev_attr.attr,
2156         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2157         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2158         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2159
2160         &sensor_dev_attr_fan2_input.dev_attr.attr,
2161         &sensor_dev_attr_fan2_min.dev_attr.attr,
2162         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2163         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2164         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2165
2166         &sensor_dev_attr_fan3_input.dev_attr.attr,
2167         &sensor_dev_attr_fan3_min.dev_attr.attr,
2168         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2169         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2170         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2171
2172         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2173         &sensor_dev_attr_fan4_min.dev_attr.attr,
2174         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2175         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2176
2177         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2178         &sensor_dev_attr_fan5_min.dev_attr.attr,
2179         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2180         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2181
2182         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2183         &sensor_dev_attr_fan6_min.dev_attr.attr,
2184         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2185         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2186         NULL
2187 };
2188
2189 static const struct attribute_group it87_group_fan = {
2190         .attrs = it87_attributes_fan,
2191         .is_visible = it87_fan_is_visible,
2192 };
2193
2194 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2195                                    struct attribute *attr, int index)
2196 {
2197         struct device *dev = container_of(kobj, struct device, kobj);
2198         struct it87_data *data = dev_get_drvdata(dev);
2199         int i = index / 4;      /* pwm index */
2200         int a = index % 4;      /* attribute index */
2201
2202         if (!(data->has_pwm & BIT(i)))
2203                 return 0;
2204
2205         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2206         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2207                 return attr->mode | S_IWUSR;
2208
2209         /* pwm2_freq is writable if there are two pwm frequency selects */
2210         if (has_pwm_freq2(data) && i == 1 && a == 2)
2211                 return attr->mode | S_IWUSR;
2212
2213         return attr->mode;
2214 }
2215
2216 static struct attribute *it87_attributes_pwm[] = {
2217         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2218         &sensor_dev_attr_pwm1.dev_attr.attr,
2219         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2220         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2221
2222         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2223         &sensor_dev_attr_pwm2.dev_attr.attr,
2224         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2225         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2226
2227         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2228         &sensor_dev_attr_pwm3.dev_attr.attr,
2229         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2230         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2231
2232         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2233         &sensor_dev_attr_pwm4.dev_attr.attr,
2234         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2235         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2236
2237         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2238         &sensor_dev_attr_pwm5.dev_attr.attr,
2239         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2240         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2241
2242         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2243         &sensor_dev_attr_pwm6.dev_attr.attr,
2244         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2245         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2246
2247         NULL
2248 };
2249
2250 static const struct attribute_group it87_group_pwm = {
2251         .attrs = it87_attributes_pwm,
2252         .is_visible = it87_pwm_is_visible,
2253 };
2254
2255 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2256                                         struct attribute *attr, int index)
2257 {
2258         struct device *dev = container_of(kobj, struct device, kobj);
2259         struct it87_data *data = dev_get_drvdata(dev);
2260         int i = index / 11;     /* pwm index */
2261         int a = index % 11;     /* attribute index */
2262
2263         if (index >= 33) {      /* pwm 4..6 */
2264                 i = (index - 33) / 6 + 3;
2265                 a = (index - 33) % 6 + 4;
2266         }
2267
2268         if (!(data->has_pwm & BIT(i)))
2269                 return 0;
2270
2271         if (has_newer_autopwm(data)) {
2272                 if (a < 4)      /* no auto point pwm */
2273                         return 0;
2274                 if (a == 8)     /* no auto_point4 */
2275                         return 0;
2276         }
2277         if (has_old_autopwm(data)) {
2278                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2279                         return 0;
2280         }
2281
2282         return attr->mode;
2283 }
2284
2285 static struct attribute *it87_attributes_auto_pwm[] = {
2286         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2287         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2288         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2289         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2290         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2291         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2292         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2293         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2294         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2295         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2296         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2297
2298         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2299         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2300         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2301         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2302         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2303         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2304         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2305         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2306         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2307         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2308         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2309
2310         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2311         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2312         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2313         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2314         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2315         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2316         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2317         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2318         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2319         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2320         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2321
2322         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2323         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2324         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2325         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2326         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2327         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2328
2329         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2330         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2331         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2332         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2333         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2334         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2335
2336         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2337         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2338         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2339         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2340         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2341         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2342
2343         NULL,
2344 };
2345
2346 static const struct attribute_group it87_group_auto_pwm = {
2347         .attrs = it87_attributes_auto_pwm,
2348         .is_visible = it87_auto_pwm_is_visible,
2349 };
2350
2351 /* SuperIO detection - will change isa_address if a chip is found */
2352 static int __init it87_find(int sioaddr, unsigned short *address,
2353                             struct it87_sio_data *sio_data)
2354 {
2355         int err;
2356         u16 chip_type;
2357         const char *board_vendor, *board_name;
2358         const struct it87_devices *config;
2359
2360         err = superio_enter(sioaddr);
2361         if (err)
2362                 return err;
2363
2364         err = -ENODEV;
2365         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2366
2367         switch (chip_type) {
2368         case IT8705F_DEVID:
2369                 sio_data->type = it87;
2370                 break;
2371         case IT8712F_DEVID:
2372                 sio_data->type = it8712;
2373                 break;
2374         case IT8716F_DEVID:
2375         case IT8726F_DEVID:
2376                 sio_data->type = it8716;
2377                 break;
2378         case IT8718F_DEVID:
2379                 sio_data->type = it8718;
2380                 break;
2381         case IT8720F_DEVID:
2382                 sio_data->type = it8720;
2383                 break;
2384         case IT8721F_DEVID:
2385                 sio_data->type = it8721;
2386                 break;
2387         case IT8728F_DEVID:
2388                 sio_data->type = it8728;
2389                 break;
2390         case IT8732F_DEVID:
2391                 sio_data->type = it8732;
2392                 break;
2393         case IT8771E_DEVID:
2394                 sio_data->type = it8771;
2395                 break;
2396         case IT8772E_DEVID:
2397                 sio_data->type = it8772;
2398                 break;
2399         case IT8781F_DEVID:
2400                 sio_data->type = it8781;
2401                 break;
2402         case IT8782F_DEVID:
2403                 sio_data->type = it8782;
2404                 break;
2405         case IT8783E_DEVID:
2406                 sio_data->type = it8783;
2407                 break;
2408         case IT8786E_DEVID:
2409                 sio_data->type = it8786;
2410                 break;
2411         case IT8790E_DEVID:
2412                 sio_data->type = it8790;
2413                 break;
2414         case IT8603E_DEVID:
2415         case IT8623E_DEVID:
2416                 sio_data->type = it8603;
2417                 break;
2418         case IT8620E_DEVID:
2419                 sio_data->type = it8620;
2420                 break;
2421         case IT8628E_DEVID:
2422                 sio_data->type = it8628;
2423                 break;
2424         case 0xffff:    /* No device at all */
2425                 goto exit;
2426         default:
2427                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2428                 goto exit;
2429         }
2430
2431         superio_select(sioaddr, PME);
2432         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2433                 pr_info("Device not activated, skipping\n");
2434                 goto exit;
2435         }
2436
2437         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2438         if (*address == 0) {
2439                 pr_info("Base address not set, skipping\n");
2440                 goto exit;
2441         }
2442
2443         err = 0;
2444         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2445         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2446                 it87_devices[sio_data->type].suffix,
2447                 *address, sio_data->revision);
2448
2449         config = &it87_devices[sio_data->type];
2450
2451         /* in7 (VSB or VCCH5V) is always internal on some chips */
2452         if (has_in7_internal(config))
2453                 sio_data->internal |= BIT(1);
2454
2455         /* in8 (Vbat) is always internal */
2456         sio_data->internal |= BIT(2);
2457
2458         /* in9 (AVCC3), always internal if supported */
2459         if (has_avcc3(config))
2460                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2461         else
2462                 sio_data->skip_in |= BIT(9);
2463
2464         if (!has_six_pwm(config))
2465                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2466
2467         if (!has_vid(config))
2468                 sio_data->skip_vid = 1;
2469
2470         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2471         if (sio_data->type == it87) {
2472                 /* The IT8705F has a different LD number for GPIO */
2473                 superio_select(sioaddr, 5);
2474                 sio_data->beep_pin = superio_inb(sioaddr,
2475                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2476         } else if (sio_data->type == it8783) {
2477                 int reg25, reg27, reg2a, reg2c, regef;
2478
2479                 superio_select(sioaddr, GPIO);
2480
2481                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2482                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2483                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2484                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2485                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2486
2487                 /* Check if fan3 is there or not */
2488                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2489                         sio_data->skip_fan |= BIT(2);
2490                 if ((reg25 & BIT(4)) ||
2491                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2492                         sio_data->skip_pwm |= BIT(2);
2493
2494                 /* Check if fan2 is there or not */
2495                 if (reg27 & BIT(7))
2496                         sio_data->skip_fan |= BIT(1);
2497                 if (reg27 & BIT(3))
2498                         sio_data->skip_pwm |= BIT(1);
2499
2500                 /* VIN5 */
2501                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2502                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2503
2504                 /* VIN6 */
2505                 if (reg27 & BIT(1))
2506                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2507
2508                 /*
2509                  * VIN7
2510                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2511                  */
2512                 if (reg27 & BIT(2)) {
2513                         /*
2514                          * The data sheet is a bit unclear regarding the
2515                          * internal voltage divider for VCCH5V. It says
2516                          * "This bit enables and switches VIN7 (pin 91) to the
2517                          * internal voltage divider for VCCH5V".
2518                          * This is different to other chips, where the internal
2519                          * voltage divider would connect VIN7 to an internal
2520                          * voltage source. Maybe that is the case here as well.
2521                          *
2522                          * Since we don't know for sure, re-route it if that is
2523                          * not the case, and ask the user to report if the
2524                          * resulting voltage is sane.
2525                          */
2526                         if (!(reg2c & BIT(1))) {
2527                                 reg2c |= BIT(1);
2528                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2529                                              reg2c);
2530                                 pr_notice("Routing internal VCCH5V to in7.\n");
2531                         }
2532                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2533                         pr_notice("Please report if it displays a reasonable voltage.\n");
2534                 }
2535
2536                 if (reg2c & BIT(0))
2537                         sio_data->internal |= BIT(0);
2538                 if (reg2c & BIT(1))
2539                         sio_data->internal |= BIT(1);
2540
2541                 sio_data->beep_pin = superio_inb(sioaddr,
2542                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2543         } else if (sio_data->type == it8603) {
2544                 int reg27, reg29;
2545
2546                 superio_select(sioaddr, GPIO);
2547
2548                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2549
2550                 /* Check if fan3 is there or not */
2551                 if (reg27 & BIT(6))
2552                         sio_data->skip_pwm |= BIT(2);
2553                 if (reg27 & BIT(7))
2554                         sio_data->skip_fan |= BIT(2);
2555
2556                 /* Check if fan2 is there or not */
2557                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2558                 if (reg29 & BIT(1))
2559                         sio_data->skip_pwm |= BIT(1);
2560                 if (reg29 & BIT(2))
2561                         sio_data->skip_fan |= BIT(1);
2562
2563                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2564                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2565
2566                 sio_data->beep_pin = superio_inb(sioaddr,
2567                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2568         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2569                 int reg;
2570
2571                 superio_select(sioaddr, GPIO);
2572
2573                 /* Check for pwm5 */
2574                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2575                 if (reg & BIT(6))
2576                         sio_data->skip_pwm |= BIT(4);
2577
2578                 /* Check for fan4, fan5 */
2579                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2580                 if (!(reg & BIT(5)))
2581                         sio_data->skip_fan |= BIT(3);
2582                 if (!(reg & BIT(4)))
2583                         sio_data->skip_fan |= BIT(4);
2584
2585                 /* Check for pwm3, fan3 */
2586                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2587                 if (reg & BIT(6))
2588                         sio_data->skip_pwm |= BIT(2);
2589                 if (reg & BIT(7))
2590                         sio_data->skip_fan |= BIT(2);
2591
2592                 /* Check for pwm4 */
2593                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2594                 if (!(reg & BIT(2)))
2595                         sio_data->skip_pwm |= BIT(3);
2596
2597                 /* Check for pwm2, fan2 */
2598                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2599                 if (reg & BIT(1))
2600                         sio_data->skip_pwm |= BIT(1);
2601                 if (reg & BIT(2))
2602                         sio_data->skip_fan |= BIT(1);
2603                 /* Check for pwm6, fan6 */
2604                 if (!(reg & BIT(7))) {
2605                         sio_data->skip_pwm |= BIT(5);
2606                         sio_data->skip_fan |= BIT(5);
2607                 }
2608
2609                 sio_data->beep_pin = superio_inb(sioaddr,
2610                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2611         } else {
2612                 int reg;
2613                 bool uart6;
2614
2615                 superio_select(sioaddr, GPIO);
2616
2617                 /* Check for fan4, fan5 */
2618                 if (has_five_fans(config)) {
2619                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2620                         switch (sio_data->type) {
2621                         case it8718:
2622                                 if (reg & BIT(5))
2623                                         sio_data->skip_fan |= BIT(3);
2624                                 if (reg & BIT(4))
2625                                         sio_data->skip_fan |= BIT(4);
2626                                 break;
2627                         case it8720:
2628                         case it8721:
2629                         case it8728:
2630                                 if (!(reg & BIT(5)))
2631                                         sio_data->skip_fan |= BIT(3);
2632                                 if (!(reg & BIT(4)))
2633                                         sio_data->skip_fan |= BIT(4);
2634                                 break;
2635                         default:
2636                                 break;
2637                         }
2638                 }
2639
2640                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2641                 if (!sio_data->skip_vid) {
2642                         /* We need at least 4 VID pins */
2643                         if (reg & 0x0f) {
2644                                 pr_info("VID is disabled (pins used for GPIO)\n");
2645                                 sio_data->skip_vid = 1;
2646                         }
2647                 }
2648
2649                 /* Check if fan3 is there or not */
2650                 if (reg & BIT(6))
2651                         sio_data->skip_pwm |= BIT(2);
2652                 if (reg & BIT(7))
2653                         sio_data->skip_fan |= BIT(2);
2654
2655                 /* Check if fan2 is there or not */
2656                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2657                 if (reg & BIT(1))
2658                         sio_data->skip_pwm |= BIT(1);
2659                 if (reg & BIT(2))
2660                         sio_data->skip_fan |= BIT(1);
2661
2662                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2663                     !(sio_data->skip_vid))
2664                         sio_data->vid_value = superio_inb(sioaddr,
2665                                                           IT87_SIO_VID_REG);
2666
2667                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2668
2669                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2670
2671                 /*
2672                  * The IT8720F has no VIN7 pin, so VCCH should always be
2673                  * routed internally to VIN7 with an internal divider.
2674                  * Curiously, there still is a configuration bit to control
2675                  * this, which means it can be set incorrectly. And even
2676                  * more curiously, many boards out there are improperly
2677                  * configured, even though the IT8720F datasheet claims
2678                  * that the internal routing of VCCH to VIN7 is the default
2679                  * setting. So we force the internal routing in this case.
2680                  *
2681                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2682                  * If UART6 is enabled, re-route VIN7 to the internal divider
2683                  * if that is not already the case.
2684                  */
2685                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2686                         reg |= BIT(1);
2687                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2688                         pr_notice("Routing internal VCCH to in7\n");
2689                 }
2690                 if (reg & BIT(0))
2691                         sio_data->internal |= BIT(0);
2692                 if (reg & BIT(1))
2693                         sio_data->internal |= BIT(1);
2694
2695                 /*
2696                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2697                  * While VIN7 can be routed to the internal voltage divider,
2698                  * VIN5 and VIN6 are not available if UART6 is enabled.
2699                  *
2700                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2701                  * is the temperature source. Since we can not read the
2702                  * temperature source here, skip_temp is preliminary.
2703                  */
2704                 if (uart6) {
2705                         sio_data->skip_in |= BIT(5) | BIT(6);
2706                         sio_data->skip_temp |= BIT(2);
2707                 }
2708
2709                 sio_data->beep_pin = superio_inb(sioaddr,
2710                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2711         }
2712         if (sio_data->beep_pin)
2713                 pr_info("Beeping is supported\n");
2714
2715         /* Disable specific features based on DMI strings */
2716         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2717         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2718         if (board_vendor && board_name) {
2719                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2720                     strcmp(board_name, "FN68PT") == 0) {
2721                         /*
2722                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2723                          * connected to a fan, but to something else. One user
2724                          * has reported instant system power-off when changing
2725                          * the PWM2 duty cycle, so we disable it.
2726                          * I use the board name string as the trigger in case
2727                          * the same board is ever used in other systems.
2728                          */
2729                         pr_info("Disabling pwm2 due to hardware constraints\n");
2730                         sio_data->skip_pwm = BIT(1);
2731                 }
2732         }
2733
2734 exit:
2735         superio_exit(sioaddr);
2736         return err;
2737 }
2738
2739 /* Called when we have found a new IT87. */
2740 static void it87_init_device(struct platform_device *pdev)
2741 {
2742         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2743         struct it87_data *data = platform_get_drvdata(pdev);
2744         int tmp, i;
2745         u8 mask;
2746
2747         /*
2748          * For each PWM channel:
2749          * - If it is in automatic mode, setting to manual mode should set
2750          *   the fan to full speed by default.
2751          * - If it is in manual mode, we need a mapping to temperature
2752          *   channels to use when later setting to automatic mode later.
2753          *   Use a 1:1 mapping by default (we are clueless.)
2754          * In both cases, the value can (and should) be changed by the user
2755          * prior to switching to a different mode.
2756          * Note that this is no longer needed for the IT8721F and later, as
2757          * these have separate registers for the temperature mapping and the
2758          * manual duty cycle.
2759          */
2760         for (i = 0; i < NUM_AUTO_PWM; i++) {
2761                 data->pwm_temp_map[i] = i;
2762                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2763                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2764         }
2765
2766         /*
2767          * Some chips seem to have default value 0xff for all limit
2768          * registers. For low voltage limits it makes no sense and triggers
2769          * alarms, so change to 0 instead. For high temperature limits, it
2770          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2771          * but is still confusing, so change to 127 degrees C.
2772          */
2773         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2774                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2775                 if (tmp == 0xff)
2776                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2777         }
2778         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2779                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2780                 if (tmp == 0xff)
2781                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2782         }
2783
2784         /*
2785          * Temperature channels are not forcibly enabled, as they can be
2786          * set to two different sensor types and we can't guess which one
2787          * is correct for a given system. These channels can be enabled at
2788          * run-time through the temp{1-3}_type sysfs accessors if needed.
2789          */
2790
2791         /* Check if voltage monitors are reset manually or by some reason */
2792         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2793         if ((tmp & 0xff) == 0) {
2794                 /* Enable all voltage monitors */
2795                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2796         }
2797
2798         /* Check if tachometers are reset manually or by some reason */
2799         mask = 0x70 & ~(sio_data->skip_fan << 4);
2800         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2801         if ((data->fan_main_ctrl & mask) == 0) {
2802                 /* Enable all fan tachometers */
2803                 data->fan_main_ctrl |= mask;
2804                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2805                                  data->fan_main_ctrl);
2806         }
2807         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2808
2809         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2810
2811         /* Set tachometers to 16-bit mode if needed */
2812         if (has_fan16_config(data)) {
2813                 if (~tmp & 0x07 & data->has_fan) {
2814                         dev_dbg(&pdev->dev,
2815                                 "Setting fan1-3 to 16-bit mode\n");
2816                         it87_write_value(data, IT87_REG_FAN_16BIT,
2817                                          tmp | 0x07);
2818                 }
2819         }
2820
2821         /* Check for additional fans */
2822         if (has_five_fans(data)) {
2823                 if (tmp & BIT(4))
2824                         data->has_fan |= BIT(3); /* fan4 enabled */
2825                 if (tmp & BIT(5))
2826                         data->has_fan |= BIT(4); /* fan5 enabled */
2827                 if (has_six_fans(data) && (tmp & BIT(2)))
2828                         data->has_fan |= BIT(5); /* fan6 enabled */
2829         }
2830
2831         /* Fan input pins may be used for alternative functions */
2832         data->has_fan &= ~sio_data->skip_fan;
2833
2834         /* Check if pwm5, pwm6 are enabled */
2835         if (has_six_pwm(data)) {
2836                 /* The following code may be IT8620E specific */
2837                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2838                 if ((tmp & 0xc0) == 0xc0)
2839                         sio_data->skip_pwm |= BIT(4);
2840                 if (!(tmp & BIT(3)))
2841                         sio_data->skip_pwm |= BIT(5);
2842         }
2843
2844         /* Start monitoring */
2845         it87_write_value(data, IT87_REG_CONFIG,
2846                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2847                          | (update_vbat ? 0x41 : 0x01));
2848 }
2849
2850 /* Return 1 if and only if the PWM interface is safe to use */
2851 static int it87_check_pwm(struct device *dev)
2852 {
2853         struct it87_data *data = dev_get_drvdata(dev);
2854         /*
2855          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2856          * and polarity set to active low is sign that this is the case so we
2857          * disable pwm control to protect the user.
2858          */
2859         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2860
2861         if ((tmp & 0x87) == 0) {
2862                 if (fix_pwm_polarity) {
2863                         /*
2864                          * The user asks us to attempt a chip reconfiguration.
2865                          * This means switching to active high polarity and
2866                          * inverting all fan speed values.
2867                          */
2868                         int i;
2869                         u8 pwm[3];
2870
2871                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
2872                                 pwm[i] = it87_read_value(data,
2873                                                          IT87_REG_PWM[i]);
2874
2875                         /*
2876                          * If any fan is in automatic pwm mode, the polarity
2877                          * might be correct, as suspicious as it seems, so we
2878                          * better don't change anything (but still disable the
2879                          * PWM interface).
2880                          */
2881                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2882                                 dev_info(dev,
2883                                          "Reconfiguring PWM to active high polarity\n");
2884                                 it87_write_value(data, IT87_REG_FAN_CTL,
2885                                                  tmp | 0x87);
2886                                 for (i = 0; i < 3; i++)
2887                                         it87_write_value(data,
2888                                                          IT87_REG_PWM[i],
2889                                                          0x7f & ~pwm[i]);
2890                                 return 1;
2891                         }
2892
2893                         dev_info(dev,
2894                                  "PWM configuration is too broken to be fixed\n");
2895                 }
2896
2897                 dev_info(dev,
2898                          "Detected broken BIOS defaults, disabling PWM interface\n");
2899                 return 0;
2900         } else if (fix_pwm_polarity) {
2901                 dev_info(dev,
2902                          "PWM configuration looks sane, won't touch\n");
2903         }
2904
2905         return 1;
2906 }
2907
2908 static int it87_probe(struct platform_device *pdev)
2909 {
2910         struct it87_data *data;
2911         struct resource *res;
2912         struct device *dev = &pdev->dev;
2913         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2914         int enable_pwm_interface;
2915         struct device *hwmon_dev;
2916
2917         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2918         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2919                                  DRVNAME)) {
2920                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2921                         (unsigned long)res->start,
2922                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2923                 return -EBUSY;
2924         }
2925
2926         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2927         if (!data)
2928                 return -ENOMEM;
2929
2930         data->addr = res->start;
2931         data->type = sio_data->type;
2932         data->features = it87_devices[sio_data->type].features;
2933         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2934         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2935         /*
2936          * IT8705F Datasheet 0.4.1, 3h == Version G.
2937          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2938          * These are the first revisions with 16-bit tachometer support.
2939          */
2940         switch (data->type) {
2941         case it87:
2942                 if (sio_data->revision >= 0x03) {
2943                         data->features &= ~FEAT_OLD_AUTOPWM;
2944                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2945                 }
2946                 break;
2947         case it8712:
2948                 if (sio_data->revision >= 0x08) {
2949                         data->features &= ~FEAT_OLD_AUTOPWM;
2950                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2951                                           FEAT_FIVE_FANS;
2952                 }
2953                 break;
2954         default:
2955                 break;
2956         }
2957
2958         /* Now, we do the remaining detection. */
2959         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
2960             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2961                 return -ENODEV;
2962
2963         platform_set_drvdata(pdev, data);
2964
2965         mutex_init(&data->update_lock);
2966
2967         /* Check PWM configuration */
2968         enable_pwm_interface = it87_check_pwm(dev);
2969
2970         /* Starting with IT8721F, we handle scaling of internal voltages */
2971         if (has_12mv_adc(data)) {
2972                 if (sio_data->internal & BIT(0))
2973                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
2974                 if (sio_data->internal & BIT(1))
2975                         data->in_scaled |= BIT(7);      /* in7 is VSB */
2976                 if (sio_data->internal & BIT(2))
2977                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
2978                 if (sio_data->internal & BIT(3))
2979                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
2980         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2981                    sio_data->type == it8783) {
2982                 if (sio_data->internal & BIT(0))
2983                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
2984                 if (sio_data->internal & BIT(1))
2985                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
2986         }
2987
2988         data->has_temp = 0x07;
2989         if (sio_data->skip_temp & BIT(2)) {
2990                 if (sio_data->type == it8782 &&
2991                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2992                         data->has_temp &= ~BIT(2);
2993         }
2994
2995         data->in_internal = sio_data->internal;
2996         data->has_in = 0x3ff & ~sio_data->skip_in;
2997
2998         if (has_six_temp(data)) {
2999                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3000
3001                 /* Check for additional temperature sensors */
3002                 if ((reg & 0x03) >= 0x02)
3003                         data->has_temp |= BIT(3);
3004                 if (((reg >> 2) & 0x03) >= 0x02)
3005                         data->has_temp |= BIT(4);
3006                 if (((reg >> 4) & 0x03) >= 0x02)
3007                         data->has_temp |= BIT(5);
3008
3009                 /* Check for additional voltage sensors */
3010                 if ((reg & 0x03) == 0x01)
3011                         data->has_in |= BIT(10);
3012                 if (((reg >> 2) & 0x03) == 0x01)
3013                         data->has_in |= BIT(11);
3014                 if (((reg >> 4) & 0x03) == 0x01)
3015                         data->has_in |= BIT(12);
3016         }
3017
3018         data->has_beep = !!sio_data->beep_pin;
3019
3020         /* Initialize the IT87 chip */
3021         it87_init_device(pdev);
3022
3023         if (!sio_data->skip_vid) {
3024                 data->has_vid = true;
3025                 data->vrm = vid_which_vrm();
3026                 /* VID reading from Super-I/O config space if available */
3027                 data->vid = sio_data->vid_value;
3028         }
3029
3030         /* Prepare for sysfs hooks */
3031         data->groups[0] = &it87_group;
3032         data->groups[1] = &it87_group_in;
3033         data->groups[2] = &it87_group_temp;
3034         data->groups[3] = &it87_group_fan;
3035
3036         if (enable_pwm_interface) {
3037                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3038                 data->has_pwm &= ~sio_data->skip_pwm;
3039
3040                 data->groups[4] = &it87_group_pwm;
3041                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3042                         data->groups[5] = &it87_group_auto_pwm;
3043         }
3044
3045         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3046                                         it87_devices[sio_data->type].name,
3047                                         data, data->groups);
3048         return PTR_ERR_OR_ZERO(hwmon_dev);
3049 }
3050
3051 static struct platform_driver it87_driver = {
3052         .driver = {
3053                 .name   = DRVNAME,
3054         },
3055         .probe  = it87_probe,
3056 };
3057
3058 static int __init it87_device_add(int index, unsigned short address,
3059                                   const struct it87_sio_data *sio_data)
3060 {
3061         struct platform_device *pdev;
3062         struct resource res = {
3063                 .start  = address + IT87_EC_OFFSET,
3064                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3065                 .name   = DRVNAME,
3066                 .flags  = IORESOURCE_IO,
3067         };
3068         int err;
3069
3070         err = acpi_check_resource_conflict(&res);
3071         if (err)
3072                 return err;
3073
3074         pdev = platform_device_alloc(DRVNAME, address);
3075         if (!pdev)
3076                 return -ENOMEM;
3077
3078         err = platform_device_add_resources(pdev, &res, 1);
3079         if (err) {
3080                 pr_err("Device resource addition failed (%d)\n", err);
3081                 goto exit_device_put;
3082         }
3083
3084         err = platform_device_add_data(pdev, sio_data,
3085                                        sizeof(struct it87_sio_data));
3086         if (err) {
3087                 pr_err("Platform data allocation failed\n");
3088                 goto exit_device_put;
3089         }
3090
3091         err = platform_device_add(pdev);
3092         if (err) {
3093                 pr_err("Device addition failed (%d)\n", err);
3094                 goto exit_device_put;
3095         }
3096
3097         it87_pdev[index] = pdev;
3098         return 0;
3099
3100 exit_device_put:
3101         platform_device_put(pdev);
3102         return err;
3103 }
3104
3105 static int __init sm_it87_init(void)
3106 {
3107         int sioaddr[2] = { REG_2E, REG_4E };
3108         struct it87_sio_data sio_data;
3109         unsigned short isa_address;
3110         bool found = false;
3111         int i, err;
3112
3113         err = platform_driver_register(&it87_driver);
3114         if (err)
3115                 return err;
3116
3117         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3118                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3119                 isa_address = 0;
3120                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3121                 if (err || isa_address == 0)
3122                         continue;
3123
3124                 err = it87_device_add(i, isa_address, &sio_data);
3125                 if (err)
3126                         goto exit_dev_unregister;
3127                 found = true;
3128         }
3129
3130         if (!found) {
3131                 err = -ENODEV;
3132                 goto exit_unregister;
3133         }
3134         return 0;
3135
3136 exit_dev_unregister:
3137         /* NULL check handled by platform_device_unregister */
3138         platform_device_unregister(it87_pdev[0]);
3139 exit_unregister:
3140         platform_driver_unregister(&it87_driver);
3141         return err;
3142 }
3143
3144 static void __exit sm_it87_exit(void)
3145 {
3146         /* NULL check handled by platform_device_unregister */
3147         platform_device_unregister(it87_pdev[1]);
3148         platform_device_unregister(it87_pdev[0]);
3149         platform_driver_unregister(&it87_driver);
3150 }
3151
3152 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3153 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3154 module_param(update_vbat, bool, 0);
3155 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3156 module_param(fix_pwm_polarity, bool, 0);
3157 MODULE_PARM_DESC(fix_pwm_polarity,
3158                  "Force PWM polarity to active high (DANGEROUS)");
3159 MODULE_LICENSE("GPL");
3160
3161 module_init(sm_it87_init);
3162 module_exit(sm_it87_exit);