drivers/hwspinlock/stm32_hwspinlock.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) STMicroelectronics SA 2018
   4  * Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics.
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/hwspinlock.h>
   9 #include <linux/io.h>
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/of.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/pm_runtime.h>
  15
  16 #include "hwspinlock_internal.h"
  17
  18 #define STM32_MUTEX_COREID      BIT(8)
  19 #define STM32_MUTEX_LOCK_BIT    BIT(31)
  20 #define STM32_MUTEX_NUM_LOCKS   32
  21
  22 struct stm32_hwspinlock {
  23         struct clk *clk;
  24         struct hwspinlock_device bank;
  25 };
  26
  27 static int stm32_hwspinlock_trylock(struct hwspinlock *lock)
  28 {
  29         void __iomem *lock_addr = lock->priv;
  30         u32 status;
  31
  32         writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr);
  33         status = readl(lock_addr);
  34
  35         return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID);
  36 }
  37
  38 static void stm32_hwspinlock_unlock(struct hwspinlock *lock)
  39 {
  40         void __iomem *lock_addr = lock->priv;
  41
  42         writel(STM32_MUTEX_COREID, lock_addr);
  43 }
  44
  45 static const struct hwspinlock_ops stm32_hwspinlock_ops = {
  46         .trylock        = stm32_hwspinlock_trylock,
  47         .unlock         = stm32_hwspinlock_unlock,
  48 };
  49
  50 static int stm32_hwspinlock_probe(struct platform_device *pdev)
  51 {
  52         struct stm32_hwspinlock *hw;
  53         void __iomem *io_base;
  54         struct resource *res;
  55         size_t array_size;
  56         int i, ret;
  57
  58         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  59         io_base = devm_ioremap_resource(&pdev->dev, res);
  60         if (IS_ERR(io_base))
  61                 return PTR_ERR(io_base);
  62
  63         array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
  64         hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL);
  65         if (!hw)
  66                 return -ENOMEM;
  67
  68         hw->clk = devm_clk_get(&pdev->dev, "hsem");
  69         if (IS_ERR(hw->clk))
  70                 return PTR_ERR(hw->clk);
  71
  72         for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
  73                 hw->bank.lock[i].priv = io_base + i * sizeof(u32);
  74
  75         platform_set_drvdata(pdev, hw);
  76         pm_runtime_enable(&pdev->dev);
  77
  78         ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops,
  79                                    0, STM32_MUTEX_NUM_LOCKS);
  80
  81         if (ret)
  82                 pm_runtime_disable(&pdev->dev);
  83
  84         return ret;
  85 }
  86
  87 static int stm32_hwspinlock_remove(struct platform_device *pdev)
  88 {
  89         struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
  90         int ret;
  91
  92         ret = hwspin_lock_unregister(&hw->bank);
  93         if (ret)
  94                 dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
  95
  96         pm_runtime_disable(&pdev->dev);
  97
  98         return 0;
  99 }
 100
 101 static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev)
 102 {
 103         struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
 104
 105         clk_disable_unprepare(hw->clk);
 106
 107         return 0;
 108 }
 109
 110 static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev)
 111 {
 112         struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
 113
 114         clk_prepare_enable(hw->clk);
 115
 116         return 0;
 117 }
 118
 119 static const struct dev_pm_ops stm32_hwspinlock_pm_ops = {
 120         SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend,
 121                            stm32_hwspinlock_runtime_resume,
 122                            NULL)
 123 };
 124
 125 static const struct of_device_id stm32_hwpinlock_ids[] = {
 126         { .compatible = "st,stm32-hwspinlock", },
 127         {},
 128 };
 129 MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids);
 130
 131 static struct platform_driver stm32_hwspinlock_driver = {
 132         .probe          = stm32_hwspinlock_probe,
 133         .remove         = stm32_hwspinlock_remove,
 134         .driver         = {
 135                 .name   = "stm32_hwspinlock",
 136                 .of_match_table = stm32_hwpinlock_ids,
 137                 .pm     = &stm32_hwspinlock_pm_ops,
 138         },
 139 };
 140
 141 static int __init stm32_hwspinlock_init(void)
 142 {
 143         return platform_driver_register(&stm32_hwspinlock_driver);
 144 }
 145 /* board init code might need to reserve hwspinlocks for predefined purposes */
 146 postcore_initcall(stm32_hwspinlock_init);
 147
 148 static void __exit stm32_hwspinlock_exit(void)
 149 {
 150         platform_driver_unregister(&stm32_hwspinlock_driver);
 151 }
 152 module_exit(stm32_hwspinlock_exit);
 153
 154 MODULE_LICENSE("GPL v2");
 155 MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs");
 156 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");