drivers/hwtracing/coresight/coresight-etm-perf.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright(C) 2015 Linaro Limited. All rights reserved.
   4  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
   5  */
   6
   7 #include <linux/coresight.h>
   8 #include <linux/coresight-pmu.h>
   9 #include <linux/cpumask.h>
  10 #include <linux/device.h>
  11 #include <linux/list.h>
  12 #include <linux/mm.h>
  13 #include <linux/init.h>
  14 #include <linux/perf_event.h>
  15 #include <linux/percpu-defs.h>
  16 #include <linux/slab.h>
  17 #include <linux/stringhash.h>
  18 #include <linux/types.h>
  19 #include <linux/workqueue.h>
  20
  21 #include "coresight-etm-perf.h"
  22 #include "coresight-priv.h"
  23
  24 static struct pmu etm_pmu;
  25 static bool etm_perf_up;
  26
  27 static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
  28 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
  29
  30 /* ETMv3.5/PTM's ETMCR is 'config' */
  31 PMU_FORMAT_ATTR(cycacc,         "config:" __stringify(ETM_OPT_CYCACC));
  32 PMU_FORMAT_ATTR(timestamp,      "config:" __stringify(ETM_OPT_TS));
  33 PMU_FORMAT_ATTR(retstack,       "config:" __stringify(ETM_OPT_RETSTK));
  34 /* Sink ID - same for all ETMs */
  35 PMU_FORMAT_ATTR(sinkid,         "config2:0-31");
  36
  37 static struct attribute *etm_config_formats_attr[] = {
  38         &format_attr_cycacc.attr,
  39         &format_attr_timestamp.attr,
  40         &format_attr_retstack.attr,
  41         &format_attr_sinkid.attr,
  42         NULL,
  43 };
  44
  45 static const struct attribute_group etm_pmu_format_group = {
  46         .name   = "format",
  47         .attrs  = etm_config_formats_attr,
  48 };
  49
  50 static struct attribute *etm_config_sinks_attr[] = {
  51         NULL,
  52 };
  53
  54 static const struct attribute_group etm_pmu_sinks_group = {
  55         .name   = "sinks",
  56         .attrs  = etm_config_sinks_attr,
  57 };
  58
  59 static const struct attribute_group *etm_pmu_attr_groups[] = {
  60         &etm_pmu_format_group,
  61         &etm_pmu_sinks_group,
  62         NULL,
  63 };
  64
  65 static inline struct list_head **
  66 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
  67 {
  68         return per_cpu_ptr(data->path, cpu);
  69 }
  70
  71 static inline struct list_head *
  72 etm_event_cpu_path(struct etm_event_data *data, int cpu)
  73 {
  74         return *etm_event_cpu_path_ptr(data, cpu);
  75 }
  76
  77 static void etm_event_read(struct perf_event *event) {}
  78
  79 static int etm_addr_filters_alloc(struct perf_event *event)
  80 {
  81         struct etm_filters *filters;
  82         int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
  83
  84         filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
  85         if (!filters)
  86                 return -ENOMEM;
  87
  88         if (event->parent)
  89                 memcpy(filters, event->parent->hw.addr_filters,
  90                        sizeof(*filters));
  91
  92         event->hw.addr_filters = filters;
  93
  94         return 0;
  95 }
  96
  97 static void etm_event_destroy(struct perf_event *event)
  98 {
  99         kfree(event->hw.addr_filters);
 100         event->hw.addr_filters = NULL;
 101 }
 102
 103 static int etm_event_init(struct perf_event *event)
 104 {
 105         int ret = 0;
 106
 107         if (event->attr.type != etm_pmu.type) {
 108                 ret = -ENOENT;
 109                 goto out;
 110         }
 111
 112         ret = etm_addr_filters_alloc(event);
 113         if (ret)
 114                 goto out;
 115
 116         event->destroy = etm_event_destroy;
 117 out:
 118         return ret;
 119 }
 120
 121 static void free_event_data(struct work_struct *work)
 122 {
 123         int cpu;
 124         cpumask_t *mask;
 125         struct etm_event_data *event_data;
 126         struct coresight_device *sink;
 127
 128         event_data = container_of(work, struct etm_event_data, work);
 129         mask = &event_data->mask;
 130
 131         /* Free the sink buffers, if there are any */
 132         if (event_data->snk_config && !WARN_ON(cpumask_empty(mask))) {
 133                 cpu = cpumask_first(mask);
 134                 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
 135                 if (sink_ops(sink)->free_buffer)
 136                         sink_ops(sink)->free_buffer(event_data->snk_config);
 137         }
 138
 139         for_each_cpu(cpu, mask) {
 140                 struct list_head **ppath;
 141
 142                 ppath = etm_event_cpu_path_ptr(event_data, cpu);
 143                 if (!(IS_ERR_OR_NULL(*ppath)))
 144                         coresight_release_path(*ppath);
 145                 *ppath = NULL;
 146         }
 147
 148         free_percpu(event_data->path);
 149         kfree(event_data);
 150 }
 151
 152 static void *alloc_event_data(int cpu)
 153 {
 154         cpumask_t *mask;
 155         struct etm_event_data *event_data;
 156
 157         /* First get memory for the session's data */
 158         event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
 159         if (!event_data)
 160                 return NULL;
 161
 162
 163         mask = &event_data->mask;
 164         if (cpu != -1)
 165                 cpumask_set_cpu(cpu, mask);
 166         else
 167                 cpumask_copy(mask, cpu_present_mask);
 168
 169         /*
 170          * Each CPU has a single path between source and destination.  As such
 171          * allocate an array using CPU numbers as indexes.  That way a path
 172          * for any CPU can easily be accessed at any given time.  We proceed
 173          * the same way for sessions involving a single CPU.  The cost of
 174          * unused memory when dealing with single CPU trace scenarios is small
 175          * compared to the cost of searching through an optimized array.
 176          */
 177         event_data->path = alloc_percpu(struct list_head *);
 178
 179         if (!event_data->path) {
 180                 kfree(event_data);
 181                 return NULL;
 182         }
 183
 184         return event_data;
 185 }
 186
 187 static void etm_free_aux(void *data)
 188 {
 189         struct etm_event_data *event_data = data;
 190
 191         schedule_work(&event_data->work);
 192 }
 193
 194 static void *etm_setup_aux(struct perf_event *event, void **pages,
 195                            int nr_pages, bool overwrite)
 196 {
 197         u32 id;
 198         int cpu = event->cpu;
 199         cpumask_t *mask;
 200         struct coresight_device *sink;
 201         struct etm_event_data *event_data = NULL;
 202
 203         event_data = alloc_event_data(cpu);
 204         if (!event_data)
 205                 return NULL;
 206         INIT_WORK(&event_data->work, free_event_data);
 207
 208         /* First get the selected sink from user space. */
 209         if (event->attr.config2) {
 210                 id = (u32)event->attr.config2;
 211                 sink = coresight_get_sink_by_id(id);
 212         } else {
 213                 sink = coresight_get_enabled_sink(true);
 214         }
 215
 216         if (!sink || !sink_ops(sink)->alloc_buffer)
 217                 goto err;
 218
 219         mask = &event_data->mask;
 220
 221         /*
 222          * Setup the path for each CPU in a trace session. We try to build
 223          * trace path for each CPU in the mask. If we don't find an ETM
 224          * for the CPU or fail to build a path, we clear the CPU from the
 225          * mask and continue with the rest. If ever we try to trace on those
 226          * CPUs, we can handle it and fail the session.
 227          */
 228         for_each_cpu(cpu, mask) {
 229                 struct list_head *path;
 230                 struct coresight_device *csdev;
 231
 232                 csdev = per_cpu(csdev_src, cpu);
 233                 /*
 234                  * If there is no ETM associated with this CPU clear it from
 235                  * the mask and continue with the rest. If ever we try to trace
 236                  * on this CPU, we handle it accordingly.
 237                  */
 238                 if (!csdev) {
 239                         cpumask_clear_cpu(cpu, mask);
 240                         continue;
 241                 }
 242
 243                 /*
 244                  * Building a path doesn't enable it, it simply builds a
 245                  * list of devices from source to sink that can be
 246                  * referenced later when the path is actually needed.
 247                  */
 248                 path = coresight_build_path(csdev, sink);
 249                 if (IS_ERR(path)) {
 250                         cpumask_clear_cpu(cpu, mask);
 251                         continue;
 252                 }
 253
 254                 *etm_event_cpu_path_ptr(event_data, cpu) = path;
 255         }
 256
 257         /* If we don't have any CPUs ready for tracing, abort */
 258         cpu = cpumask_first(mask);
 259         if (cpu >= nr_cpu_ids)
 260                 goto err;
 261
 262         /* Allocate the sink buffer for this session */
 263         event_data->snk_config =
 264                         sink_ops(sink)->alloc_buffer(sink, cpu, pages,
 265                                                      nr_pages, overwrite);
 266         if (!event_data->snk_config)
 267                 goto err;
 268
 269 out:
 270         return event_data;
 271
 272 err:
 273         etm_free_aux(event_data);
 274         event_data = NULL;
 275         goto out;
 276 }
 277
 278 static void etm_event_start(struct perf_event *event, int flags)
 279 {
 280         int cpu = smp_processor_id();
 281         struct etm_event_data *event_data;
 282         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 283         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 284         struct list_head *path;
 285
 286         if (!csdev)
 287                 goto fail;
 288
 289         /*
 290          * Deal with the ring buffer API and get a handle on the
 291          * session's information.
 292          */
 293         event_data = perf_aux_output_begin(handle, event);
 294         if (!event_data)
 295                 goto fail;
 296
 297         path = etm_event_cpu_path(event_data, cpu);
 298         /* We need a sink, no need to continue without one */
 299         sink = coresight_get_sink(path);
 300         if (WARN_ON_ONCE(!sink))
 301                 goto fail_end_stop;
 302
 303         /* Nothing will happen without a path */
 304         if (coresight_enable_path(path, CS_MODE_PERF, handle))
 305                 goto fail_end_stop;
 306
 307         /* Tell the perf core the event is alive */
 308         event->hw.state = 0;
 309
 310         /* Finally enable the tracer */
 311         if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
 312                 goto fail_disable_path;
 313
 314 out:
 315         return;
 316
 317 fail_disable_path:
 318         coresight_disable_path(path);
 319 fail_end_stop:
 320         perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
 321         perf_aux_output_end(handle, 0);
 322 fail:
 323         event->hw.state = PERF_HES_STOPPED;
 324         goto out;
 325 }
 326
 327 static void etm_event_stop(struct perf_event *event, int mode)
 328 {
 329         int cpu = smp_processor_id();
 330         unsigned long size;
 331         struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
 332         struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
 333         struct etm_event_data *event_data = perf_get_aux(handle);
 334         struct list_head *path;
 335
 336         if (event->hw.state == PERF_HES_STOPPED)
 337                 return;
 338
 339         if (!csdev)
 340                 return;
 341
 342         path = etm_event_cpu_path(event_data, cpu);
 343         if (!path)
 344                 return;
 345
 346         sink = coresight_get_sink(path);
 347         if (!sink)
 348                 return;
 349
 350         /* stop tracer */
 351         source_ops(csdev)->disable(csdev, event);
 352
 353         /* tell the core */
 354         event->hw.state = PERF_HES_STOPPED;
 355
 356         if (mode & PERF_EF_UPDATE) {
 357                 if (WARN_ON_ONCE(handle->event != event))
 358                         return;
 359
 360                 /* update trace information */
 361                 if (!sink_ops(sink)->update_buffer)
 362                         return;
 363
 364                 size = sink_ops(sink)->update_buffer(sink, handle,
 365                                               event_data->snk_config);
 366                 perf_aux_output_end(handle, size);
 367         }
 368
 369         /* Disabling the path make its elements available to other sessions */
 370         coresight_disable_path(path);
 371 }
 372
 373 static int etm_event_add(struct perf_event *event, int mode)
 374 {
 375         int ret = 0;
 376         struct hw_perf_event *hwc = &event->hw;
 377
 378         if (mode & PERF_EF_START) {
 379                 etm_event_start(event, 0);
 380                 if (hwc->state & PERF_HES_STOPPED)
 381                         ret = -EINVAL;
 382         } else {
 383                 hwc->state = PERF_HES_STOPPED;
 384         }
 385
 386         return ret;
 387 }
 388
 389 static void etm_event_del(struct perf_event *event, int mode)
 390 {
 391         etm_event_stop(event, PERF_EF_UPDATE);
 392 }
 393
 394 static int etm_addr_filters_validate(struct list_head *filters)
 395 {
 396         bool range = false, address = false;
 397         int index = 0;
 398         struct perf_addr_filter *filter;
 399
 400         list_for_each_entry(filter, filters, entry) {
 401                 /*
 402                  * No need to go further if there's no more
 403                  * room for filters.
 404                  */
 405                 if (++index > ETM_ADDR_CMP_MAX)
 406                         return -EOPNOTSUPP;
 407
 408                 /* filter::size==0 means single address trigger */
 409                 if (filter->size) {
 410                         /*
 411                          * The existing code relies on START/STOP filters
 412                          * being address filters.
 413                          */
 414                         if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
 415                             filter->action == PERF_ADDR_FILTER_ACTION_STOP)
 416                                 return -EOPNOTSUPP;
 417
 418                         range = true;
 419                 } else
 420                         address = true;
 421
 422                 /*
 423                  * At this time we don't allow range and start/stop filtering
 424                  * to cohabitate, they have to be mutually exclusive.
 425                  */
 426                 if (range && address)
 427                         return -EOPNOTSUPP;
 428         }
 429
 430         return 0;
 431 }
 432
 433 static void etm_addr_filters_sync(struct perf_event *event)
 434 {
 435         struct perf_addr_filters_head *head = perf_event_addr_filters(event);
 436         unsigned long start, stop;
 437         struct perf_addr_filter_range *fr = event->addr_filter_ranges;
 438         struct etm_filters *filters = event->hw.addr_filters;
 439         struct etm_filter *etm_filter;
 440         struct perf_addr_filter *filter;
 441         int i = 0;
 442
 443         list_for_each_entry(filter, &head->list, entry) {
 444                 start = fr[i].start;
 445                 stop = start + fr[i].size;
 446                 etm_filter = &filters->etm_filter[i];
 447
 448                 switch (filter->action) {
 449                 case PERF_ADDR_FILTER_ACTION_FILTER:
 450                         etm_filter->start_addr = start;
 451                         etm_filter->stop_addr = stop;
 452                         etm_filter->type = ETM_ADDR_TYPE_RANGE;
 453                         break;
 454                 case PERF_ADDR_FILTER_ACTION_START:
 455                         etm_filter->start_addr = start;
 456                         etm_filter->type = ETM_ADDR_TYPE_START;
 457                         break;
 458                 case PERF_ADDR_FILTER_ACTION_STOP:
 459                         etm_filter->stop_addr = stop;
 460                         etm_filter->type = ETM_ADDR_TYPE_STOP;
 461                         break;
 462                 }
 463                 i++;
 464         }
 465
 466         filters->nr_filters = i;
 467 }
 468
 469 int etm_perf_symlink(struct coresight_device *csdev, bool link)
 470 {
 471         char entry[sizeof("cpu9999999")];
 472         int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
 473         struct device *pmu_dev = etm_pmu.dev;
 474         struct device *cs_dev = &csdev->dev;
 475
 476         sprintf(entry, "cpu%d", cpu);
 477
 478         if (!etm_perf_up)
 479                 return -EPROBE_DEFER;
 480
 481         if (link) {
 482                 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
 483                 if (ret)
 484                         return ret;
 485                 per_cpu(csdev_src, cpu) = csdev;
 486         } else {
 487                 sysfs_remove_link(&pmu_dev->kobj, entry);
 488                 per_cpu(csdev_src, cpu) = NULL;
 489         }
 490
 491         return 0;
 492 }
 493
 494 static ssize_t etm_perf_sink_name_show(struct device *dev,
 495                                        struct device_attribute *dattr,
 496                                        char *buf)
 497 {
 498         struct dev_ext_attribute *ea;
 499
 500         ea = container_of(dattr, struct dev_ext_attribute, attr);
 501         return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
 502 }
 503
 504 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
 505 {
 506         int ret;
 507         unsigned long hash;
 508         const char *name;
 509         struct device *pmu_dev = etm_pmu.dev;
 510         struct device *pdev = csdev->dev.parent;
 511         struct dev_ext_attribute *ea;
 512
 513         if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
 514             csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
 515                 return -EINVAL;
 516
 517         if (csdev->ea != NULL)
 518                 return -EINVAL;
 519
 520         if (!etm_perf_up)
 521                 return -EPROBE_DEFER;
 522
 523         ea = devm_kzalloc(pdev, sizeof(*ea), GFP_KERNEL);
 524         if (!ea)
 525                 return -ENOMEM;
 526
 527         name = dev_name(pdev);
 528         /* See function coresight_get_sink_by_id() to know where this is used */
 529         hash = hashlen_hash(hashlen_string(NULL, name));
 530
 531         ea->attr.attr.name = devm_kstrdup(pdev, name, GFP_KERNEL);
 532         if (!ea->attr.attr.name)
 533                 return -ENOMEM;
 534
 535         ea->attr.attr.mode = 0444;
 536         ea->attr.show = etm_perf_sink_name_show;
 537         ea->var = (unsigned long *)hash;
 538
 539         ret = sysfs_add_file_to_group(&pmu_dev->kobj,
 540                                       &ea->attr.attr, "sinks");
 541
 542         if (!ret)
 543                 csdev->ea = ea;
 544
 545         return ret;
 546 }
 547
 548 void etm_perf_del_symlink_sink(struct coresight_device *csdev)
 549 {
 550         struct device *pmu_dev = etm_pmu.dev;
 551         struct dev_ext_attribute *ea = csdev->ea;
 552
 553         if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
 554             csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
 555                 return;
 556
 557         if (!ea)
 558                 return;
 559
 560         sysfs_remove_file_from_group(&pmu_dev->kobj,
 561                                      &ea->attr.attr, "sinks");
 562         csdev->ea = NULL;
 563 }
 564
 565 static int __init etm_perf_init(void)
 566 {
 567         int ret;
 568
 569         etm_pmu.capabilities            = PERF_PMU_CAP_EXCLUSIVE;
 570
 571         etm_pmu.attr_groups             = etm_pmu_attr_groups;
 572         etm_pmu.task_ctx_nr             = perf_sw_context;
 573         etm_pmu.read                    = etm_event_read;
 574         etm_pmu.event_init              = etm_event_init;
 575         etm_pmu.setup_aux               = etm_setup_aux;
 576         etm_pmu.free_aux                = etm_free_aux;
 577         etm_pmu.start                   = etm_event_start;
 578         etm_pmu.stop                    = etm_event_stop;
 579         etm_pmu.add                     = etm_event_add;
 580         etm_pmu.del                     = etm_event_del;
 581         etm_pmu.addr_filters_sync       = etm_addr_filters_sync;
 582         etm_pmu.addr_filters_validate   = etm_addr_filters_validate;
 583         etm_pmu.nr_addr_filters         = ETM_ADDR_CMP_MAX;
 584
 585         ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
 586         if (ret == 0)
 587                 etm_perf_up = true;
 588
 589         return ret;
 590 }
 591 device_initcall(etm_perf_init);