drivers/i2c/busses/i2c-imx-lpi2c.c

   1 /*
   2  * This is i.MX low power i2c controller driver.
   3  *
   4  * Copyright 2016 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17
  18 #include <linux/clk.h>
  19 #include <linux/completion.h>
  20 #include <linux/delay.h>
  21 #include <linux/err.h>
  22 #include <linux/errno.h>
  23 #include <linux/i2c.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/of.h>
  30 #include <linux/of_device.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34
  35 #define DRIVER_NAME "imx-lpi2c"
  36
  37 #define LPI2C_PARAM     0x04    /* i2c RX/TX FIFO size */
  38 #define LPI2C_MCR       0x10    /* i2c contrl register */
  39 #define LPI2C_MSR       0x14    /* i2c status register */
  40 #define LPI2C_MIER      0x18    /* i2c interrupt enable */
  41 #define LPI2C_MCFGR0    0x20    /* i2c master configuration */
  42 #define LPI2C_MCFGR1    0x24    /* i2c master configuration */
  43 #define LPI2C_MCFGR2    0x28    /* i2c master configuration */
  44 #define LPI2C_MCFGR3    0x2C    /* i2c master configuration */
  45 #define LPI2C_MCCR0     0x48    /* i2c master clk configuration */
  46 #define LPI2C_MCCR1     0x50    /* i2c master clk configuration */
  47 #define LPI2C_MFCR      0x58    /* i2c master FIFO control */
  48 #define LPI2C_MFSR      0x5C    /* i2c master FIFO status */
  49 #define LPI2C_MTDR      0x60    /* i2c master TX data register */
  50 #define LPI2C_MRDR      0x70    /* i2c master RX data register */
  51
  52 /* i2c command */
  53 #define TRAN_DATA       0X00
  54 #define RECV_DATA       0X01
  55 #define GEN_STOP        0X02
  56 #define RECV_DISCARD    0X03
  57 #define GEN_START       0X04
  58 #define START_NACK      0X05
  59 #define START_HIGH      0X06
  60 #define START_HIGH_NACK 0X07
  61
  62 #define MCR_MEN         BIT(0)
  63 #define MCR_RST         BIT(1)
  64 #define MCR_DOZEN       BIT(2)
  65 #define MCR_DBGEN       BIT(3)
  66 #define MCR_RTF         BIT(8)
  67 #define MCR_RRF         BIT(9)
  68 #define MSR_TDF         BIT(0)
  69 #define MSR_RDF         BIT(1)
  70 #define MSR_SDF         BIT(9)
  71 #define MSR_NDF         BIT(10)
  72 #define MSR_ALF         BIT(11)
  73 #define MSR_MBF         BIT(24)
  74 #define MSR_BBF         BIT(25)
  75 #define MIER_TDIE       BIT(0)
  76 #define MIER_RDIE       BIT(1)
  77 #define MIER_SDIE       BIT(9)
  78 #define MIER_NDIE       BIT(10)
  79 #define MCFGR1_AUTOSTOP BIT(8)
  80 #define MCFGR1_IGNACK   BIT(9)
  81 #define MRDR_RXEMPTY    BIT(14)
  82
  83 #define I2C_CLK_RATIO   2
  84 #define CHUNK_DATA      256
  85
  86 #define LPI2C_DEFAULT_RATE      100000
  87 #define STARDARD_MAX_BITRATE    400000
  88 #define FAST_MAX_BITRATE        1000000
  89 #define FAST_PLUS_MAX_BITRATE   3400000
  90 #define HIGHSPEED_MAX_BITRATE   5000000
  91
  92 enum lpi2c_imx_mode {
  93         STANDARD,       /* 100+Kbps */
  94         FAST,           /* 400+Kbps */
  95         FAST_PLUS,      /* 1.0+Mbps */
  96         HS,             /* 3.4+Mbps */
  97         ULTRA_FAST,     /* 5.0+Mbps */
  98 };
  99
 100 enum lpi2c_imx_pincfg {
 101         TWO_PIN_OD,
 102         TWO_PIN_OO,
 103         TWO_PIN_PP,
 104         FOUR_PIN_PP,
 105 };
 106
 107 struct lpi2c_imx_struct {
 108         struct i2c_adapter      adapter;
 109         struct clk              *clk;
 110         void __iomem            *base;
 111         __u8                    *rx_buf;
 112         __u8                    *tx_buf;
 113         struct completion       complete;
 114         unsigned int            msglen;
 115         unsigned int            delivered;
 116         unsigned int            block_data;
 117         unsigned int            bitrate;
 118         unsigned int            txfifosize;
 119         unsigned int            rxfifosize;
 120         enum lpi2c_imx_mode     mode;
 121 };
 122
 123 static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx,
 124                               unsigned int enable)
 125 {
 126         writel(enable, lpi2c_imx->base + LPI2C_MIER);
 127 }
 128
 129 static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx)
 130 {
 131         unsigned long orig_jiffies = jiffies;
 132         unsigned int temp;
 133
 134         while (1) {
 135                 temp = readl(lpi2c_imx->base + LPI2C_MSR);
 136
 137                 /* check for arbitration lost, clear if set */
 138                 if (temp & MSR_ALF) {
 139                         writel(temp, lpi2c_imx->base + LPI2C_MSR);
 140                         return -EAGAIN;
 141                 }
 142
 143                 if (temp & (MSR_BBF | MSR_MBF))
 144                         break;
 145
 146                 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
 147                         dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n");
 148                         return -ETIMEDOUT;
 149                 }
 150                 schedule();
 151         }
 152
 153         return 0;
 154 }
 155
 156 static void lpi2c_imx_set_mode(struct lpi2c_imx_struct *lpi2c_imx)
 157 {
 158         unsigned int bitrate = lpi2c_imx->bitrate;
 159         enum lpi2c_imx_mode mode;
 160
 161         if (bitrate < STARDARD_MAX_BITRATE)
 162                 mode = STANDARD;
 163         else if (bitrate < FAST_MAX_BITRATE)
 164                 mode = FAST;
 165         else if (bitrate < FAST_PLUS_MAX_BITRATE)
 166                 mode = FAST_PLUS;
 167         else if (bitrate < HIGHSPEED_MAX_BITRATE)
 168                 mode = HS;
 169         else
 170                 mode = ULTRA_FAST;
 171
 172         lpi2c_imx->mode = mode;
 173 }
 174
 175 static int lpi2c_imx_start(struct lpi2c_imx_struct *lpi2c_imx,
 176                            struct i2c_msg *msgs)
 177 {
 178         unsigned int temp;
 179         u8 read;
 180
 181         temp = readl(lpi2c_imx->base + LPI2C_MCR);
 182         temp |= MCR_RRF | MCR_RTF;
 183         writel(temp, lpi2c_imx->base + LPI2C_MCR);
 184         writel(0x7f00, lpi2c_imx->base + LPI2C_MSR);
 185
 186         read = msgs->flags & I2C_M_RD;
 187         temp = (msgs->addr << 1 | read) | (GEN_START << 8);
 188         writel(temp, lpi2c_imx->base + LPI2C_MTDR);
 189
 190         return lpi2c_imx_bus_busy(lpi2c_imx);
 191 }
 192
 193 static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx)
 194 {
 195         unsigned long orig_jiffies = jiffies;
 196         unsigned int temp;
 197
 198         writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR);
 199
 200         do {
 201                 temp = readl(lpi2c_imx->base + LPI2C_MSR);
 202                 if (temp & MSR_SDF)
 203                         break;
 204
 205                 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
 206                         dev_dbg(&lpi2c_imx->adapter.dev, "stop timeout\n");
 207                         break;
 208                 }
 209                 schedule();
 210
 211         } while (1);
 212 }
 213
 214 /* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2 */
 215 static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
 216 {
 217         u8 prescale, filt, sethold, clkhi, clklo, datavd;
 218         unsigned int clk_rate, clk_cycle;
 219         enum lpi2c_imx_pincfg pincfg;
 220         unsigned int temp;
 221
 222         lpi2c_imx_set_mode(lpi2c_imx);
 223
 224         clk_rate = clk_get_rate(lpi2c_imx->clk);
 225         if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
 226                 filt = 0;
 227         else
 228                 filt = 2;
 229
 230         for (prescale = 0; prescale <= 7; prescale++) {
 231                 clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate)
 232                             - 3 - (filt >> 1);
 233                 clkhi = (clk_cycle + I2C_CLK_RATIO) / (I2C_CLK_RATIO + 1);
 234                 clklo = clk_cycle - clkhi;
 235                 if (clklo < 64)
 236                         break;
 237         }
 238
 239         if (prescale > 7)
 240                 return -EINVAL;
 241
 242         /* set MCFGR1: PINCFG, PRESCALE, IGNACK */
 243         if (lpi2c_imx->mode == ULTRA_FAST)
 244                 pincfg = TWO_PIN_OO;
 245         else
 246                 pincfg = TWO_PIN_OD;
 247         temp = prescale | pincfg << 24;
 248
 249         if (lpi2c_imx->mode == ULTRA_FAST)
 250                 temp |= MCFGR1_IGNACK;
 251
 252         writel(temp, lpi2c_imx->base + LPI2C_MCFGR1);
 253
 254         /* set MCFGR2: FILTSDA, FILTSCL */
 255         temp = (filt << 16) | (filt << 24);
 256         writel(temp, lpi2c_imx->base + LPI2C_MCFGR2);
 257
 258         /* set MCCR: DATAVD, SETHOLD, CLKHI, CLKLO */
 259         sethold = clkhi;
 260         datavd = clkhi >> 1;
 261         temp = datavd << 24 | sethold << 16 | clkhi << 8 | clklo;
 262
 263         if (lpi2c_imx->mode == HS)
 264                 writel(temp, lpi2c_imx->base + LPI2C_MCCR1);
 265         else
 266                 writel(temp, lpi2c_imx->base + LPI2C_MCCR0);
 267
 268         return 0;
 269 }
 270
 271 static int lpi2c_imx_master_enable(struct lpi2c_imx_struct *lpi2c_imx)
 272 {
 273         unsigned int temp;
 274         int ret;
 275
 276         ret = clk_enable(lpi2c_imx->clk);
 277         if (ret)
 278                 return ret;
 279
 280         temp = MCR_RST;
 281         writel(temp, lpi2c_imx->base + LPI2C_MCR);
 282         writel(0, lpi2c_imx->base + LPI2C_MCR);
 283
 284         ret = lpi2c_imx_config(lpi2c_imx);
 285         if (ret)
 286                 goto clk_disable;
 287
 288         temp = readl(lpi2c_imx->base + LPI2C_MCR);
 289         temp |= MCR_MEN;
 290         writel(temp, lpi2c_imx->base + LPI2C_MCR);
 291
 292         return 0;
 293
 294 clk_disable:
 295         clk_disable(lpi2c_imx->clk);
 296
 297         return ret;
 298 }
 299
 300 static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx)
 301 {
 302         u32 temp;
 303
 304         temp = readl(lpi2c_imx->base + LPI2C_MCR);
 305         temp &= ~MCR_MEN;
 306         writel(temp, lpi2c_imx->base + LPI2C_MCR);
 307
 308         clk_disable(lpi2c_imx->clk);
 309
 310         return 0;
 311 }
 312
 313 static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct *lpi2c_imx)
 314 {
 315         unsigned long timeout;
 316
 317         timeout = wait_for_completion_timeout(&lpi2c_imx->complete, HZ);
 318
 319         return timeout ? 0 : -ETIMEDOUT;
 320 }
 321
 322 static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx)
 323 {
 324         unsigned long orig_jiffies = jiffies;
 325         u32 txcnt;
 326
 327         do {
 328                 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
 329
 330                 if (readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) {
 331                         dev_dbg(&lpi2c_imx->adapter.dev, "NDF detected\n");
 332                         return -EIO;
 333                 }
 334
 335                 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) {
 336                         dev_dbg(&lpi2c_imx->adapter.dev, "txfifo empty timeout\n");
 337                         return -ETIMEDOUT;
 338                 }
 339                 schedule();
 340
 341         } while (txcnt);
 342
 343         return 0;
 344 }
 345
 346 static void lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
 347 {
 348         writel(lpi2c_imx->txfifosize >> 1, lpi2c_imx->base + LPI2C_MFCR);
 349 }
 350
 351 static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct *lpi2c_imx)
 352 {
 353         unsigned int temp, remaining;
 354
 355         remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
 356
 357         if (remaining > (lpi2c_imx->rxfifosize >> 1))
 358                 temp = lpi2c_imx->rxfifosize >> 1;
 359         else
 360                 temp = 0;
 361
 362         writel(temp << 16, lpi2c_imx->base + LPI2C_MFCR);
 363 }
 364
 365 static void lpi2c_imx_write_txfifo(struct lpi2c_imx_struct *lpi2c_imx)
 366 {
 367         unsigned int data, txcnt;
 368
 369         txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
 370
 371         while (txcnt < lpi2c_imx->txfifosize) {
 372                 if (lpi2c_imx->delivered == lpi2c_imx->msglen)
 373                         break;
 374
 375                 data = lpi2c_imx->tx_buf[lpi2c_imx->delivered++];
 376                 writel(data, lpi2c_imx->base + LPI2C_MTDR);
 377                 txcnt++;
 378         }
 379
 380         if (lpi2c_imx->delivered < lpi2c_imx->msglen)
 381                 lpi2c_imx_intctrl(lpi2c_imx, MIER_TDIE | MIER_NDIE);
 382         else
 383                 complete(&lpi2c_imx->complete);
 384 }
 385
 386 static void lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct *lpi2c_imx)
 387 {
 388         unsigned int blocklen, remaining;
 389         unsigned int temp, data;
 390
 391         do {
 392                 data = readl(lpi2c_imx->base + LPI2C_MRDR);
 393                 if (data & MRDR_RXEMPTY)
 394                         break;
 395
 396                 lpi2c_imx->rx_buf[lpi2c_imx->delivered++] = data & 0xff;
 397         } while (1);
 398
 399         /*
 400          * First byte is the length of remaining packet in the SMBus block
 401          * data read. Add it to msgs->len.
 402          */
 403         if (lpi2c_imx->block_data) {
 404                 blocklen = lpi2c_imx->rx_buf[0];
 405                 lpi2c_imx->msglen += blocklen;
 406         }
 407
 408         remaining = lpi2c_imx->msglen - lpi2c_imx->delivered;
 409
 410         if (!remaining) {
 411                 complete(&lpi2c_imx->complete);
 412                 return;
 413         }
 414
 415         /* not finished, still waiting for rx data */
 416         lpi2c_imx_set_rx_watermark(lpi2c_imx);
 417
 418         /* multiple receive commands */
 419         if (lpi2c_imx->block_data) {
 420                 lpi2c_imx->block_data = 0;
 421                 temp = remaining;
 422                 temp |= (RECV_DATA << 8);
 423                 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
 424         } else if (!(lpi2c_imx->delivered & 0xff)) {
 425                 temp = (remaining > CHUNK_DATA ? CHUNK_DATA : remaining) - 1;
 426                 temp |= (RECV_DATA << 8);
 427                 writel(temp, lpi2c_imx->base + LPI2C_MTDR);
 428         }
 429
 430         lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE);
 431 }
 432
 433 static void lpi2c_imx_write(struct lpi2c_imx_struct *lpi2c_imx,
 434                             struct i2c_msg *msgs)
 435 {
 436         lpi2c_imx->tx_buf = msgs->buf;
 437         lpi2c_imx_set_tx_watermark(lpi2c_imx);
 438         lpi2c_imx_write_txfifo(lpi2c_imx);
 439 }
 440
 441 static void lpi2c_imx_read(struct lpi2c_imx_struct *lpi2c_imx,
 442                            struct i2c_msg *msgs)
 443 {
 444         unsigned int temp;
 445
 446         lpi2c_imx->rx_buf = msgs->buf;
 447         lpi2c_imx->block_data = msgs->flags & I2C_M_RECV_LEN;
 448
 449         lpi2c_imx_set_rx_watermark(lpi2c_imx);
 450         temp = msgs->len > CHUNK_DATA ? CHUNK_DATA - 1 : msgs->len - 1;
 451         temp |= (RECV_DATA << 8);
 452         writel(temp, lpi2c_imx->base + LPI2C_MTDR);
 453
 454         lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE | MIER_NDIE);
 455 }
 456
 457 static int lpi2c_imx_xfer(struct i2c_adapter *adapter,
 458                           struct i2c_msg *msgs, int num)
 459 {
 460         struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(adapter);
 461         unsigned int temp;
 462         int i, result;
 463
 464         result = lpi2c_imx_master_enable(lpi2c_imx);
 465         if (result)
 466                 return result;
 467
 468         for (i = 0; i < num; i++) {
 469                 result = lpi2c_imx_start(lpi2c_imx, &msgs[i]);
 470                 if (result)
 471                         goto disable;
 472
 473                 /* quick smbus */
 474                 if (num == 1 && msgs[0].len == 0)
 475                         goto stop;
 476
 477                 lpi2c_imx->delivered = 0;
 478                 lpi2c_imx->msglen = msgs[i].len;
 479                 init_completion(&lpi2c_imx->complete);
 480
 481                 if (msgs[i].flags & I2C_M_RD)
 482                         lpi2c_imx_read(lpi2c_imx, &msgs[i]);
 483                 else
 484                         lpi2c_imx_write(lpi2c_imx, &msgs[i]);
 485
 486                 result = lpi2c_imx_msg_complete(lpi2c_imx);
 487                 if (result)
 488                         goto stop;
 489
 490                 if (!(msgs[i].flags & I2C_M_RD)) {
 491                         result = lpi2c_imx_txfifo_empty(lpi2c_imx);
 492                         if (result)
 493                                 goto stop;
 494                 }
 495         }
 496
 497 stop:
 498         lpi2c_imx_stop(lpi2c_imx);
 499
 500         temp = readl(lpi2c_imx->base + LPI2C_MSR);
 501         if ((temp & MSR_NDF) && !result)
 502                 result = -EIO;
 503
 504 disable:
 505         lpi2c_imx_master_disable(lpi2c_imx);
 506
 507         dev_dbg(&lpi2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
 508                 (result < 0) ? "error" : "success msg",
 509                 (result < 0) ? result : num);
 510
 511         return (result < 0) ? result : num;
 512 }
 513
 514 static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id)
 515 {
 516         struct lpi2c_imx_struct *lpi2c_imx = dev_id;
 517         unsigned int temp;
 518
 519         lpi2c_imx_intctrl(lpi2c_imx, 0);
 520         temp = readl(lpi2c_imx->base + LPI2C_MSR);
 521
 522         if (temp & MSR_RDF)
 523                 lpi2c_imx_read_rxfifo(lpi2c_imx);
 524
 525         if (temp & MSR_TDF)
 526                 lpi2c_imx_write_txfifo(lpi2c_imx);
 527
 528         if (temp & MSR_NDF)
 529                 complete(&lpi2c_imx->complete);
 530
 531         return IRQ_HANDLED;
 532 }
 533
 534 static u32 lpi2c_imx_func(struct i2c_adapter *adapter)
 535 {
 536         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
 537                 I2C_FUNC_SMBUS_READ_BLOCK_DATA;
 538 }
 539
 540 static struct i2c_algorithm lpi2c_imx_algo = {
 541         .master_xfer    = lpi2c_imx_xfer,
 542         .functionality  = lpi2c_imx_func,
 543 };
 544
 545 static const struct of_device_id lpi2c_imx_of_match[] = {
 546         { .compatible = "fsl,imx7ulp-lpi2c" },
 547         { .compatible = "fsl,imx8dv-lpi2c" },
 548         { },
 549 };
 550 MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match);
 551
 552 static int lpi2c_imx_probe(struct platform_device *pdev)
 553 {
 554         struct lpi2c_imx_struct *lpi2c_imx;
 555         struct resource *res;
 556         unsigned int temp;
 557         int irq, ret;
 558
 559         lpi2c_imx = devm_kzalloc(&pdev->dev, sizeof(*lpi2c_imx), GFP_KERNEL);
 560         if (!lpi2c_imx)
 561                 return -ENOMEM;
 562
 563         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 564         lpi2c_imx->base = devm_ioremap_resource(&pdev->dev, res);
 565         if (IS_ERR(lpi2c_imx->base))
 566                 return PTR_ERR(lpi2c_imx->base);
 567
 568         irq = platform_get_irq(pdev, 0);
 569         if (irq < 0) {
 570                 dev_err(&pdev->dev, "can't get irq number\n");
 571                 return irq;
 572         }
 573
 574         lpi2c_imx->adapter.owner        = THIS_MODULE;
 575         lpi2c_imx->adapter.algo         = &lpi2c_imx_algo;
 576         lpi2c_imx->adapter.dev.parent   = &pdev->dev;
 577         lpi2c_imx->adapter.dev.of_node  = pdev->dev.of_node;
 578         strlcpy(lpi2c_imx->adapter.name, pdev->name,
 579                 sizeof(lpi2c_imx->adapter.name));
 580
 581         lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
 582         if (IS_ERR(lpi2c_imx->clk)) {
 583                 dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
 584                 return PTR_ERR(lpi2c_imx->clk);
 585         }
 586
 587         ret = of_property_read_u32(pdev->dev.of_node,
 588                                    "clock-frequency", &lpi2c_imx->bitrate);
 589         if (ret)
 590                 lpi2c_imx->bitrate = LPI2C_DEFAULT_RATE;
 591
 592         ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0,
 593                                pdev->name, lpi2c_imx);
 594         if (ret) {
 595                 dev_err(&pdev->dev, "can't claim irq %d\n", irq);
 596                 return ret;
 597         }
 598
 599         i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
 600         platform_set_drvdata(pdev, lpi2c_imx);
 601
 602         ret = clk_prepare_enable(lpi2c_imx->clk);
 603         if (ret) {
 604                 dev_err(&pdev->dev, "clk enable failed %d\n", ret);
 605                 return ret;
 606         }
 607
 608         temp = readl(lpi2c_imx->base + LPI2C_PARAM);
 609         lpi2c_imx->txfifosize = 1 << (temp & 0x0f);
 610         lpi2c_imx->rxfifosize = 1 << ((temp >> 8) & 0x0f);
 611
 612         clk_disable(lpi2c_imx->clk);
 613
 614         ret = i2c_add_adapter(&lpi2c_imx->adapter);
 615         if (ret)
 616                 goto clk_unprepare;
 617
 618         dev_info(&lpi2c_imx->adapter.dev, "LPI2C adapter registered\n");
 619
 620         return 0;
 621
 622 clk_unprepare:
 623         clk_unprepare(lpi2c_imx->clk);
 624
 625         return ret;
 626 }
 627
 628 static int lpi2c_imx_remove(struct platform_device *pdev)
 629 {
 630         struct lpi2c_imx_struct *lpi2c_imx = platform_get_drvdata(pdev);
 631
 632         i2c_del_adapter(&lpi2c_imx->adapter);
 633
 634         clk_unprepare(lpi2c_imx->clk);
 635
 636         return 0;
 637 }
 638
 639 static struct platform_driver lpi2c_imx_driver = {
 640         .probe = lpi2c_imx_probe,
 641         .remove = lpi2c_imx_remove,
 642         .driver = {
 643                 .name = DRIVER_NAME,
 644                 .of_match_table = lpi2c_imx_of_match,
 645         },
 646 };
 647
 648 module_platform_driver(lpi2c_imx_driver);
 649
 650 MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>");
 651 MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus");
 652 MODULE_LICENSE("GPL");