1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
8 #include <linux/interrupt.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
13 #define UNIPHIER_I2C_DTRM 0x00 /* TX register */
14 #define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */
15 #define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */
16 #define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */
17 #define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */
18 #define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */
19 #define UNIPHIER_I2C_DREC 0x04 /* RX register */
20 #define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */
21 #define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */
22 #define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */
23 #define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */
24 #define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */
25 #define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */
26 #define UNIPHIER_I2C_MYAD 0x08 /* slave address */
27 #define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */
28 #define UNIPHIER_I2C_BRST 0x10 /* bus reset */
29 #define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */
30 #define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */
31 #define UNIPHIER_I2C_HOLD 0x14 /* hold time control */
32 #define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */
33 #define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */
34 #define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */
35 #define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */
36 #define UNIPHIER_I2C_SETUP 0x20 /* setup time control */
38 #define UNIPHIER_I2C_DEFAULT_SPEED 100000
39 #define UNIPHIER_I2C_MAX_SPEED 400000
41 struct uniphier_i2c_priv {
42 struct completion comp;
43 struct i2c_adapter adap;
44 void __iomem *membase;
46 unsigned int busy_cnt;
47 unsigned int clk_cycle;
50 static irqreturn_t uniphier_i2c_interrupt(int irq, void *dev_id)
52 struct uniphier_i2c_priv *priv = dev_id;
55 * This hardware uses edge triggered interrupt. Do not touch the
56 * hardware registers in this handler to make sure to catch the next
57 * interrupt edge. Just send a complete signal and return.
59 complete(&priv->comp);
64 static int uniphier_i2c_xfer_byte(struct i2c_adapter *adap, u32 txdata,
67 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
68 unsigned long time_left;
71 reinit_completion(&priv->comp);
73 txdata |= UNIPHIER_I2C_DTRM_IRQEN;
74 writel(txdata, priv->membase + UNIPHIER_I2C_DTRM);
76 time_left = wait_for_completion_timeout(&priv->comp, adap->timeout);
77 if (unlikely(!time_left)) {
78 dev_err(&adap->dev, "transaction timeout\n");
82 rxdata = readl(priv->membase + UNIPHIER_I2C_DREC);
89 static int uniphier_i2c_send_byte(struct i2c_adapter *adap, u32 txdata)
94 ret = uniphier_i2c_xfer_byte(adap, txdata, &rxdata);
98 if (unlikely(rxdata & UNIPHIER_I2C_DREC_LAB))
101 if (unlikely(rxdata & UNIPHIER_I2C_DREC_LRB))
107 static int uniphier_i2c_tx(struct i2c_adapter *adap, u16 addr, u16 len,
112 ret = uniphier_i2c_send_byte(adap, addr << 1 |
113 UNIPHIER_I2C_DTRM_STA |
114 UNIPHIER_I2C_DTRM_NACK);
119 ret = uniphier_i2c_send_byte(adap,
120 UNIPHIER_I2C_DTRM_NACK | *buf++);
128 static int uniphier_i2c_rx(struct i2c_adapter *adap, u16 addr, u16 len,
133 ret = uniphier_i2c_send_byte(adap, addr << 1 |
134 UNIPHIER_I2C_DTRM_STA |
135 UNIPHIER_I2C_DTRM_NACK |
136 UNIPHIER_I2C_DTRM_RD);
143 ret = uniphier_i2c_xfer_byte(adap,
144 len ? 0 : UNIPHIER_I2C_DTRM_NACK,
154 static int uniphier_i2c_stop(struct i2c_adapter *adap)
156 return uniphier_i2c_send_byte(adap, UNIPHIER_I2C_DTRM_STO |
157 UNIPHIER_I2C_DTRM_NACK);
160 static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap,
161 struct i2c_msg *msg, bool stop)
163 bool is_read = msg->flags & I2C_M_RD;
164 bool recovery = false;
168 ret = uniphier_i2c_rx(adap, msg->addr, msg->len, msg->buf);
170 ret = uniphier_i2c_tx(adap, msg->addr, msg->len, msg->buf);
172 if (ret == -EAGAIN) /* could not acquire bus. bail out without STOP */
175 if (ret == -ETIMEDOUT) {
176 /* This error is fatal. Needs recovery. */
182 int ret2 = uniphier_i2c_stop(adap);
185 /* Failed to issue STOP. The bus needs recovery. */
192 i2c_recover_bus(adap);
197 static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap)
199 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
201 if (!(readl(priv->membase + UNIPHIER_I2C_DREC) &
202 UNIPHIER_I2C_DREC_BBN)) {
203 if (priv->busy_cnt++ > 3) {
205 * If bus busy continues too long, it is probably
206 * in a wrong state. Try bus recovery.
208 i2c_recover_bus(adap);
219 static int uniphier_i2c_master_xfer(struct i2c_adapter *adap,
220 struct i2c_msg *msgs, int num)
222 struct i2c_msg *msg, *emsg = msgs + num;
225 ret = uniphier_i2c_check_bus_busy(adap);
229 for (msg = msgs; msg < emsg; msg++) {
230 /* Emit STOP if it is the last message or I2C_M_STOP is set. */
231 bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
233 ret = uniphier_i2c_master_xfer_one(adap, msg, stop);
241 static u32 uniphier_i2c_functionality(struct i2c_adapter *adap)
243 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
246 static const struct i2c_algorithm uniphier_i2c_algo = {
247 .master_xfer = uniphier_i2c_master_xfer,
248 .functionality = uniphier_i2c_functionality,
251 static void uniphier_i2c_reset(struct uniphier_i2c_priv *priv, bool reset_on)
253 u32 val = UNIPHIER_I2C_BRST_RSCL;
255 val |= reset_on ? 0 : UNIPHIER_I2C_BRST_FOEN;
256 writel(val, priv->membase + UNIPHIER_I2C_BRST);
259 static int uniphier_i2c_get_scl(struct i2c_adapter *adap)
261 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
263 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
264 UNIPHIER_I2C_BSTS_SCL);
267 static void uniphier_i2c_set_scl(struct i2c_adapter *adap, int val)
269 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
271 writel(val ? UNIPHIER_I2C_BRST_RSCL : 0,
272 priv->membase + UNIPHIER_I2C_BRST);
275 static int uniphier_i2c_get_sda(struct i2c_adapter *adap)
277 struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap);
279 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
280 UNIPHIER_I2C_BSTS_SDA);
283 static void uniphier_i2c_unprepare_recovery(struct i2c_adapter *adap)
285 uniphier_i2c_reset(i2c_get_adapdata(adap), false);
288 static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info = {
289 .recover_bus = i2c_generic_scl_recovery,
290 .get_scl = uniphier_i2c_get_scl,
291 .set_scl = uniphier_i2c_set_scl,
292 .get_sda = uniphier_i2c_get_sda,
293 .unprepare_recovery = uniphier_i2c_unprepare_recovery,
296 static void uniphier_i2c_hw_init(struct uniphier_i2c_priv *priv)
298 unsigned int cyc = priv->clk_cycle;
300 uniphier_i2c_reset(priv, true);
303 * Bit30-16: clock cycles of tLOW.
304 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us
305 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us
306 * "tLow/tHIGH = 5/4" meets both.
308 writel((cyc * 5 / 9 << 16) | cyc, priv->membase + UNIPHIER_I2C_CLK);
310 uniphier_i2c_reset(priv, false);
313 static int uniphier_i2c_probe(struct platform_device *pdev)
315 struct device *dev = &pdev->dev;
316 struct uniphier_i2c_priv *priv;
318 unsigned long clk_rate;
321 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
325 priv->membase = devm_platform_ioremap_resource(pdev, 0);
326 if (IS_ERR(priv->membase))
327 return PTR_ERR(priv->membase);
329 irq = platform_get_irq(pdev, 0);
331 dev_err(dev, "failed to get IRQ number\n");
335 if (of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed))
336 bus_speed = UNIPHIER_I2C_DEFAULT_SPEED;
338 if (!bus_speed || bus_speed > UNIPHIER_I2C_MAX_SPEED) {
339 dev_err(dev, "invalid clock-frequency %d\n", bus_speed);
343 priv->clk = devm_clk_get(dev, NULL);
344 if (IS_ERR(priv->clk)) {
345 dev_err(dev, "failed to get clock\n");
346 return PTR_ERR(priv->clk);
349 ret = clk_prepare_enable(priv->clk);
353 clk_rate = clk_get_rate(priv->clk);
355 dev_err(dev, "input clock rate should not be zero\n");
360 priv->clk_cycle = clk_rate / bus_speed;
361 init_completion(&priv->comp);
362 priv->adap.owner = THIS_MODULE;
363 priv->adap.algo = &uniphier_i2c_algo;
364 priv->adap.dev.parent = dev;
365 priv->adap.dev.of_node = dev->of_node;
366 strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name));
367 priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info;
368 i2c_set_adapdata(&priv->adap, priv);
369 platform_set_drvdata(pdev, priv);
371 uniphier_i2c_hw_init(priv);
373 ret = devm_request_irq(dev, irq, uniphier_i2c_interrupt, 0, pdev->name,
376 dev_err(dev, "failed to request irq %d\n", irq);
380 ret = i2c_add_adapter(&priv->adap);
383 clk_disable_unprepare(priv->clk);
388 static int uniphier_i2c_remove(struct platform_device *pdev)
390 struct uniphier_i2c_priv *priv = platform_get_drvdata(pdev);
392 i2c_del_adapter(&priv->adap);
393 clk_disable_unprepare(priv->clk);
398 static int __maybe_unused uniphier_i2c_suspend(struct device *dev)
400 struct uniphier_i2c_priv *priv = dev_get_drvdata(dev);
402 clk_disable_unprepare(priv->clk);
407 static int __maybe_unused uniphier_i2c_resume(struct device *dev)
409 struct uniphier_i2c_priv *priv = dev_get_drvdata(dev);
412 ret = clk_prepare_enable(priv->clk);
416 uniphier_i2c_hw_init(priv);
421 static const struct dev_pm_ops uniphier_i2c_pm_ops = {
422 SET_SYSTEM_SLEEP_PM_OPS(uniphier_i2c_suspend, uniphier_i2c_resume)
425 static const struct of_device_id uniphier_i2c_match[] = {
426 { .compatible = "socionext,uniphier-i2c" },
429 MODULE_DEVICE_TABLE(of, uniphier_i2c_match);
431 static struct platform_driver uniphier_i2c_drv = {
432 .probe = uniphier_i2c_probe,
433 .remove = uniphier_i2c_remove,
435 .name = "uniphier-i2c",
436 .of_match_table = uniphier_i2c_match,
437 .pm = &uniphier_i2c_pm_ops,
440 module_platform_driver(uniphier_i2c_drv);
442 MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
443 MODULE_DESCRIPTION("UniPhier I2C bus driver");
444 MODULE_LICENSE("GPL");