1 // SPDX-License-Identifier: GPL-2.0
3 * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
4 * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver
6 * Copyright 2010 Analog Devices Inc.
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/module.h>
17 #include <linux/bitops.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/iio/triggered_buffer.h>
27 struct ad7476_chip_info {
28 unsigned int int_vref_uv;
29 struct iio_chan_spec channel[2];
30 void (*reset)(struct ad7476_state *);
34 struct spi_device *spi;
35 const struct ad7476_chip_info *chip_info;
36 struct regulator *reg;
37 struct spi_transfer xfer;
38 struct spi_message msg;
40 * DMA (thus cache coherency maintenance) requires the
41 * transfer buffers to live in their own cache lines.
42 * Make the buffer large enough for one 16 bit sample and one 64 bit
43 * aligned 64 bit timestamp.
45 unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
46 ____cacheline_aligned;
49 enum ad7476_supported_device_ids {
67 static irqreturn_t ad7476_trigger_handler(int irq, void *p)
69 struct iio_poll_func *pf = p;
70 struct iio_dev *indio_dev = pf->indio_dev;
71 struct ad7476_state *st = iio_priv(indio_dev);
74 b_sent = spi_sync(st->spi, &st->msg);
78 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
79 iio_get_time_ns(indio_dev));
81 iio_trigger_notify_done(indio_dev->trig);
86 static void ad7091_reset(struct ad7476_state *st)
88 /* Any transfers with 8 scl cycles will reset the device */
89 spi_read(st->spi, st->data, 1);
92 static int ad7476_scan_direct(struct ad7476_state *st)
96 ret = spi_sync(st->spi, &st->msg);
100 return be16_to_cpup((__be16 *)st->data);
103 static int ad7476_read_raw(struct iio_dev *indio_dev,
104 struct iio_chan_spec const *chan,
110 struct ad7476_state *st = iio_priv(indio_dev);
114 case IIO_CHAN_INFO_RAW:
115 ret = iio_device_claim_direct_mode(indio_dev);
118 ret = ad7476_scan_direct(st);
119 iio_device_release_direct_mode(indio_dev);
123 *val = (ret >> st->chip_info->channel[0].scan_type.shift) &
124 GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
126 case IIO_CHAN_INFO_SCALE:
127 if (!st->chip_info->int_vref_uv) {
128 scale_uv = regulator_get_voltage(st->reg);
132 scale_uv = st->chip_info->int_vref_uv;
134 *val = scale_uv / 1000;
135 *val2 = chan->scan_type.realbits;
136 return IIO_VAL_FRACTIONAL_LOG2;
141 #define _AD7476_CHAN(bits, _shift, _info_mask_sep) \
143 .type = IIO_VOLTAGE, \
145 .info_mask_separate = _info_mask_sep, \
146 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
149 .realbits = (bits), \
152 .endianness = IIO_BE, \
156 #define ADC081S_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
157 BIT(IIO_CHAN_INFO_RAW))
158 #define AD7476_CHAN(bits) _AD7476_CHAN((bits), 13 - (bits), \
159 BIT(IIO_CHAN_INFO_RAW))
160 #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \
161 BIT(IIO_CHAN_INFO_RAW))
162 #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0)
163 #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \
164 BIT(IIO_CHAN_INFO_RAW))
166 static const struct ad7476_chip_info ad7476_chip_info_tbl[] = {
168 .channel[0] = AD7091R_CHAN(12),
169 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
170 .reset = ad7091_reset,
173 .channel[0] = AD7940_CHAN(12),
174 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
177 .channel[0] = AD7940_CHAN(10),
178 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
181 .channel[0] = AD7940_CHAN(8),
182 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
185 .channel[0] = AD7476_CHAN(12),
186 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
189 .channel[0] = AD7476_CHAN(10),
190 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
193 .channel[0] = AD7476_CHAN(8),
194 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
197 .channel[0] = AD7476_CHAN(12),
198 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
199 .int_vref_uv = 2500000,
202 .channel[0] = AD7940_CHAN(14),
203 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
206 .channel[0] = ADC081S_CHAN(8),
207 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
210 .channel[0] = ADC081S_CHAN(10),
211 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
214 .channel[0] = ADC081S_CHAN(12),
215 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
218 .channel[0] = ADS786X_CHAN(12),
219 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
222 .channel[0] = ADS786X_CHAN(10),
223 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
226 .channel[0] = ADS786X_CHAN(8),
227 .channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
231 static const struct iio_info ad7476_info = {
232 .read_raw = &ad7476_read_raw,
235 static int ad7476_probe(struct spi_device *spi)
237 struct ad7476_state *st;
238 struct iio_dev *indio_dev;
241 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
245 st = iio_priv(indio_dev);
247 &ad7476_chip_info_tbl[spi_get_device_id(spi)->driver_data];
249 st->reg = devm_regulator_get(&spi->dev, "vcc");
251 return PTR_ERR(st->reg);
253 ret = regulator_enable(st->reg);
257 spi_set_drvdata(spi, indio_dev);
261 /* Establish that the iio_dev is a child of the spi device */
262 indio_dev->dev.parent = &spi->dev;
263 indio_dev->dev.of_node = spi->dev.of_node;
264 indio_dev->name = spi_get_device_id(spi)->name;
265 indio_dev->modes = INDIO_DIRECT_MODE;
266 indio_dev->channels = st->chip_info->channel;
267 indio_dev->num_channels = 2;
268 indio_dev->info = &ad7476_info;
269 /* Setup default message */
271 st->xfer.rx_buf = &st->data;
272 st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
274 spi_message_init(&st->msg);
275 spi_message_add_tail(&st->xfer, &st->msg);
277 ret = iio_triggered_buffer_setup(indio_dev, NULL,
278 &ad7476_trigger_handler, NULL);
280 goto error_disable_reg;
282 if (st->chip_info->reset)
283 st->chip_info->reset(st);
285 ret = iio_device_register(indio_dev);
287 goto error_ring_unregister;
290 error_ring_unregister:
291 iio_triggered_buffer_cleanup(indio_dev);
293 regulator_disable(st->reg);
298 static int ad7476_remove(struct spi_device *spi)
300 struct iio_dev *indio_dev = spi_get_drvdata(spi);
301 struct ad7476_state *st = iio_priv(indio_dev);
303 iio_device_unregister(indio_dev);
304 iio_triggered_buffer_cleanup(indio_dev);
305 regulator_disable(st->reg);
310 static const struct spi_device_id ad7476_id[] = {
311 {"ad7091r", ID_AD7091R},
312 {"ad7273", ID_AD7277},
313 {"ad7274", ID_AD7276},
314 {"ad7276", ID_AD7276},
315 {"ad7277", ID_AD7277},
316 {"ad7278", ID_AD7278},
317 {"ad7466", ID_AD7466},
318 {"ad7467", ID_AD7467},
319 {"ad7468", ID_AD7468},
320 {"ad7475", ID_AD7466},
321 {"ad7476", ID_AD7466},
322 {"ad7476a", ID_AD7466},
323 {"ad7477", ID_AD7467},
324 {"ad7477a", ID_AD7467},
325 {"ad7478", ID_AD7468},
326 {"ad7478a", ID_AD7468},
327 {"ad7495", ID_AD7495},
328 {"ad7910", ID_AD7467},
329 {"ad7920", ID_AD7466},
330 {"ad7940", ID_AD7940},
331 {"adc081s", ID_ADC081S},
332 {"adc101s", ID_ADC101S},
333 {"adc121s", ID_ADC121S},
334 {"ads7866", ID_ADS7866},
335 {"ads7867", ID_ADS7867},
336 {"ads7868", ID_ADS7868},
339 MODULE_DEVICE_TABLE(spi, ad7476_id);
341 static struct spi_driver ad7476_driver = {
345 .probe = ad7476_probe,
346 .remove = ad7476_remove,
347 .id_table = ad7476_id,
349 module_spi_driver(ad7476_driver);
351 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
352 MODULE_DESCRIPTION("Analog Devices AD7476 and similar 1-channel ADCs");
353 MODULE_LICENSE("GPL v2");