1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD7904/AD7914/AD7923/AD7924/AD7908/AD7918/AD7928 SPI ADC driver
5 * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
6 * Copyright 2012 CS Systemes d'Information
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
26 #define AD7923_WRITE_CR BIT(11) /* write control register */
27 #define AD7923_RANGE BIT(1) /* range to REFin */
28 #define AD7923_CODING BIT(0) /* coding is straight binary */
29 #define AD7923_PM_MODE_AS (1) /* auto shutdown */
30 #define AD7923_PM_MODE_FS (2) /* full shutdown */
31 #define AD7923_PM_MODE_OPS (3) /* normal operation */
32 #define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */
33 #define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */
34 #define AD7923_SEQUENCE_ON (3) /* continuous sequence */
37 #define AD7923_PM_MODE_WRITE(mode) ((mode) << 4) /* write mode */
38 #define AD7923_CHANNEL_WRITE(channel) ((channel) << 6) /* write channel */
39 #define AD7923_SEQUENCE_WRITE(sequence) ((((sequence) & 1) << 3) \
40 + (((sequence) & 2) << 9))
41 /* write sequence fonction */
42 /* left shift for CR : bit 11 transmit in first */
43 #define AD7923_SHIFT_REGISTER 4
45 /* val = value, dec = left shift, bits = number of bits of the mask */
46 #define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1))
49 struct spi_device *spi;
50 struct spi_transfer ring_xfer[5];
51 struct spi_transfer scan_single_xfer[2];
52 struct spi_message ring_msg;
53 struct spi_message scan_single_msg;
55 struct regulator *reg;
57 unsigned int settings;
60 * DMA (thus cache coherency maintenance) requires the
61 * transfer buffers to live in their own cache lines.
63 __be16 rx_buf[4] ____cacheline_aligned;
67 struct ad7923_chip_info {
68 const struct iio_chan_spec *channels;
69 unsigned int num_channels;
81 #define AD7923_V_CHAN(index, bits) \
83 .type = IIO_VOLTAGE, \
86 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
87 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
89 .scan_index = index, \
94 .endianness = IIO_BE, \
98 #define DECLARE_AD7923_CHANNELS(name, bits) \
99 const struct iio_chan_spec name ## _channels[] = { \
100 AD7923_V_CHAN(0, bits), \
101 AD7923_V_CHAN(1, bits), \
102 AD7923_V_CHAN(2, bits), \
103 AD7923_V_CHAN(3, bits), \
104 IIO_CHAN_SOFT_TIMESTAMP(4), \
107 #define DECLARE_AD7908_CHANNELS(name, bits) \
108 const struct iio_chan_spec name ## _channels[] = { \
109 AD7923_V_CHAN(0, bits), \
110 AD7923_V_CHAN(1, bits), \
111 AD7923_V_CHAN(2, bits), \
112 AD7923_V_CHAN(3, bits), \
113 AD7923_V_CHAN(4, bits), \
114 AD7923_V_CHAN(5, bits), \
115 AD7923_V_CHAN(6, bits), \
116 AD7923_V_CHAN(7, bits), \
117 IIO_CHAN_SOFT_TIMESTAMP(8), \
120 static DECLARE_AD7923_CHANNELS(ad7904, 8);
121 static DECLARE_AD7923_CHANNELS(ad7914, 10);
122 static DECLARE_AD7923_CHANNELS(ad7924, 12);
123 static DECLARE_AD7908_CHANNELS(ad7908, 8);
124 static DECLARE_AD7908_CHANNELS(ad7918, 10);
125 static DECLARE_AD7908_CHANNELS(ad7928, 12);
127 static const struct ad7923_chip_info ad7923_chip_info[] = {
129 .channels = ad7904_channels,
130 .num_channels = ARRAY_SIZE(ad7904_channels),
133 .channels = ad7914_channels,
134 .num_channels = ARRAY_SIZE(ad7914_channels),
137 .channels = ad7924_channels,
138 .num_channels = ARRAY_SIZE(ad7924_channels),
141 .channels = ad7908_channels,
142 .num_channels = ARRAY_SIZE(ad7908_channels),
145 .channels = ad7918_channels,
146 .num_channels = ARRAY_SIZE(ad7918_channels),
149 .channels = ad7928_channels,
150 .num_channels = ARRAY_SIZE(ad7928_channels),
155 * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
157 static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
158 const unsigned long *active_scan_mask)
160 struct ad7923_state *st = iio_priv(indio_dev);
165 * For this driver the last channel is always the software timestamp so
168 for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) {
169 cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
170 AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
172 cmd <<= AD7923_SHIFT_REGISTER;
173 st->tx_buf[len++] = cpu_to_be16(cmd);
175 /* build spi ring message */
176 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
177 st->ring_xfer[0].len = len;
178 st->ring_xfer[0].cs_change = 1;
180 spi_message_init(&st->ring_msg);
181 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
183 for (i = 0; i < len; i++) {
184 st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
185 st->ring_xfer[i + 1].len = 2;
186 st->ring_xfer[i + 1].cs_change = 1;
187 spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
189 /* make sure last transfer cs_change is not set */
190 st->ring_xfer[i + 1].cs_change = 0;
196 * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
198 * Currently there is no option in this driver to disable the saving of
199 * timestamps within the ring.
201 static irqreturn_t ad7923_trigger_handler(int irq, void *p)
203 struct iio_poll_func *pf = p;
204 struct iio_dev *indio_dev = pf->indio_dev;
205 struct ad7923_state *st = iio_priv(indio_dev);
208 b_sent = spi_sync(st->spi, &st->ring_msg);
212 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
213 iio_get_time_ns(indio_dev));
216 iio_trigger_notify_done(indio_dev->trig);
221 static int ad7923_scan_direct(struct ad7923_state *st, unsigned int ch)
225 cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) |
226 AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
228 cmd <<= AD7923_SHIFT_REGISTER;
229 st->tx_buf[0] = cpu_to_be16(cmd);
231 ret = spi_sync(st->spi, &st->scan_single_msg);
235 return be16_to_cpu(st->rx_buf[0]);
238 static int ad7923_get_range(struct ad7923_state *st)
242 vref = regulator_get_voltage(st->reg);
248 if (!(st->settings & AD7923_RANGE))
254 static int ad7923_read_raw(struct iio_dev *indio_dev,
255 struct iio_chan_spec const *chan,
261 struct ad7923_state *st = iio_priv(indio_dev);
264 case IIO_CHAN_INFO_RAW:
265 ret = iio_device_claim_direct_mode(indio_dev);
268 ret = ad7923_scan_direct(st, chan->address);
269 iio_device_release_direct_mode(indio_dev);
274 if (chan->address == EXTRACT(ret, 12, 4))
275 *val = EXTRACT(ret, 0, 12);
280 case IIO_CHAN_INFO_SCALE:
281 ret = ad7923_get_range(st);
285 *val2 = chan->scan_type.realbits;
286 return IIO_VAL_FRACTIONAL_LOG2;
291 static const struct iio_info ad7923_info = {
292 .read_raw = &ad7923_read_raw,
293 .update_scan_mode = ad7923_update_scan_mode,
296 static int ad7923_probe(struct spi_device *spi)
298 struct ad7923_state *st;
299 struct iio_dev *indio_dev;
300 const struct ad7923_chip_info *info;
303 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
307 st = iio_priv(indio_dev);
309 spi_set_drvdata(spi, indio_dev);
312 st->settings = AD7923_CODING | AD7923_RANGE |
313 AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS);
315 info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
317 indio_dev->name = spi_get_device_id(spi)->name;
318 indio_dev->dev.parent = &spi->dev;
319 indio_dev->dev.of_node = spi->dev.of_node;
320 indio_dev->modes = INDIO_DIRECT_MODE;
321 indio_dev->channels = info->channels;
322 indio_dev->num_channels = info->num_channels;
323 indio_dev->info = &ad7923_info;
325 /* Setup default message */
327 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
328 st->scan_single_xfer[0].len = 2;
329 st->scan_single_xfer[0].cs_change = 1;
330 st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
331 st->scan_single_xfer[1].len = 2;
333 spi_message_init(&st->scan_single_msg);
334 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
335 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
337 st->reg = devm_regulator_get(&spi->dev, "refin");
339 return PTR_ERR(st->reg);
341 ret = regulator_enable(st->reg);
345 ret = iio_triggered_buffer_setup(indio_dev, NULL,
346 &ad7923_trigger_handler, NULL);
348 goto error_disable_reg;
350 ret = iio_device_register(indio_dev);
352 goto error_cleanup_ring;
357 iio_triggered_buffer_cleanup(indio_dev);
359 regulator_disable(st->reg);
364 static int ad7923_remove(struct spi_device *spi)
366 struct iio_dev *indio_dev = spi_get_drvdata(spi);
367 struct ad7923_state *st = iio_priv(indio_dev);
369 iio_device_unregister(indio_dev);
370 iio_triggered_buffer_cleanup(indio_dev);
371 regulator_disable(st->reg);
376 static const struct spi_device_id ad7923_id[] = {
386 MODULE_DEVICE_TABLE(spi, ad7923_id);
388 static const struct of_device_id ad7923_of_match[] = {
389 { .compatible = "adi,ad7904", },
390 { .compatible = "adi,ad7914", },
391 { .compatible = "adi,ad7923", },
392 { .compatible = "adi,ad7924", },
393 { .compatible = "adi,ad7908", },
394 { .compatible = "adi,ad7918", },
395 { .compatible = "adi,ad7928", },
398 MODULE_DEVICE_TABLE(of, ad7923_of_match);
400 static struct spi_driver ad7923_driver = {
403 .of_match_table = ad7923_of_match,
405 .probe = ad7923_probe,
406 .remove = ad7923_remove,
407 .id_table = ad7923_id,
409 module_spi_driver(ad7923_driver);
411 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
412 MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
413 MODULE_DESCRIPTION("Analog Devices AD7923 and similar ADC");
414 MODULE_LICENSE("GPL v2");