drivers/iio/adc/mcp320x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
   4  * Copyright (C) 2014 Rose Technology
   5  *         Allan Bendorff Jensen <abj@rosetechnology.dk>
   6  *         Soren Andersen <san@rosetechnology.dk>
   7  *
   8  * Driver for following ADC chips from Microchip Technology's:
   9  * 10 Bit converter
  10  * MCP3001
  11  * MCP3002
  12  * MCP3004
  13  * MCP3008
  14  * ------------
  15  * 12 bit converter
  16  * MCP3201
  17  * MCP3202
  18  * MCP3204
  19  * MCP3208
  20  * ------------
  21  * 13 bit converter
  22  * MCP3301
  23  * ------------
  24  * 22 bit converter
  25  * MCP3550
  26  * MCP3551
  27  * MCP3553
  28  *
  29  * Datasheet can be found here:
  30  * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf  mcp3001
  31  * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf  mcp3002
  32  * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf  mcp3004/08
  33  * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf  mcp3201
  34  * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf  mcp3202
  35  * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf  mcp3204/08
  36  * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf  mcp3301
  37  * http://ww1.microchip.com/downloads/en/DeviceDoc/21950D.pdf  mcp3550/1/3
  38  */
  39
  40 #include <linux/err.h>
  41 #include <linux/delay.h>
  42 #include <linux/spi/spi.h>
  43 #include <linux/module.h>
  44 #include <linux/iio/iio.h>
  45 #include <linux/regulator/consumer.h>
  46
  47 enum {
  48         mcp3001,
  49         mcp3002,
  50         mcp3004,
  51         mcp3008,
  52         mcp3201,
  53         mcp3202,
  54         mcp3204,
  55         mcp3208,
  56         mcp3301,
  57         mcp3550_50,
  58         mcp3550_60,
  59         mcp3551,
  60         mcp3553,
  61 };
  62
  63 struct mcp320x_chip_info {
  64         const struct iio_chan_spec *channels;
  65         unsigned int num_channels;
  66         unsigned int resolution;
  67         unsigned int conv_time; /* usec */
  68 };
  69
  70 /**
  71  * struct mcp320x - Microchip SPI ADC instance
  72  * @spi: SPI slave (parent of the IIO device)
  73  * @msg: SPI message to select a channel and receive a value from the ADC
  74  * @transfer: SPI transfers used by @msg
  75  * @start_conv_msg: SPI message to start a conversion by briefly asserting CS
  76  * @start_conv_transfer: SPI transfer used by @start_conv_msg
  77  * @reg: regulator generating Vref
  78  * @lock: protects read sequences
  79  * @chip_info: ADC properties
  80  * @tx_buf: buffer for @transfer[0] (not used on single-channel converters)
  81  * @rx_buf: buffer for @transfer[1]
  82  */
  83 struct mcp320x {
  84         struct spi_device *spi;
  85         struct spi_message msg;
  86         struct spi_transfer transfer[2];
  87         struct spi_message start_conv_msg;
  88         struct spi_transfer start_conv_transfer;
  89
  90         struct regulator *reg;
  91         struct mutex lock;
  92         const struct mcp320x_chip_info *chip_info;
  93
  94         u8 tx_buf ____cacheline_aligned;
  95         u8 rx_buf[4];
  96 };
  97
  98 static int mcp320x_channel_to_tx_data(int device_index,
  99                         const unsigned int channel, bool differential)
 100 {
 101         int start_bit = 1;
 102
 103         switch (device_index) {
 104         case mcp3002:
 105         case mcp3202:
 106                 return ((start_bit << 4) | (!differential << 3) |
 107                                                         (channel << 2));
 108         case mcp3004:
 109         case mcp3204:
 110         case mcp3008:
 111         case mcp3208:
 112                 return ((start_bit << 6) | (!differential << 5) |
 113                                                         (channel << 2));
 114         default:
 115                 return -EINVAL;
 116         }
 117 }
 118
 119 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
 120                                   bool differential, int device_index, int *val)
 121 {
 122         int ret;
 123
 124         if (adc->chip_info->conv_time) {
 125                 ret = spi_sync(adc->spi, &adc->start_conv_msg);
 126                 if (ret < 0)
 127                         return ret;
 128
 129                 usleep_range(adc->chip_info->conv_time,
 130                              adc->chip_info->conv_time + 100);
 131         }
 132
 133         memset(&adc->rx_buf, 0, sizeof(adc->rx_buf));
 134         if (adc->chip_info->num_channels > 1)
 135                 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel,
 136                                                          differential);
 137
 138         ret = spi_sync(adc->spi, &adc->msg);
 139         if (ret < 0)
 140                 return ret;
 141
 142         switch (device_index) {
 143         case mcp3001:
 144                 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
 145                 return 0;
 146         case mcp3002:
 147         case mcp3004:
 148         case mcp3008:
 149                 *val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
 150                 return 0;
 151         case mcp3201:
 152                 *val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
 153                 return 0;
 154         case mcp3202:
 155         case mcp3204:
 156         case mcp3208:
 157                 *val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
 158                 return 0;
 159         case mcp3301:
 160                 *val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
 161                                     | adc->rx_buf[1], 12);
 162                 return 0;
 163         case mcp3550_50:
 164         case mcp3550_60:
 165         case mcp3551:
 166         case mcp3553: {
 167                 u32 raw = be32_to_cpup((__be32 *)adc->rx_buf);
 168
 169                 if (!(adc->spi->mode & SPI_CPOL))
 170                         raw <<= 1; /* strip Data Ready bit in SPI mode 0,0 */
 171
 172                 /*
 173                  * If the input is within -vref and vref, bit 21 is the sign.
 174                  * Up to 12% overrange or underrange are allowed, in which case
 175                  * bit 23 is the sign and bit 0 to 21 is the value.
 176                  */
 177                 raw >>= 8;
 178                 if (raw & BIT(22) && raw & BIT(23))
 179                         return -EIO; /* cannot have overrange AND underrange */
 180                 else if (raw & BIT(22))
 181                         raw &= ~BIT(22); /* overrange */
 182                 else if (raw & BIT(23) || raw & BIT(21))
 183                         raw |= GENMASK(31, 22); /* underrange or negative */
 184
 185                 *val = (s32)raw;
 186                 return 0;
 187                 }
 188         default:
 189                 return -EINVAL;
 190         }
 191 }
 192
 193 static int mcp320x_read_raw(struct iio_dev *indio_dev,
 194                             struct iio_chan_spec const *channel, int *val,
 195                             int *val2, long mask)
 196 {
 197         struct mcp320x *adc = iio_priv(indio_dev);
 198         int ret = -EINVAL;
 199         int device_index = 0;
 200
 201         mutex_lock(&adc->lock);
 202
 203         device_index = spi_get_device_id(adc->spi)->driver_data;
 204
 205         switch (mask) {
 206         case IIO_CHAN_INFO_RAW:
 207                 ret = mcp320x_adc_conversion(adc, channel->address,
 208                         channel->differential, device_index, val);
 209                 if (ret < 0)
 210                         goto out;
 211
 212                 ret = IIO_VAL_INT;
 213                 break;
 214
 215         case IIO_CHAN_INFO_SCALE:
 216                 ret = regulator_get_voltage(adc->reg);
 217                 if (ret < 0)
 218                         goto out;
 219
 220                 /* convert regulator output voltage to mV */
 221                 *val = ret / 1000;
 222                 *val2 = adc->chip_info->resolution;
 223                 ret = IIO_VAL_FRACTIONAL_LOG2;
 224                 break;
 225         }
 226
 227 out:
 228         mutex_unlock(&adc->lock);
 229
 230         return ret;
 231 }
 232
 233 #define MCP320X_VOLTAGE_CHANNEL(num)                            \
 234         {                                                       \
 235                 .type = IIO_VOLTAGE,                            \
 236                 .indexed = 1,                                   \
 237                 .channel = (num),                               \
 238                 .address = (num),                               \
 239                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
 240                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
 241         }
 242
 243 #define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2)              \
 244         {                                                       \
 245                 .type = IIO_VOLTAGE,                            \
 246                 .indexed = 1,                                   \
 247                 .channel = (chan1),                             \
 248                 .channel2 = (chan2),                            \
 249                 .address = (chan1),                             \
 250                 .differential = 1,                              \
 251                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
 252                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
 253         }
 254
 255 static const struct iio_chan_spec mcp3201_channels[] = {
 256         MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
 257 };
 258
 259 static const struct iio_chan_spec mcp3202_channels[] = {
 260         MCP320X_VOLTAGE_CHANNEL(0),
 261         MCP320X_VOLTAGE_CHANNEL(1),
 262         MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
 263         MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
 264 };
 265
 266 static const struct iio_chan_spec mcp3204_channels[] = {
 267         MCP320X_VOLTAGE_CHANNEL(0),
 268         MCP320X_VOLTAGE_CHANNEL(1),
 269         MCP320X_VOLTAGE_CHANNEL(2),
 270         MCP320X_VOLTAGE_CHANNEL(3),
 271         MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
 272         MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
 273         MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
 274         MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
 275 };
 276
 277 static const struct iio_chan_spec mcp3208_channels[] = {
 278         MCP320X_VOLTAGE_CHANNEL(0),
 279         MCP320X_VOLTAGE_CHANNEL(1),
 280         MCP320X_VOLTAGE_CHANNEL(2),
 281         MCP320X_VOLTAGE_CHANNEL(3),
 282         MCP320X_VOLTAGE_CHANNEL(4),
 283         MCP320X_VOLTAGE_CHANNEL(5),
 284         MCP320X_VOLTAGE_CHANNEL(6),
 285         MCP320X_VOLTAGE_CHANNEL(7),
 286         MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
 287         MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
 288         MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
 289         MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
 290         MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
 291         MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
 292         MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
 293         MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
 294 };
 295
 296 static const struct iio_info mcp320x_info = {
 297         .read_raw = mcp320x_read_raw,
 298 };
 299
 300 static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
 301         [mcp3001] = {
 302                 .channels = mcp3201_channels,
 303                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 304                 .resolution = 10
 305         },
 306         [mcp3002] = {
 307                 .channels = mcp3202_channels,
 308                 .num_channels = ARRAY_SIZE(mcp3202_channels),
 309                 .resolution = 10
 310         },
 311         [mcp3004] = {
 312                 .channels = mcp3204_channels,
 313                 .num_channels = ARRAY_SIZE(mcp3204_channels),
 314                 .resolution = 10
 315         },
 316         [mcp3008] = {
 317                 .channels = mcp3208_channels,
 318                 .num_channels = ARRAY_SIZE(mcp3208_channels),
 319                 .resolution = 10
 320         },
 321         [mcp3201] = {
 322                 .channels = mcp3201_channels,
 323                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 324                 .resolution = 12
 325         },
 326         [mcp3202] = {
 327                 .channels = mcp3202_channels,
 328                 .num_channels = ARRAY_SIZE(mcp3202_channels),
 329                 .resolution = 12
 330         },
 331         [mcp3204] = {
 332                 .channels = mcp3204_channels,
 333                 .num_channels = ARRAY_SIZE(mcp3204_channels),
 334                 .resolution = 12
 335         },
 336         [mcp3208] = {
 337                 .channels = mcp3208_channels,
 338                 .num_channels = ARRAY_SIZE(mcp3208_channels),
 339                 .resolution = 12
 340         },
 341         [mcp3301] = {
 342                 .channels = mcp3201_channels,
 343                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 344                 .resolution = 13
 345         },
 346         [mcp3550_50] = {
 347                 .channels = mcp3201_channels,
 348                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 349                 .resolution = 21,
 350                 /* 2% max deviation + 144 clock periods to exit shutdown */
 351                 .conv_time = 80000 * 1.02 + 144000 / 102.4,
 352         },
 353         [mcp3550_60] = {
 354                 .channels = mcp3201_channels,
 355                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 356                 .resolution = 21,
 357                 .conv_time = 66670 * 1.02 + 144000 / 122.88,
 358         },
 359         [mcp3551] = {
 360                 .channels = mcp3201_channels,
 361                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 362                 .resolution = 21,
 363                 .conv_time = 73100 * 1.02 + 144000 / 112.64,
 364         },
 365         [mcp3553] = {
 366                 .channels = mcp3201_channels,
 367                 .num_channels = ARRAY_SIZE(mcp3201_channels),
 368                 .resolution = 21,
 369                 .conv_time = 16670 * 1.02 + 144000 / 122.88,
 370         },
 371 };
 372
 373 static int mcp320x_probe(struct spi_device *spi)
 374 {
 375         struct iio_dev *indio_dev;
 376         struct mcp320x *adc;
 377         const struct mcp320x_chip_info *chip_info;
 378         int ret, device_index;
 379
 380         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
 381         if (!indio_dev)
 382                 return -ENOMEM;
 383
 384         adc = iio_priv(indio_dev);
 385         adc->spi = spi;
 386
 387         indio_dev->dev.parent = &spi->dev;
 388         indio_dev->dev.of_node = spi->dev.of_node;
 389         indio_dev->name = spi_get_device_id(spi)->name;
 390         indio_dev->modes = INDIO_DIRECT_MODE;
 391         indio_dev->info = &mcp320x_info;
 392         spi_set_drvdata(spi, indio_dev);
 393
 394         device_index = spi_get_device_id(spi)->driver_data;
 395         chip_info = &mcp320x_chip_infos[device_index];
 396         indio_dev->channels = chip_info->channels;
 397         indio_dev->num_channels = chip_info->num_channels;
 398
 399         adc->chip_info = chip_info;
 400
 401         adc->transfer[0].tx_buf = &adc->tx_buf;
 402         adc->transfer[0].len = sizeof(adc->tx_buf);
 403         adc->transfer[1].rx_buf = adc->rx_buf;
 404         adc->transfer[1].len = DIV_ROUND_UP(chip_info->resolution, 8);
 405
 406         if (chip_info->num_channels == 1)
 407                 /* single-channel converters are rx only (no MOSI pin) */
 408                 spi_message_init_with_transfers(&adc->msg,
 409                                                 &adc->transfer[1], 1);
 410         else
 411                 spi_message_init_with_transfers(&adc->msg, adc->transfer,
 412                                                 ARRAY_SIZE(adc->transfer));
 413
 414         switch (device_index) {
 415         case mcp3550_50:
 416         case mcp3550_60:
 417         case mcp3551:
 418         case mcp3553:
 419                 /* rx len increases from 24 to 25 bit in SPI mode 0,0 */
 420                 if (!(spi->mode & SPI_CPOL))
 421                         adc->transfer[1].len++;
 422
 423                 /* conversions are started by asserting CS pin for 8 usec */
 424                 adc->start_conv_transfer.delay_usecs = 8;
 425                 spi_message_init_with_transfers(&adc->start_conv_msg,
 426                                                 &adc->start_conv_transfer, 1);
 427
 428                 /*
 429                  * If CS was previously kept low (continuous conversion mode)
 430                  * and then changed to high, the chip is in shutdown.
 431                  * Sometimes it fails to wake from shutdown and clocks out
 432                  * only 0xffffff.  The magic sequence of performing two
 433                  * conversions without delay between them resets the chip
 434                  * and ensures all subsequent conversions succeed.
 435                  */
 436                 mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
 437                 mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
 438         }
 439
 440         adc->reg = devm_regulator_get(&spi->dev, "vref");
 441         if (IS_ERR(adc->reg))
 442                 return PTR_ERR(adc->reg);
 443
 444         ret = regulator_enable(adc->reg);
 445         if (ret < 0)
 446                 return ret;
 447
 448         mutex_init(&adc->lock);
 449
 450         ret = iio_device_register(indio_dev);
 451         if (ret < 0)
 452                 goto reg_disable;
 453
 454         return 0;
 455
 456 reg_disable:
 457         regulator_disable(adc->reg);
 458
 459         return ret;
 460 }
 461
 462 static int mcp320x_remove(struct spi_device *spi)
 463 {
 464         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 465         struct mcp320x *adc = iio_priv(indio_dev);
 466
 467         iio_device_unregister(indio_dev);
 468         regulator_disable(adc->reg);
 469
 470         return 0;
 471 }
 472
 473 #if defined(CONFIG_OF)
 474 static const struct of_device_id mcp320x_dt_ids[] = {
 475         /* NOTE: The use of compatibles with no vendor prefix is deprecated. */
 476         { .compatible = "mcp3001" },
 477         { .compatible = "mcp3002" },
 478         { .compatible = "mcp3004" },
 479         { .compatible = "mcp3008" },
 480         { .compatible = "mcp3201" },
 481         { .compatible = "mcp3202" },
 482         { .compatible = "mcp3204" },
 483         { .compatible = "mcp3208" },
 484         { .compatible = "mcp3301" },
 485         { .compatible = "microchip,mcp3001" },
 486         { .compatible = "microchip,mcp3002" },
 487         { .compatible = "microchip,mcp3004" },
 488         { .compatible = "microchip,mcp3008" },
 489         { .compatible = "microchip,mcp3201" },
 490         { .compatible = "microchip,mcp3202" },
 491         { .compatible = "microchip,mcp3204" },
 492         { .compatible = "microchip,mcp3208" },
 493         { .compatible = "microchip,mcp3301" },
 494         { .compatible = "microchip,mcp3550-50" },
 495         { .compatible = "microchip,mcp3550-60" },
 496         { .compatible = "microchip,mcp3551" },
 497         { .compatible = "microchip,mcp3553" },
 498         { }
 499 };
 500 MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
 501 #endif
 502
 503 static const struct spi_device_id mcp320x_id[] = {
 504         { "mcp3001", mcp3001 },
 505         { "mcp3002", mcp3002 },
 506         { "mcp3004", mcp3004 },
 507         { "mcp3008", mcp3008 },
 508         { "mcp3201", mcp3201 },
 509         { "mcp3202", mcp3202 },
 510         { "mcp3204", mcp3204 },
 511         { "mcp3208", mcp3208 },
 512         { "mcp3301", mcp3301 },
 513         { "mcp3550-50", mcp3550_50 },
 514         { "mcp3550-60", mcp3550_60 },
 515         { "mcp3551", mcp3551 },
 516         { "mcp3553", mcp3553 },
 517         { }
 518 };
 519 MODULE_DEVICE_TABLE(spi, mcp320x_id);
 520
 521 static struct spi_driver mcp320x_driver = {
 522         .driver = {
 523                 .name = "mcp320x",
 524                 .of_match_table = of_match_ptr(mcp320x_dt_ids),
 525         },
 526         .probe = mcp320x_probe,
 527         .remove = mcp320x_remove,
 528         .id_table = mcp320x_id,
 529 };
 530 module_spi_driver(mcp320x_driver);
 531
 532 MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
 533 MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08 and MCP3550/1/3");
 534 MODULE_LICENSE("GPL v2");