1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
5 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
7 * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
10 #include <linux/module.h>
11 #include <linux/interrupt.h>
12 #include <linux/completion.h>
13 #include <linux/clk.h>
14 #include <linux/spi/spi.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/buffer.h>
17 #include <linux/iio/trigger.h>
18 #include <linux/iio/triggered_buffer.h>
19 #include <linux/iio/trigger_consumer.h>
20 #include <linux/regulator/consumer.h>
22 #define ADC12138_MODE_AUTO_CAL 0x08
23 #define ADC12138_MODE_READ_STATUS 0x0c
24 #define ADC12138_MODE_ACQUISITION_TIME_6 0x0e
25 #define ADC12138_MODE_ACQUISITION_TIME_10 0x4e
26 #define ADC12138_MODE_ACQUISITION_TIME_18 0x8e
27 #define ADC12138_MODE_ACQUISITION_TIME_34 0xce
29 #define ADC12138_STATUS_CAL BIT(6)
38 struct spi_device *spi;
40 /* conversion clock */
42 /* positive analog voltage reference */
43 struct regulator *vref_p;
44 /* negative analog voltage reference */
45 struct regulator *vref_n;
47 struct completion complete;
48 /* The number of cclk periods for the S/H's acquisition time */
49 unsigned int acquisition_time;
51 u8 tx_buf[2] ____cacheline_aligned;
55 #define ADC12138_VOLTAGE_CHANNEL(chan) \
57 .type = IIO_VOLTAGE, \
60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
61 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
62 | BIT(IIO_CHAN_INFO_OFFSET), \
69 .endianness = IIO_BE, \
73 #define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \
75 .type = IIO_VOLTAGE, \
78 .channel2 = (chan2), \
80 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
81 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
82 | BIT(IIO_CHAN_INFO_OFFSET), \
89 .endianness = IIO_BE, \
93 static const struct iio_chan_spec adc12132_channels[] = {
94 ADC12138_VOLTAGE_CHANNEL(0),
95 ADC12138_VOLTAGE_CHANNEL(1),
96 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
97 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
98 IIO_CHAN_SOFT_TIMESTAMP(4),
101 static const struct iio_chan_spec adc12138_channels[] = {
102 ADC12138_VOLTAGE_CHANNEL(0),
103 ADC12138_VOLTAGE_CHANNEL(1),
104 ADC12138_VOLTAGE_CHANNEL(2),
105 ADC12138_VOLTAGE_CHANNEL(3),
106 ADC12138_VOLTAGE_CHANNEL(4),
107 ADC12138_VOLTAGE_CHANNEL(5),
108 ADC12138_VOLTAGE_CHANNEL(6),
109 ADC12138_VOLTAGE_CHANNEL(7),
110 ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
111 ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
112 ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
113 ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
114 ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
115 ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
116 ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
117 ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
118 IIO_CHAN_SOFT_TIMESTAMP(16),
121 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
122 void *rx_buf, int len)
124 struct spi_transfer xfer = {
125 .tx_buf = adc->tx_buf,
126 .rx_buf = adc->rx_buf,
131 /* Skip unused bits for ADC12130 and ADC12132 */
132 if (adc->id != adc12138)
133 mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
135 adc->tx_buf[0] = mode;
137 ret = spi_sync_transfer(adc->spi, &xfer, 1);
141 memcpy(rx_buf, adc->rx_buf, len);
146 static int adc12138_read_status(struct adc12138 *adc)
151 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
156 return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
159 static int __adc12138_start_conv(struct adc12138 *adc,
160 struct iio_chan_spec const *channel,
164 static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
165 u8 mode = (ch_to_mux[channel->channel] << 4) |
166 (channel->differential ? 0 : 0x80);
168 return adc12138_mode_programming(adc, mode, data, len);
171 static int adc12138_start_conv(struct adc12138 *adc,
172 struct iio_chan_spec const *channel)
176 return __adc12138_start_conv(adc, channel, &trash, 1);
179 static int adc12138_start_and_read_conv(struct adc12138 *adc,
180 struct iio_chan_spec const *channel,
183 return __adc12138_start_conv(adc, channel, data, 2);
186 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
188 /* Issue a read status instruction and read previous conversion data */
189 return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
190 value, sizeof(*value));
193 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
195 if (!wait_for_completion_timeout(&adc->complete, timeout))
201 static int adc12138_adc_conversion(struct adc12138 *adc,
202 struct iio_chan_spec const *channel,
207 reinit_completion(&adc->complete);
209 ret = adc12138_start_conv(adc, channel);
213 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
217 return adc12138_read_conv_data(adc, value);
220 static int adc12138_read_raw(struct iio_dev *iio,
221 struct iio_chan_spec const *channel, int *value,
222 int *shift, long mask)
224 struct adc12138 *adc = iio_priv(iio);
229 case IIO_CHAN_INFO_RAW:
230 mutex_lock(&adc->lock);
231 ret = adc12138_adc_conversion(adc, channel, &data);
232 mutex_unlock(&adc->lock);
236 *value = sign_extend32(be16_to_cpu(data) >> 3, 12);
239 case IIO_CHAN_INFO_SCALE:
240 ret = regulator_get_voltage(adc->vref_p);
245 if (!IS_ERR(adc->vref_n)) {
246 ret = regulator_get_voltage(adc->vref_n);
252 /* convert regulator output voltage to mV */
254 *shift = channel->scan_type.realbits - 1;
256 return IIO_VAL_FRACTIONAL_LOG2;
257 case IIO_CHAN_INFO_OFFSET:
258 if (!IS_ERR(adc->vref_n)) {
259 *value = regulator_get_voltage(adc->vref_n);
266 /* convert regulator output voltage to mV */
275 static const struct iio_info adc12138_info = {
276 .read_raw = adc12138_read_raw,
279 static int adc12138_init(struct adc12138 *adc)
286 reinit_completion(&adc->complete);
288 ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
292 /* data output at this time has no significance */
293 status = adc12138_read_status(adc);
297 adc12138_wait_eoc(adc, msecs_to_jiffies(100));
299 status = adc12138_read_status(adc);
300 if (status & ADC12138_STATUS_CAL) {
301 dev_warn(&adc->spi->dev,
302 "Auto Cal sequence is still in progress: %#x\n",
307 switch (adc->acquisition_time) {
309 mode = ADC12138_MODE_ACQUISITION_TIME_6;
312 mode = ADC12138_MODE_ACQUISITION_TIME_10;
315 mode = ADC12138_MODE_ACQUISITION_TIME_18;
318 mode = ADC12138_MODE_ACQUISITION_TIME_34;
324 return adc12138_mode_programming(adc, mode, &trash, 1);
327 static irqreturn_t adc12138_trigger_handler(int irq, void *p)
329 struct iio_poll_func *pf = p;
330 struct iio_dev *indio_dev = pf->indio_dev;
331 struct adc12138 *adc = iio_priv(indio_dev);
332 __be16 data[20] = { }; /* 16x 2 bytes ADC data + 8 bytes timestamp */
338 mutex_lock(&adc->lock);
340 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
341 indio_dev->masklength) {
342 const struct iio_chan_spec *scan_chan =
343 &indio_dev->channels[scan_index];
345 reinit_completion(&adc->complete);
347 ret = adc12138_start_and_read_conv(adc, scan_chan,
348 i ? &data[i - 1] : &trash);
350 dev_warn(&adc->spi->dev,
351 "failed to start conversion\n");
355 ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
357 dev_warn(&adc->spi->dev, "wait eoc timeout\n");
365 ret = adc12138_read_conv_data(adc, &data[i - 1]);
367 dev_warn(&adc->spi->dev,
368 "failed to get conversion data\n");
373 iio_push_to_buffers_with_timestamp(indio_dev, data,
374 iio_get_time_ns(indio_dev));
376 mutex_unlock(&adc->lock);
378 iio_trigger_notify_done(indio_dev->trig);
383 static irqreturn_t adc12138_eoc_handler(int irq, void *p)
385 struct iio_dev *indio_dev = p;
386 struct adc12138 *adc = iio_priv(indio_dev);
388 complete(&adc->complete);
393 static int adc12138_probe(struct spi_device *spi)
395 struct iio_dev *indio_dev;
396 struct adc12138 *adc;
399 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
403 adc = iio_priv(indio_dev);
405 adc->id = spi_get_device_id(spi)->driver_data;
406 mutex_init(&adc->lock);
407 init_completion(&adc->complete);
409 indio_dev->name = spi_get_device_id(spi)->name;
410 indio_dev->dev.parent = &spi->dev;
411 indio_dev->info = &adc12138_info;
412 indio_dev->modes = INDIO_DIRECT_MODE;
417 indio_dev->channels = adc12132_channels;
418 indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
421 indio_dev->channels = adc12138_channels;
422 indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
428 ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time",
429 &adc->acquisition_time);
431 adc->acquisition_time = 10;
433 adc->cclk = devm_clk_get(&spi->dev, NULL);
434 if (IS_ERR(adc->cclk))
435 return PTR_ERR(adc->cclk);
437 adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
438 if (IS_ERR(adc->vref_p))
439 return PTR_ERR(adc->vref_p);
441 adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
442 if (IS_ERR(adc->vref_n)) {
444 * Assume vref_n is 0V if an optional regulator is not
445 * specified, otherwise return the error code.
447 ret = PTR_ERR(adc->vref_n);
452 ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
453 IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
457 ret = clk_prepare_enable(adc->cclk);
461 ret = regulator_enable(adc->vref_p);
463 goto err_clk_disable;
465 if (!IS_ERR(adc->vref_n)) {
466 ret = regulator_enable(adc->vref_n);
468 goto err_vref_p_disable;
471 ret = adc12138_init(adc);
473 goto err_vref_n_disable;
475 spi_set_drvdata(spi, indio_dev);
477 ret = iio_triggered_buffer_setup(indio_dev, NULL,
478 adc12138_trigger_handler, NULL);
480 goto err_vref_n_disable;
482 ret = iio_device_register(indio_dev);
484 goto err_buffer_cleanup;
488 iio_triggered_buffer_cleanup(indio_dev);
490 if (!IS_ERR(adc->vref_n))
491 regulator_disable(adc->vref_n);
493 regulator_disable(adc->vref_p);
495 clk_disable_unprepare(adc->cclk);
500 static int adc12138_remove(struct spi_device *spi)
502 struct iio_dev *indio_dev = spi_get_drvdata(spi);
503 struct adc12138 *adc = iio_priv(indio_dev);
505 iio_device_unregister(indio_dev);
506 iio_triggered_buffer_cleanup(indio_dev);
507 if (!IS_ERR(adc->vref_n))
508 regulator_disable(adc->vref_n);
509 regulator_disable(adc->vref_p);
510 clk_disable_unprepare(adc->cclk);
517 static const struct of_device_id adc12138_dt_ids[] = {
518 { .compatible = "ti,adc12130", },
519 { .compatible = "ti,adc12132", },
520 { .compatible = "ti,adc12138", },
523 MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
527 static const struct spi_device_id adc12138_id[] = {
528 { "adc12130", adc12130 },
529 { "adc12132", adc12132 },
530 { "adc12138", adc12138 },
533 MODULE_DEVICE_TABLE(spi, adc12138_id);
535 static struct spi_driver adc12138_driver = {
538 .of_match_table = of_match_ptr(adc12138_dt_ids),
540 .probe = adc12138_probe,
541 .remove = adc12138_remove,
542 .id_table = adc12138_id,
544 module_spi_driver(adc12138_driver);
546 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
547 MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
548 MODULE_LICENSE("GPL v2");