1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5592R Digital <-> Analog converters driver
5 * Copyright 2014-2016 Analog Devices Inc.
6 * Author: Paul Cercueil <paul.cercueil@analog.com>
9 #include <linux/bitops.h>
10 #include <linux/delay.h>
11 #include <linux/iio/iio.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/property.h>
20 #include <dt-bindings/iio/adi,ad5592r.h>
22 #include "ad5592r-base.h"
24 static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
26 struct ad5592r_state *st = gpiochip_get_data(chip);
30 mutex_lock(&st->gpio_lock);
32 if (st->gpio_out & BIT(offset))
35 ret = st->ops->gpio_read(st, &val);
37 mutex_unlock(&st->gpio_lock);
42 return !!(val & BIT(offset));
45 static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
47 struct ad5592r_state *st = gpiochip_get_data(chip);
49 mutex_lock(&st->gpio_lock);
52 st->gpio_val |= BIT(offset);
54 st->gpio_val &= ~BIT(offset);
56 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
58 mutex_unlock(&st->gpio_lock);
61 static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
63 struct ad5592r_state *st = gpiochip_get_data(chip);
66 mutex_lock(&st->gpio_lock);
68 st->gpio_out &= ~BIT(offset);
69 st->gpio_in |= BIT(offset);
71 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
75 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
78 mutex_unlock(&st->gpio_lock);
83 static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
84 unsigned offset, int value)
86 struct ad5592r_state *st = gpiochip_get_data(chip);
89 mutex_lock(&st->gpio_lock);
92 st->gpio_val |= BIT(offset);
94 st->gpio_val &= ~BIT(offset);
96 st->gpio_in &= ~BIT(offset);
97 st->gpio_out |= BIT(offset);
99 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
103 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
107 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
110 mutex_unlock(&st->gpio_lock);
115 static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
117 struct ad5592r_state *st = gpiochip_get_data(chip);
119 if (!(st->gpio_map & BIT(offset))) {
120 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
128 static int ad5592r_gpio_init(struct ad5592r_state *st)
133 st->gpiochip.label = dev_name(st->dev);
134 st->gpiochip.base = -1;
135 st->gpiochip.ngpio = 8;
136 st->gpiochip.parent = st->dev;
137 st->gpiochip.can_sleep = true;
138 st->gpiochip.direction_input = ad5592r_gpio_direction_input;
139 st->gpiochip.direction_output = ad5592r_gpio_direction_output;
140 st->gpiochip.get = ad5592r_gpio_get;
141 st->gpiochip.set = ad5592r_gpio_set;
142 st->gpiochip.request = ad5592r_gpio_request;
143 st->gpiochip.owner = THIS_MODULE;
145 mutex_init(&st->gpio_lock);
147 return gpiochip_add_data(&st->gpiochip, st);
150 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
153 gpiochip_remove(&st->gpiochip);
156 static int ad5592r_reset(struct ad5592r_state *st)
158 struct gpio_desc *gpio;
159 struct iio_dev *iio_dev = iio_priv_to_dev(st);
161 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
163 return PTR_ERR(gpio);
167 gpiod_set_value(gpio, 1);
169 mutex_lock(&iio_dev->mlock);
170 /* Writing this magic value resets the device */
171 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
172 mutex_unlock(&iio_dev->mlock);
180 static int ad5592r_get_vref(struct ad5592r_state *st)
185 ret = regulator_get_voltage(st->reg);
195 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
197 const struct ad5592r_rw_ops *ops = st->ops;
200 struct iio_dev *iio_dev = iio_priv_to_dev(st);
201 u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
204 for (i = 0; i < st->num_channels; i++) {
205 switch (st->channel_modes[i]) {
214 case CH_MODE_DAC_AND_ADC:
220 st->gpio_map |= BIT(i);
221 st->gpio_in |= BIT(i); /* Default to input */
227 switch (st->channel_offstate[i]) {
228 case CH_OFFSTATE_OUT_TRISTATE:
232 case CH_OFFSTATE_OUT_LOW:
233 st->gpio_out |= BIT(i);
236 case CH_OFFSTATE_OUT_HIGH:
237 st->gpio_out |= BIT(i);
238 st->gpio_val |= BIT(i);
241 case CH_OFFSTATE_PULLDOWN:
250 mutex_lock(&iio_dev->mlock);
252 /* Pull down unused pins to GND */
253 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
257 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
261 /* Configure pins that we use */
262 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
266 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
270 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
274 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
278 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
282 /* Verify that we can read back at least one register */
283 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
284 if (!ret && (read_back & 0xff) != adc)
288 mutex_unlock(&iio_dev->mlock);
292 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
296 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
297 st->channel_modes[i] = CH_MODE_UNUSED;
299 return ad5592r_set_channel_modes(st);
302 static int ad5592r_write_raw(struct iio_dev *iio_dev,
303 struct iio_chan_spec const *chan, int val, int val2, long mask)
305 struct ad5592r_state *st = iio_priv(iio_dev);
309 case IIO_CHAN_INFO_RAW:
311 if (val >= (1 << chan->scan_type.realbits) || val < 0)
317 mutex_lock(&iio_dev->mlock);
318 ret = st->ops->write_dac(st, chan->channel, val);
320 st->cached_dac[chan->channel] = val;
321 mutex_unlock(&iio_dev->mlock);
323 case IIO_CHAN_INFO_SCALE:
324 if (chan->type == IIO_VOLTAGE) {
327 if (val == st->scale_avail[0][0] &&
328 val2 == st->scale_avail[0][1])
330 else if (val == st->scale_avail[1][0] &&
331 val2 == st->scale_avail[1][1])
336 mutex_lock(&iio_dev->mlock);
338 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
339 &st->cached_gp_ctrl);
341 mutex_unlock(&iio_dev->mlock);
347 st->cached_gp_ctrl |=
348 AD5592R_REG_CTRL_DAC_RANGE;
350 st->cached_gp_ctrl &=
351 ~AD5592R_REG_CTRL_DAC_RANGE;
354 st->cached_gp_ctrl |=
355 AD5592R_REG_CTRL_ADC_RANGE;
357 st->cached_gp_ctrl &=
358 ~AD5592R_REG_CTRL_ADC_RANGE;
361 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
363 mutex_unlock(&iio_dev->mlock);
375 static int ad5592r_read_raw(struct iio_dev *iio_dev,
376 struct iio_chan_spec const *chan,
377 int *val, int *val2, long m)
379 struct ad5592r_state *st = iio_priv(iio_dev);
384 case IIO_CHAN_INFO_RAW:
385 mutex_lock(&iio_dev->mlock);
388 ret = st->ops->read_adc(st, chan->channel, &read_val);
392 if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
393 dev_err(st->dev, "Error while reading channel %u\n",
399 read_val &= GENMASK(11, 0);
402 read_val = st->cached_dac[chan->channel];
405 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
406 chan->channel, read_val);
408 *val = (int) read_val;
411 case IIO_CHAN_INFO_SCALE:
412 *val = ad5592r_get_vref(st);
414 if (chan->type == IIO_TEMP) {
415 s64 tmp = *val * (3767897513LL / 25LL);
416 *val = div_s64_rem(tmp, 1000000000LL, val2);
418 ret = IIO_VAL_INT_PLUS_MICRO;
422 mutex_lock(&iio_dev->mlock);
425 mult = !!(st->cached_gp_ctrl &
426 AD5592R_REG_CTRL_DAC_RANGE);
428 mult = !!(st->cached_gp_ctrl &
429 AD5592R_REG_CTRL_ADC_RANGE);
433 *val2 = chan->scan_type.realbits;
434 ret = IIO_VAL_FRACTIONAL_LOG2;
437 case IIO_CHAN_INFO_OFFSET:
438 ret = ad5592r_get_vref(st);
440 mutex_lock(&iio_dev->mlock);
442 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
443 *val = (-34365 * 25) / ret;
445 *val = (-75365 * 25) / ret;
453 mutex_unlock(&iio_dev->mlock);
457 static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
458 struct iio_chan_spec const *chan, long mask)
461 case IIO_CHAN_INFO_SCALE:
462 return IIO_VAL_INT_PLUS_NANO;
465 return IIO_VAL_INT_PLUS_MICRO;
471 static const struct iio_info ad5592r_info = {
472 .read_raw = ad5592r_read_raw,
473 .write_raw = ad5592r_write_raw,
474 .write_raw_get_fmt = ad5592r_write_raw_get_fmt,
477 static ssize_t ad5592r_show_scale_available(struct iio_dev *iio_dev,
479 const struct iio_chan_spec *chan,
482 struct ad5592r_state *st = iio_priv(iio_dev);
484 return sprintf(buf, "%d.%09u %d.%09u\n",
485 st->scale_avail[0][0], st->scale_avail[0][1],
486 st->scale_avail[1][0], st->scale_avail[1][1]);
489 static struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
491 .name = "scale_available",
492 .read = ad5592r_show_scale_available,
498 static void ad5592r_setup_channel(struct iio_dev *iio_dev,
499 struct iio_chan_spec *chan, bool output, unsigned id)
501 chan->type = IIO_VOLTAGE;
503 chan->output = output;
505 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
506 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
507 chan->scan_type.sign = 'u';
508 chan->scan_type.realbits = 12;
509 chan->scan_type.storagebits = 16;
510 chan->ext_info = ad5592r_ext_info;
513 static int ad5592r_alloc_channels(struct ad5592r_state *st)
515 unsigned i, curr_channel = 0,
516 num_channels = st->num_channels;
517 struct iio_dev *iio_dev = iio_priv_to_dev(st);
518 struct iio_chan_spec *channels;
519 struct fwnode_handle *child;
523 device_for_each_child_node(st->dev, child) {
524 ret = fwnode_property_read_u32(child, "reg", ®);
525 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
528 ret = fwnode_property_read_u32(child, "adi,mode", &tmp);
530 st->channel_modes[reg] = tmp;
532 fwnode_property_read_u32(child, "adi,off-state", &tmp);
534 st->channel_offstate[reg] = tmp;
537 channels = devm_kcalloc(st->dev,
538 1 + 2 * num_channels, sizeof(*channels),
543 for (i = 0; i < num_channels; i++) {
544 switch (st->channel_modes[i]) {
546 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
552 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
557 case CH_MODE_DAC_AND_ADC:
558 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
561 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
571 channels[curr_channel].type = IIO_TEMP;
572 channels[curr_channel].channel = 8;
573 channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
574 BIT(IIO_CHAN_INFO_SCALE) |
575 BIT(IIO_CHAN_INFO_OFFSET);
578 iio_dev->num_channels = curr_channel;
579 iio_dev->channels = channels;
584 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
586 s64 tmp = (s64)vref_mV * 1000000000LL >> 12;
588 st->scale_avail[0][0] =
589 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
590 st->scale_avail[1][0] =
591 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
594 int ad5592r_probe(struct device *dev, const char *name,
595 const struct ad5592r_rw_ops *ops)
597 struct iio_dev *iio_dev;
598 struct ad5592r_state *st;
601 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
605 st = iio_priv(iio_dev);
608 st->num_channels = 8;
609 dev_set_drvdata(dev, iio_dev);
611 st->reg = devm_regulator_get_optional(dev, "vref");
612 if (IS_ERR(st->reg)) {
613 if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node)
614 return PTR_ERR(st->reg);
618 ret = regulator_enable(st->reg);
623 iio_dev->dev.parent = dev;
624 iio_dev->name = name;
625 iio_dev->info = &ad5592r_info;
626 iio_dev->modes = INDIO_DIRECT_MODE;
628 ad5592r_init_scales(st, ad5592r_get_vref(st));
630 ret = ad5592r_reset(st);
632 goto error_disable_reg;
634 ret = ops->reg_write(st, AD5592R_REG_PD,
635 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
637 goto error_disable_reg;
639 ret = ad5592r_alloc_channels(st);
641 goto error_disable_reg;
643 ret = ad5592r_set_channel_modes(st);
645 goto error_reset_ch_modes;
647 ret = iio_device_register(iio_dev);
649 goto error_reset_ch_modes;
651 ret = ad5592r_gpio_init(st);
653 goto error_dev_unregister;
657 error_dev_unregister:
658 iio_device_unregister(iio_dev);
660 error_reset_ch_modes:
661 ad5592r_reset_channel_modes(st);
665 regulator_disable(st->reg);
669 EXPORT_SYMBOL_GPL(ad5592r_probe);
671 int ad5592r_remove(struct device *dev)
673 struct iio_dev *iio_dev = dev_get_drvdata(dev);
674 struct ad5592r_state *st = iio_priv(iio_dev);
676 iio_device_unregister(iio_dev);
677 ad5592r_reset_channel_modes(st);
678 ad5592r_gpio_cleanup(st);
681 regulator_disable(st->reg);
685 EXPORT_SYMBOL_GPL(ad5592r_remove);
687 MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
688 MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
689 MODULE_LICENSE("GPL v2");