drivers/iio/gyro/fxas21002c.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Driver for NXP FXAS21002C Gyroscope - Header
   4  *
   5  * Copyright (C) 2019 Linaro Ltd.
   6  */
   7
   8 #ifndef FXAS21002C_H_
   9 #define FXAS21002C_H_
  10
  11 #include <linux/regmap.h>
  12
  13 #define FXAS21002C_REG_STATUS           0x00
  14 #define FXAS21002C_REG_OUT_X_MSB        0x01
  15 #define FXAS21002C_REG_OUT_X_LSB        0x02
  16 #define FXAS21002C_REG_OUT_Y_MSB        0x03
  17 #define FXAS21002C_REG_OUT_Y_LSB        0x04
  18 #define FXAS21002C_REG_OUT_Z_MSB        0x05
  19 #define FXAS21002C_REG_OUT_Z_LSB        0x06
  20 #define FXAS21002C_REG_DR_STATUS        0x07
  21 #define FXAS21002C_REG_F_STATUS         0x08
  22 #define FXAS21002C_REG_F_SETUP          0x09
  23 #define FXAS21002C_REG_F_EVENT          0x0A
  24 #define FXAS21002C_REG_INT_SRC_FLAG     0x0B
  25 #define FXAS21002C_REG_WHO_AM_I         0x0C
  26 #define FXAS21002C_REG_CTRL0            0x0D
  27 #define FXAS21002C_REG_RT_CFG           0x0E
  28 #define FXAS21002C_REG_RT_SRC           0x0F
  29 #define FXAS21002C_REG_RT_THS           0x10
  30 #define FXAS21002C_REG_RT_COUNT         0x11
  31 #define FXAS21002C_REG_TEMP             0x12
  32 #define FXAS21002C_REG_CTRL1            0x13
  33 #define FXAS21002C_REG_CTRL2            0x14
  34 #define FXAS21002C_REG_CTRL3            0x15
  35
  36 enum fxas21002c_fields {
  37         F_DR_STATUS,
  38         F_OUT_X_MSB,
  39         F_OUT_X_LSB,
  40         F_OUT_Y_MSB,
  41         F_OUT_Y_LSB,
  42         F_OUT_Z_MSB,
  43         F_OUT_Z_LSB,
  44         /* DR_STATUS */
  45         F_ZYX_OW, F_Z_OW, F_Y_OW, F_X_OW, F_ZYX_DR, F_Z_DR, F_Y_DR, F_X_DR,
  46         /* F_STATUS */
  47         F_OVF, F_WMKF, F_CNT,
  48         /* F_SETUP */
  49         F_MODE, F_WMRK,
  50         /* F_EVENT */
  51         F_EVENT, FE_TIME,
  52         /* INT_SOURCE_FLAG */
  53         F_BOOTEND, F_SRC_FIFO, F_SRC_RT, F_SRC_DRDY,
  54         /* WHO_AM_I */
  55         F_WHO_AM_I,
  56         /* CTRL_REG0 */
  57         F_BW, F_SPIW, F_SEL, F_HPF_EN, F_FS,
  58         /* RT_CFG */
  59         F_ELE, F_ZTEFE, F_YTEFE, F_XTEFE,
  60         /* RT_SRC */
  61         F_EA, F_ZRT, F_ZRT_POL, F_YRT, F_YRT_POL, F_XRT, F_XRT_POL,
  62         /* RT_THS */
  63         F_DBCNTM, F_THS,
  64         /* RT_COUNT */
  65         F_RT_COUNT,
  66         /* TEMP */
  67         F_TEMP,
  68         /* CTRL_REG1 */
  69         F_RST, F_ST, F_DR, F_ACTIVE, F_READY,
  70         /* CTRL_REG2 */
  71         F_INT_CFG_FIFO, F_INT_EN_FIFO, F_INT_CFG_RT, F_INT_EN_RT,
  72         F_INT_CFG_DRDY, F_INT_EN_DRDY, F_IPOL, F_PP_OD,
  73         /* CTRL_REG3 */
  74         F_WRAPTOONE, F_EXTCTRLEN, F_FS_DOUBLE,
  75         /* MAX FIELDS */
  76         F_MAX_FIELDS,
  77 };
  78
  79 static const struct reg_field fxas21002c_reg_fields[] = {
  80         [F_DR_STATUS]           = REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
  81         [F_OUT_X_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
  82         [F_OUT_X_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
  83         [F_OUT_Y_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
  84         [F_OUT_Y_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
  85         [F_OUT_Z_MSB]           = REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
  86         [F_OUT_Z_LSB]           = REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
  87         [F_ZYX_OW]              = REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
  88         [F_Z_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
  89         [F_Y_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
  90         [F_X_OW]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
  91         [F_ZYX_DR]              = REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
  92         [F_Z_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
  93         [F_Y_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
  94         [F_X_DR]                = REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
  95         [F_OVF]                 = REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
  96         [F_WMKF]                = REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
  97         [F_CNT]                 = REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
  98         [F_MODE]                = REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
  99         [F_WMRK]                = REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
 100         [F_EVENT]               = REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
 101         [FE_TIME]               = REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
 102         [F_BOOTEND]             = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
 103         [F_SRC_FIFO]            = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
 104         [F_SRC_RT]              = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
 105         [F_SRC_DRDY]            = REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
 106         [F_WHO_AM_I]            = REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
 107         [F_BW]                  = REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
 108         [F_SPIW]                = REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
 109         [F_SEL]                 = REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
 110         [F_HPF_EN]              = REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
 111         [F_FS]                  = REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
 112         [F_ELE]                 = REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
 113         [F_ZTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
 114         [F_YTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
 115         [F_XTEFE]               = REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
 116         [F_EA]                  = REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
 117         [F_ZRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
 118         [F_ZRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
 119         [F_YRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
 120         [F_YRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
 121         [F_XRT]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
 122         [F_XRT_POL]             = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
 123         [F_DBCNTM]              = REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
 124         [F_THS]                 = REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
 125         [F_RT_COUNT]            = REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
 126         [F_TEMP]                = REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
 127         [F_RST]                 = REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
 128         [F_ST]                  = REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
 129         [F_DR]                  = REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
 130         [F_ACTIVE]              = REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
 131         [F_READY]               = REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
 132         [F_INT_CFG_FIFO]        = REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
 133         [F_INT_EN_FIFO]         = REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
 134         [F_INT_CFG_RT]          = REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
 135         [F_INT_EN_RT]           = REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
 136         [F_INT_CFG_DRDY]        = REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
 137         [F_INT_EN_DRDY]         = REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
 138         [F_IPOL]                = REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
 139         [F_PP_OD]               = REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
 140         [F_WRAPTOONE]           = REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
 141         [F_EXTCTRLEN]           = REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
 142         [F_FS_DOUBLE]           = REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
 143 };
 144
 145 extern const struct dev_pm_ops fxas21002c_pm_ops;
 146
 147 int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
 148                           const char *name);
 149 void fxas21002c_core_remove(struct device *dev);
 150 #endif