drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * STMicroelectronics st_lsm6dsx sensor driver
   4  *
   5  * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
   6  * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
   7  * interface standard output.
   8  * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
   9  * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
  10  * +-125/+-245/+-500/+-1000/+-2000 dps
  11  * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
  12  * allowing dynamic batching of sensor data.
  13  * LSM9DSx series is similar but includes an additional magnetometer, handled
  14  * by a different driver.
  15  *
  16  * Supported sensors:
  17  * - LSM6DS3:
  18  *   - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
  19  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  20  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  21  *   - FIFO size: 8KB
  22  *
  23  * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
  24  *   - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
  25  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  26  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  27  *   - FIFO size: 4KB
  28  *
  29  * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX:
  30  *   - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
  31  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  32  *   - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
  33  *   - FIFO size: 3KB
  34  *
  35  * - LSM9DS1/LSM6DS0:
  36  *   - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
  37  *   - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
  38  *   - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
  39  *   - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
  40  *   - FIFO size: 32
  41  *
  42  * Copyright 2016 STMicroelectronics Inc.
  43  *
  44  * Lorenzo Bianconi <lorenzo.bianconi@st.com>
  45  * Denis Ciocca <denis.ciocca@st.com>
  46  */
  47
  48 #include <linux/kernel.h>
  49 #include <linux/module.h>
  50 #include <linux/delay.h>
  51 #include <linux/iio/events.h>
  52 #include <linux/iio/iio.h>
  53 #include <linux/iio/sysfs.h>
  54 #include <linux/interrupt.h>
  55 #include <linux/irq.h>
  56 #include <linux/pm.h>
  57 #include <linux/property.h>
  58 #include <linux/regmap.h>
  59 #include <linux/bitfield.h>
  60
  61 #include <linux/platform_data/st_sensors_pdata.h>
  62
  63 #include "st_lsm6dsx.h"
  64
  65 #define ST_LSM6DSX_REG_WHOAMI_ADDR              0x0f
  66
  67 #define ST_LSM6DSX_TS_SENSITIVITY               25000UL /* 25us */
  68
  69 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
  70         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
  71         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
  72         ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
  73         IIO_CHAN_SOFT_TIMESTAMP(3),
  74 };
  75
  76 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
  77         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
  78         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
  79         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
  80         IIO_CHAN_SOFT_TIMESTAMP(3),
  81 };
  82
  83 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
  84         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
  85         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
  86         ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
  87         IIO_CHAN_SOFT_TIMESTAMP(3),
  88 };
  89
  90 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
  91         {
  92                 .wai = 0x68,
  93                 .reset = {
  94                         .addr = 0x22,
  95                         .mask = BIT(0),
  96                 },
  97                 .boot = {
  98                         .addr = 0x22,
  99                         .mask = BIT(7),
 100                 },
 101                 .bdu = {
 102                         .addr = 0x22,
 103                         .mask = BIT(6),
 104                 },
 105                 .max_fifo_size = 32,
 106                 .id = {
 107                         {
 108                                 .hw_id = ST_LSM9DS1_ID,
 109                                 .name = ST_LSM9DS1_DEV_NAME,
 110                         }, {
 111                                 .hw_id = ST_LSM6DS0_ID,
 112                                 .name = ST_LSM6DS0_DEV_NAME,
 113                         },
 114                 },
 115                 .channels = {
 116                         [ST_LSM6DSX_ID_ACC] = {
 117                                 .chan = st_lsm6dsx_acc_channels,
 118                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 119                         },
 120                         [ST_LSM6DSX_ID_GYRO] = {
 121                                 .chan = st_lsm6ds0_gyro_channels,
 122                                 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
 123                         },
 124                 },
 125                 .odr_table = {
 126                         [ST_LSM6DSX_ID_ACC] = {
 127                                 .reg = {
 128                                         .addr = 0x20,
 129                                         .mask = GENMASK(7, 5),
 130                                 },
 131                                 .odr_avl[0] = {  10000, 0x01 },
 132                                 .odr_avl[1] = {  50000, 0x02 },
 133                                 .odr_avl[2] = { 119000, 0x03 },
 134                                 .odr_avl[3] = { 238000, 0x04 },
 135                                 .odr_avl[4] = { 476000, 0x05 },
 136                                 .odr_avl[5] = { 952000, 0x06 },
 137                                 .odr_len = 6,
 138                         },
 139                         [ST_LSM6DSX_ID_GYRO] = {
 140                                 .reg = {
 141                                         .addr = 0x10,
 142                                         .mask = GENMASK(7, 5),
 143                                 },
 144                                 .odr_avl[0] = {  14900, 0x01 },
 145                                 .odr_avl[1] = {  59500, 0x02 },
 146                                 .odr_avl[2] = { 119000, 0x03 },
 147                                 .odr_avl[3] = { 238000, 0x04 },
 148                                 .odr_avl[4] = { 476000, 0x05 },
 149                                 .odr_avl[5] = { 952000, 0x06 },
 150                                 .odr_len = 6,
 151                         },
 152                 },
 153                 .fs_table = {
 154                         [ST_LSM6DSX_ID_ACC] = {
 155                                 .reg = {
 156                                         .addr = 0x20,
 157                                         .mask = GENMASK(4, 3),
 158                                 },
 159                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
 160                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
 161                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
 162                                 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 },
 163                                 .fs_len = 4,
 164                         },
 165                         [ST_LSM6DSX_ID_GYRO] = {
 166                                 .reg = {
 167                                         .addr = 0x10,
 168                                         .mask = GENMASK(4, 3),
 169                                 },
 170
 171                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
 172                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
 173                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 174                                 .fs_len = 3,
 175                         },
 176                 },
 177                 .irq_config = {
 178                         .irq1 = {
 179                                 .addr = 0x0c,
 180                                 .mask = BIT(3),
 181                         },
 182                         .irq2 = {
 183                                 .addr = 0x0d,
 184                                 .mask = BIT(3),
 185                         },
 186                         .hla = {
 187                                 .addr = 0x22,
 188                                 .mask = BIT(5),
 189                         },
 190                         .od = {
 191                                 .addr = 0x22,
 192                                 .mask = BIT(4),
 193                         },
 194                 },
 195         },
 196         {
 197                 .wai = 0x69,
 198                 .reset = {
 199                         .addr = 0x12,
 200                         .mask = BIT(0),
 201                 },
 202                 .boot = {
 203                         .addr = 0x12,
 204                         .mask = BIT(7),
 205                 },
 206                 .bdu = {
 207                         .addr = 0x12,
 208                         .mask = BIT(6),
 209                 },
 210                 .max_fifo_size = 1365,
 211                 .id = {
 212                         {
 213                                 .hw_id = ST_LSM6DS3_ID,
 214                                 .name = ST_LSM6DS3_DEV_NAME,
 215                         },
 216                 },
 217                 .channels = {
 218                         [ST_LSM6DSX_ID_ACC] = {
 219                                 .chan = st_lsm6dsx_acc_channels,
 220                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 221                         },
 222                         [ST_LSM6DSX_ID_GYRO] = {
 223                                 .chan = st_lsm6dsx_gyro_channels,
 224                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 225                         },
 226                 },
 227                 .odr_table = {
 228                         [ST_LSM6DSX_ID_ACC] = {
 229                                 .reg = {
 230                                         .addr = 0x10,
 231                                         .mask = GENMASK(7, 4),
 232                                 },
 233                                 .odr_avl[0] = {  12500, 0x01 },
 234                                 .odr_avl[1] = {  26000, 0x02 },
 235                                 .odr_avl[2] = {  52000, 0x03 },
 236                                 .odr_avl[3] = { 104000, 0x04 },
 237                                 .odr_avl[4] = { 208000, 0x05 },
 238                                 .odr_avl[5] = { 416000, 0x06 },
 239                                 .odr_len = 6,
 240                         },
 241                         [ST_LSM6DSX_ID_GYRO] = {
 242                                 .reg = {
 243                                         .addr = 0x11,
 244                                         .mask = GENMASK(7, 4),
 245                                 },
 246                                 .odr_avl[0] = {  12500, 0x01 },
 247                                 .odr_avl[1] = {  26000, 0x02 },
 248                                 .odr_avl[2] = {  52000, 0x03 },
 249                                 .odr_avl[3] = { 104000, 0x04 },
 250                                 .odr_avl[4] = { 208000, 0x05 },
 251                                 .odr_avl[5] = { 416000, 0x06 },
 252                                 .odr_len = 6,
 253                         },
 254                 },
 255                 .fs_table = {
 256                         [ST_LSM6DSX_ID_ACC] = {
 257                                 .reg = {
 258                                         .addr = 0x10,
 259                                         .mask = GENMASK(3, 2),
 260                                 },
 261                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
 262                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
 263                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
 264                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
 265                                 .fs_len = 4,
 266                         },
 267                         [ST_LSM6DSX_ID_GYRO] = {
 268                                 .reg = {
 269                                         .addr = 0x11,
 270                                         .mask = GENMASK(3, 2),
 271                                 },
 272                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
 273                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
 274                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
 275                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 276                                 .fs_len = 4,
 277                         },
 278                 },
 279                 .irq_config = {
 280                         .irq1 = {
 281                                 .addr = 0x0d,
 282                                 .mask = BIT(3),
 283                         },
 284                         .irq2 = {
 285                                 .addr = 0x0e,
 286                                 .mask = BIT(3),
 287                         },
 288                         .lir = {
 289                                 .addr = 0x58,
 290                                 .mask = BIT(0),
 291                         },
 292                         .irq1_func = {
 293                                 .addr = 0x5e,
 294                                 .mask = BIT(5),
 295                         },
 296                         .irq2_func = {
 297                                 .addr = 0x5f,
 298                                 .mask = BIT(5),
 299                         },
 300                         .hla = {
 301                                 .addr = 0x12,
 302                                 .mask = BIT(5),
 303                         },
 304                         .od = {
 305                                 .addr = 0x12,
 306                                 .mask = BIT(4),
 307                         },
 308                 },
 309                 .decimator = {
 310                         [ST_LSM6DSX_ID_ACC] = {
 311                                 .addr = 0x08,
 312                                 .mask = GENMASK(2, 0),
 313                         },
 314                         [ST_LSM6DSX_ID_GYRO] = {
 315                                 .addr = 0x08,
 316                                 .mask = GENMASK(5, 3),
 317                         },
 318                 },
 319                 .fifo_ops = {
 320                         .update_fifo = st_lsm6dsx_update_fifo,
 321                         .read_fifo = st_lsm6dsx_read_fifo,
 322                         .fifo_th = {
 323                                 .addr = 0x06,
 324                                 .mask = GENMASK(11, 0),
 325                         },
 326                         .fifo_diff = {
 327                                 .addr = 0x3a,
 328                                 .mask = GENMASK(11, 0),
 329                         },
 330                         .th_wl = 3, /* 1LSB = 2B */
 331                 },
 332                 .ts_settings = {
 333                         .timer_en = {
 334                                 .addr = 0x58,
 335                                 .mask = BIT(7),
 336                         },
 337                         .hr_timer = {
 338                                 .addr = 0x5c,
 339                                 .mask = BIT(4),
 340                         },
 341                         .fifo_en = {
 342                                 .addr = 0x07,
 343                                 .mask = BIT(7),
 344                         },
 345                         .decimator = {
 346                                 .addr = 0x09,
 347                                 .mask = GENMASK(5, 3),
 348                         },
 349                 },
 350                 .event_settings = {
 351                         .wakeup_reg = {
 352                                 .addr = 0x5B,
 353                                 .mask = GENMASK(5, 0),
 354                         },
 355                         .wakeup_src_reg = 0x1b,
 356                         .wakeup_src_status_mask = BIT(3),
 357                         .wakeup_src_z_mask = BIT(0),
 358                         .wakeup_src_y_mask = BIT(1),
 359                         .wakeup_src_x_mask = BIT(2),
 360                 },
 361         },
 362         {
 363                 .wai = 0x69,
 364                 .reset = {
 365                         .addr = 0x12,
 366                         .mask = BIT(0),
 367                 },
 368                 .boot = {
 369                         .addr = 0x12,
 370                         .mask = BIT(7),
 371                 },
 372                 .bdu = {
 373                         .addr = 0x12,
 374                         .mask = BIT(6),
 375                 },
 376                 .max_fifo_size = 682,
 377                 .id = {
 378                         {
 379                                 .hw_id = ST_LSM6DS3H_ID,
 380                                 .name = ST_LSM6DS3H_DEV_NAME,
 381                         },
 382                 },
 383                 .channels = {
 384                         [ST_LSM6DSX_ID_ACC] = {
 385                                 .chan = st_lsm6dsx_acc_channels,
 386                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 387                         },
 388                         [ST_LSM6DSX_ID_GYRO] = {
 389                                 .chan = st_lsm6dsx_gyro_channels,
 390                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 391                         },
 392                 },
 393                 .odr_table = {
 394                         [ST_LSM6DSX_ID_ACC] = {
 395                                 .reg = {
 396                                         .addr = 0x10,
 397                                         .mask = GENMASK(7, 4),
 398                                 },
 399                                 .odr_avl[0] = {  12500, 0x01 },
 400                                 .odr_avl[1] = {  26000, 0x02 },
 401                                 .odr_avl[2] = {  52000, 0x03 },
 402                                 .odr_avl[3] = { 104000, 0x04 },
 403                                 .odr_avl[4] = { 208000, 0x05 },
 404                                 .odr_avl[5] = { 416000, 0x06 },
 405                                 .odr_len = 6,
 406                         },
 407                         [ST_LSM6DSX_ID_GYRO] = {
 408                                 .reg = {
 409                                         .addr = 0x11,
 410                                         .mask = GENMASK(7, 4),
 411                                 },
 412                                 .odr_avl[0] = {  12500, 0x01 },
 413                                 .odr_avl[1] = {  26000, 0x02 },
 414                                 .odr_avl[2] = {  52000, 0x03 },
 415                                 .odr_avl[3] = { 104000, 0x04 },
 416                                 .odr_avl[4] = { 208000, 0x05 },
 417                                 .odr_avl[5] = { 416000, 0x06 },
 418                                 .odr_len = 6,
 419                         },
 420                 },
 421                 .fs_table = {
 422                         [ST_LSM6DSX_ID_ACC] = {
 423                                 .reg = {
 424                                         .addr = 0x10,
 425                                         .mask = GENMASK(3, 2),
 426                                 },
 427                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
 428                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
 429                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
 430                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
 431                                 .fs_len = 4,
 432                         },
 433                         [ST_LSM6DSX_ID_GYRO] = {
 434                                 .reg = {
 435                                         .addr = 0x11,
 436                                         .mask = GENMASK(3, 2),
 437                                 },
 438                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
 439                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
 440                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
 441                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 442                                 .fs_len = 4,
 443                         },
 444                 },
 445                 .irq_config = {
 446                         .irq1 = {
 447                                 .addr = 0x0d,
 448                                 .mask = BIT(3),
 449                         },
 450                         .irq2 = {
 451                                 .addr = 0x0e,
 452                                 .mask = BIT(3),
 453                         },
 454                         .lir = {
 455                                 .addr = 0x58,
 456                                 .mask = BIT(0),
 457                         },
 458                         .irq1_func = {
 459                                 .addr = 0x5e,
 460                                 .mask = BIT(5),
 461                         },
 462                         .irq2_func = {
 463                                 .addr = 0x5f,
 464                                 .mask = BIT(5),
 465                         },
 466                         .hla = {
 467                                 .addr = 0x12,
 468                                 .mask = BIT(5),
 469                         },
 470                         .od = {
 471                                 .addr = 0x12,
 472                                 .mask = BIT(4),
 473                         },
 474                 },
 475                 .decimator = {
 476                         [ST_LSM6DSX_ID_ACC] = {
 477                                 .addr = 0x08,
 478                                 .mask = GENMASK(2, 0),
 479                         },
 480                         [ST_LSM6DSX_ID_GYRO] = {
 481                                 .addr = 0x08,
 482                                 .mask = GENMASK(5, 3),
 483                         },
 484                 },
 485                 .fifo_ops = {
 486                         .update_fifo = st_lsm6dsx_update_fifo,
 487                         .read_fifo = st_lsm6dsx_read_fifo,
 488                         .fifo_th = {
 489                                 .addr = 0x06,
 490                                 .mask = GENMASK(11, 0),
 491                         },
 492                         .fifo_diff = {
 493                                 .addr = 0x3a,
 494                                 .mask = GENMASK(11, 0),
 495                         },
 496                         .th_wl = 3, /* 1LSB = 2B */
 497                 },
 498                 .ts_settings = {
 499                         .timer_en = {
 500                                 .addr = 0x58,
 501                                 .mask = BIT(7),
 502                         },
 503                         .hr_timer = {
 504                                 .addr = 0x5c,
 505                                 .mask = BIT(4),
 506                         },
 507                         .fifo_en = {
 508                                 .addr = 0x07,
 509                                 .mask = BIT(7),
 510                         },
 511                         .decimator = {
 512                                 .addr = 0x09,
 513                                 .mask = GENMASK(5, 3),
 514                         },
 515                 },
 516                 .event_settings = {
 517                         .wakeup_reg = {
 518                                 .addr = 0x5B,
 519                                 .mask = GENMASK(5, 0),
 520                         },
 521                         .wakeup_src_reg = 0x1b,
 522                         .wakeup_src_status_mask = BIT(3),
 523                         .wakeup_src_z_mask = BIT(0),
 524                         .wakeup_src_y_mask = BIT(1),
 525                         .wakeup_src_x_mask = BIT(2),
 526                 },
 527         },
 528         {
 529                 .wai = 0x6a,
 530                 .reset = {
 531                         .addr = 0x12,
 532                         .mask = BIT(0),
 533                 },
 534                 .boot = {
 535                         .addr = 0x12,
 536                         .mask = BIT(7),
 537                 },
 538                 .bdu = {
 539                         .addr = 0x12,
 540                         .mask = BIT(6),
 541                 },
 542                 .max_fifo_size = 682,
 543                 .id = {
 544                         {
 545                                 .hw_id = ST_LSM6DSL_ID,
 546                                 .name = ST_LSM6DSL_DEV_NAME,
 547                         }, {
 548                                 .hw_id = ST_LSM6DSM_ID,
 549                                 .name = ST_LSM6DSM_DEV_NAME,
 550                         }, {
 551                                 .hw_id = ST_ISM330DLC_ID,
 552                                 .name = ST_ISM330DLC_DEV_NAME,
 553                         }, {
 554                                 .hw_id = ST_LSM6DS3TRC_ID,
 555                                 .name = ST_LSM6DS3TRC_DEV_NAME,
 556                         },
 557                 },
 558                 .channels = {
 559                         [ST_LSM6DSX_ID_ACC] = {
 560                                 .chan = st_lsm6dsx_acc_channels,
 561                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 562                         },
 563                         [ST_LSM6DSX_ID_GYRO] = {
 564                                 .chan = st_lsm6dsx_gyro_channels,
 565                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 566                         },
 567                 },
 568                 .odr_table = {
 569                         [ST_LSM6DSX_ID_ACC] = {
 570                                 .reg = {
 571                                         .addr = 0x10,
 572                                         .mask = GENMASK(7, 4),
 573                                 },
 574                                 .odr_avl[0] = {  12500, 0x01 },
 575                                 .odr_avl[1] = {  26000, 0x02 },
 576                                 .odr_avl[2] = {  52000, 0x03 },
 577                                 .odr_avl[3] = { 104000, 0x04 },
 578                                 .odr_avl[4] = { 208000, 0x05 },
 579                                 .odr_avl[5] = { 416000, 0x06 },
 580                                 .odr_len = 6,
 581                         },
 582                         [ST_LSM6DSX_ID_GYRO] = {
 583                                 .reg = {
 584                                         .addr = 0x11,
 585                                         .mask = GENMASK(7, 4),
 586                                 },
 587                                 .odr_avl[0] = {  12500, 0x01 },
 588                                 .odr_avl[1] = {  26000, 0x02 },
 589                                 .odr_avl[2] = {  52000, 0x03 },
 590                                 .odr_avl[3] = { 104000, 0x04 },
 591                                 .odr_avl[4] = { 208000, 0x05 },
 592                                 .odr_avl[5] = { 416000, 0x06 },
 593                                 .odr_len = 6,
 594                         },
 595                 },
 596                 .fs_table = {
 597                         [ST_LSM6DSX_ID_ACC] = {
 598                                 .reg = {
 599                                         .addr = 0x10,
 600                                         .mask = GENMASK(3, 2),
 601                                 },
 602                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
 603                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
 604                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
 605                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
 606                                 .fs_len = 4,
 607                         },
 608                         [ST_LSM6DSX_ID_GYRO] = {
 609                                 .reg = {
 610                                         .addr = 0x11,
 611                                         .mask = GENMASK(3, 2),
 612                                 },
 613                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
 614                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
 615                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
 616                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 617                                 .fs_len = 4,
 618                         },
 619                 },
 620                 .irq_config = {
 621                         .irq1 = {
 622                                 .addr = 0x0d,
 623                                 .mask = BIT(3),
 624                         },
 625                         .irq2 = {
 626                                 .addr = 0x0e,
 627                                 .mask = BIT(3),
 628                         },
 629                         .lir = {
 630                                 .addr = 0x58,
 631                                 .mask = BIT(0),
 632                         },
 633                         .irq1_func = {
 634                                 .addr = 0x5e,
 635                                 .mask = BIT(5),
 636                         },
 637                         .irq2_func = {
 638                                 .addr = 0x5f,
 639                                 .mask = BIT(5),
 640                         },
 641                         .hla = {
 642                                 .addr = 0x12,
 643                                 .mask = BIT(5),
 644                         },
 645                         .od = {
 646                                 .addr = 0x12,
 647                                 .mask = BIT(4),
 648                         },
 649                 },
 650                 .decimator = {
 651                         [ST_LSM6DSX_ID_ACC] = {
 652                                 .addr = 0x08,
 653                                 .mask = GENMASK(2, 0),
 654                         },
 655                         [ST_LSM6DSX_ID_GYRO] = {
 656                                 .addr = 0x08,
 657                                 .mask = GENMASK(5, 3),
 658                         },
 659                         [ST_LSM6DSX_ID_EXT0] = {
 660                                 .addr = 0x09,
 661                                 .mask = GENMASK(2, 0),
 662                         },
 663                 },
 664                 .fifo_ops = {
 665                         .update_fifo = st_lsm6dsx_update_fifo,
 666                         .read_fifo = st_lsm6dsx_read_fifo,
 667                         .fifo_th = {
 668                                 .addr = 0x06,
 669                                 .mask = GENMASK(10, 0),
 670                         },
 671                         .fifo_diff = {
 672                                 .addr = 0x3a,
 673                                 .mask = GENMASK(10, 0),
 674                         },
 675                         .th_wl = 3, /* 1LSB = 2B */
 676                 },
 677                 .ts_settings = {
 678                         .timer_en = {
 679                                 .addr = 0x19,
 680                                 .mask = BIT(5),
 681                         },
 682                         .hr_timer = {
 683                                 .addr = 0x5c,
 684                                 .mask = BIT(4),
 685                         },
 686                         .fifo_en = {
 687                                 .addr = 0x07,
 688                                 .mask = BIT(7),
 689                         },
 690                         .decimator = {
 691                                 .addr = 0x09,
 692                                 .mask = GENMASK(5, 3),
 693                         },
 694                 },
 695                 .shub_settings = {
 696                         .page_mux = {
 697                                 .addr = 0x01,
 698                                 .mask = BIT(7),
 699                         },
 700                         .master_en = {
 701                                 .addr = 0x1a,
 702                                 .mask = BIT(0),
 703                         },
 704                         .pullup_en = {
 705                                 .addr = 0x1a,
 706                                 .mask = BIT(3),
 707                         },
 708                         .aux_sens = {
 709                                 .addr = 0x04,
 710                                 .mask = GENMASK(5, 4),
 711                         },
 712                         .wr_once = {
 713                                 .addr = 0x07,
 714                                 .mask = BIT(5),
 715                         },
 716                         .emb_func = {
 717                                 .addr = 0x19,
 718                                 .mask = BIT(2),
 719                         },
 720                         .num_ext_dev = 1,
 721                         .shub_out = {
 722                                 .addr = 0x2e,
 723                         },
 724                         .slv0_addr = 0x02,
 725                         .dw_slv0_addr = 0x0e,
 726                         .pause = 0x7,
 727                 },
 728                 .event_settings = {
 729                         .enable_reg = {
 730                                 .addr = 0x58,
 731                                 .mask = BIT(7),
 732                         },
 733                         .wakeup_reg = {
 734                                 .addr = 0x5B,
 735                                 .mask = GENMASK(5, 0),
 736                         },
 737                         .wakeup_src_reg = 0x1b,
 738                         .wakeup_src_status_mask = BIT(3),
 739                         .wakeup_src_z_mask = BIT(0),
 740                         .wakeup_src_y_mask = BIT(1),
 741                         .wakeup_src_x_mask = BIT(2),
 742                 },
 743         },
 744         {
 745                 .wai = 0x6c,
 746                 .reset = {
 747                         .addr = 0x12,
 748                         .mask = BIT(0),
 749                 },
 750                 .boot = {
 751                         .addr = 0x12,
 752                         .mask = BIT(7),
 753                 },
 754                 .bdu = {
 755                         .addr = 0x12,
 756                         .mask = BIT(6),
 757                 },
 758                 .max_fifo_size = 512,
 759                 .id = {
 760                         {
 761                                 .hw_id = ST_LSM6DSO_ID,
 762                                 .name = ST_LSM6DSO_DEV_NAME,
 763                         }, {
 764                                 .hw_id = ST_LSM6DSOX_ID,
 765                                 .name = ST_LSM6DSOX_DEV_NAME,
 766                         },
 767                 },
 768                 .channels = {
 769                         [ST_LSM6DSX_ID_ACC] = {
 770                                 .chan = st_lsm6dsx_acc_channels,
 771                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 772                         },
 773                         [ST_LSM6DSX_ID_GYRO] = {
 774                                 .chan = st_lsm6dsx_gyro_channels,
 775                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 776                         },
 777                 },
 778                 .drdy_mask = {
 779                         .addr = 0x13,
 780                         .mask = BIT(3),
 781                 },
 782                 .odr_table = {
 783                         [ST_LSM6DSX_ID_ACC] = {
 784                                 .reg = {
 785                                         .addr = 0x10,
 786                                         .mask = GENMASK(7, 4),
 787                                 },
 788                                 .odr_avl[0] = {  12500, 0x01 },
 789                                 .odr_avl[1] = {  26000, 0x02 },
 790                                 .odr_avl[2] = {  52000, 0x03 },
 791                                 .odr_avl[3] = { 104000, 0x04 },
 792                                 .odr_avl[4] = { 208000, 0x05 },
 793                                 .odr_avl[5] = { 416000, 0x06 },
 794                                 .odr_len = 6,
 795                         },
 796                         [ST_LSM6DSX_ID_GYRO] = {
 797                                 .reg = {
 798                                         .addr = 0x11,
 799                                         .mask = GENMASK(7, 4),
 800                                 },
 801                                 .odr_avl[0] = {  12500, 0x01 },
 802                                 .odr_avl[1] = {  26000, 0x02 },
 803                                 .odr_avl[2] = {  52000, 0x03 },
 804                                 .odr_avl[3] = { 104000, 0x04 },
 805                                 .odr_avl[4] = { 208000, 0x05 },
 806                                 .odr_avl[5] = { 416000, 0x06 },
 807                                 .odr_len = 6,
 808                         },
 809                 },
 810                 .fs_table = {
 811                         [ST_LSM6DSX_ID_ACC] = {
 812                                 .reg = {
 813                                         .addr = 0x10,
 814                                         .mask = GENMASK(3, 2),
 815                                 },
 816                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
 817                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
 818                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
 819                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
 820                                 .fs_len = 4,
 821                         },
 822                         [ST_LSM6DSX_ID_GYRO] = {
 823                                 .reg = {
 824                                         .addr = 0x11,
 825                                         .mask = GENMASK(3, 2),
 826                                 },
 827                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
 828                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
 829                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
 830                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
 831                                 .fs_len = 4,
 832                         },
 833                 },
 834                 .irq_config = {
 835                         .irq1 = {
 836                                 .addr = 0x0d,
 837                                 .mask = BIT(3),
 838                         },
 839                         .irq2 = {
 840                                 .addr = 0x0e,
 841                                 .mask = BIT(3),
 842                         },
 843                         .lir = {
 844                                 .addr = 0x56,
 845                                 .mask = BIT(0),
 846                         },
 847                         .clear_on_read = {
 848                                 .addr = 0x56,
 849                                 .mask = BIT(6),
 850                         },
 851                         .irq1_func = {
 852                                 .addr = 0x5e,
 853                                 .mask = BIT(5),
 854                         },
 855                         .irq2_func = {
 856                                 .addr = 0x5f,
 857                                 .mask = BIT(5),
 858                         },
 859                         .hla = {
 860                                 .addr = 0x12,
 861                                 .mask = BIT(5),
 862                         },
 863                         .od = {
 864                                 .addr = 0x12,
 865                                 .mask = BIT(4),
 866                         },
 867                 },
 868                 .batch = {
 869                         [ST_LSM6DSX_ID_ACC] = {
 870                                 .addr = 0x09,
 871                                 .mask = GENMASK(3, 0),
 872                         },
 873                         [ST_LSM6DSX_ID_GYRO] = {
 874                                 .addr = 0x09,
 875                                 .mask = GENMASK(7, 4),
 876                         },
 877                 },
 878                 .fifo_ops = {
 879                         .update_fifo = st_lsm6dsx_update_fifo,
 880                         .read_fifo = st_lsm6dsx_read_tagged_fifo,
 881                         .fifo_th = {
 882                                 .addr = 0x07,
 883                                 .mask = GENMASK(8, 0),
 884                         },
 885                         .fifo_diff = {
 886                                 .addr = 0x3a,
 887                                 .mask = GENMASK(9, 0),
 888                         },
 889                         .th_wl = 1,
 890                 },
 891                 .ts_settings = {
 892                         .timer_en = {
 893                                 .addr = 0x19,
 894                                 .mask = BIT(5),
 895                         },
 896                         .decimator = {
 897                                 .addr = 0x0a,
 898                                 .mask = GENMASK(7, 6),
 899                         },
 900                         .freq_fine = 0x63,
 901                 },
 902                 .shub_settings = {
 903                         .page_mux = {
 904                                 .addr = 0x01,
 905                                 .mask = BIT(6),
 906                         },
 907                         .master_en = {
 908                                 .sec_page = true,
 909                                 .addr = 0x14,
 910                                 .mask = BIT(2),
 911                         },
 912                         .pullup_en = {
 913                                 .sec_page = true,
 914                                 .addr = 0x14,
 915                                 .mask = BIT(3),
 916                         },
 917                         .aux_sens = {
 918                                 .addr = 0x14,
 919                                 .mask = GENMASK(1, 0),
 920                         },
 921                         .wr_once = {
 922                                 .addr = 0x14,
 923                                 .mask = BIT(6),
 924                         },
 925                         .num_ext_dev = 3,
 926                         .shub_out = {
 927                                 .sec_page = true,
 928                                 .addr = 0x02,
 929                         },
 930                         .slv0_addr = 0x15,
 931                         .dw_slv0_addr = 0x21,
 932                         .batch_en = BIT(3),
 933                 },
 934                 .event_settings = {
 935                         .enable_reg = {
 936                                 .addr = 0x58,
 937                                 .mask = BIT(7),
 938                         },
 939                         .wakeup_reg = {
 940                                 .addr = 0x5b,
 941                                 .mask = GENMASK(5, 0),
 942                         },
 943                         .wakeup_src_reg = 0x1b,
 944                         .wakeup_src_status_mask = BIT(3),
 945                         .wakeup_src_z_mask = BIT(0),
 946                         .wakeup_src_y_mask = BIT(1),
 947                         .wakeup_src_x_mask = BIT(2),
 948                 },
 949         },
 950         {
 951                 .wai = 0x6b,
 952                 .reset = {
 953                         .addr = 0x12,
 954                         .mask = BIT(0),
 955                 },
 956                 .boot = {
 957                         .addr = 0x12,
 958                         .mask = BIT(7),
 959                 },
 960                 .bdu = {
 961                         .addr = 0x12,
 962                         .mask = BIT(6),
 963                 },
 964                 .max_fifo_size = 512,
 965                 .id = {
 966                         {
 967                                 .hw_id = ST_ASM330LHH_ID,
 968                                 .name = ST_ASM330LHH_DEV_NAME,
 969                         },
 970                 },
 971                 .channels = {
 972                         [ST_LSM6DSX_ID_ACC] = {
 973                                 .chan = st_lsm6dsx_acc_channels,
 974                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
 975                         },
 976                         [ST_LSM6DSX_ID_GYRO] = {
 977                                 .chan = st_lsm6dsx_gyro_channels,
 978                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
 979                         },
 980                 },
 981                 .drdy_mask = {
 982                         .addr = 0x13,
 983                         .mask = BIT(3),
 984                 },
 985                 .odr_table = {
 986                         [ST_LSM6DSX_ID_ACC] = {
 987                                 .reg = {
 988                                         .addr = 0x10,
 989                                         .mask = GENMASK(7, 4),
 990                                 },
 991                                 .odr_avl[0] = {  12500, 0x01 },
 992                                 .odr_avl[1] = {  26000, 0x02 },
 993                                 .odr_avl[2] = {  52000, 0x03 },
 994                                 .odr_avl[3] = { 104000, 0x04 },
 995                                 .odr_avl[4] = { 208000, 0x05 },
 996                                 .odr_avl[5] = { 416000, 0x06 },
 997                                 .odr_len = 6,
 998                         },
 999                         [ST_LSM6DSX_ID_GYRO] = {
1000                                 .reg = {
1001                                         .addr = 0x11,
1002                                         .mask = GENMASK(7, 4),
1003                                 },
1004                                 .odr_avl[0] = {  12500, 0x01 },
1005                                 .odr_avl[1] = {  26000, 0x02 },
1006                                 .odr_avl[2] = {  52000, 0x03 },
1007                                 .odr_avl[3] = { 104000, 0x04 },
1008                                 .odr_avl[4] = { 208000, 0x05 },
1009                                 .odr_avl[5] = { 416000, 0x06 },
1010                                 .odr_len = 6,
1011                         },
1012                 },
1013                 .fs_table = {
1014                         [ST_LSM6DSX_ID_ACC] = {
1015                                 .reg = {
1016                                         .addr = 0x10,
1017                                         .mask = GENMASK(3, 2),
1018                                 },
1019                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
1020                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
1021                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
1022                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
1023                                 .fs_len = 4,
1024                         },
1025                         [ST_LSM6DSX_ID_GYRO] = {
1026                                 .reg = {
1027                                         .addr = 0x11,
1028                                         .mask = GENMASK(3, 2),
1029                                 },
1030                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
1031                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
1032                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
1033                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
1034                                 .fs_len = 4,
1035                         },
1036                 },
1037                 .irq_config = {
1038                         .irq1 = {
1039                                 .addr = 0x0d,
1040                                 .mask = BIT(3),
1041                         },
1042                         .irq2 = {
1043                                 .addr = 0x0e,
1044                                 .mask = BIT(3),
1045                         },
1046                         .lir = {
1047                                 .addr = 0x56,
1048                                 .mask = BIT(0),
1049                         },
1050                         .clear_on_read = {
1051                                 .addr = 0x56,
1052                                 .mask = BIT(6),
1053                         },
1054                         .irq1_func = {
1055                                 .addr = 0x5e,
1056                                 .mask = BIT(5),
1057                         },
1058                         .irq2_func = {
1059                                 .addr = 0x5f,
1060                                 .mask = BIT(5),
1061                         },
1062                         .hla = {
1063                                 .addr = 0x12,
1064                                 .mask = BIT(5),
1065                         },
1066                         .od = {
1067                                 .addr = 0x12,
1068                                 .mask = BIT(4),
1069                         },
1070                 },
1071                 .batch = {
1072                         [ST_LSM6DSX_ID_ACC] = {
1073                                 .addr = 0x09,
1074                                 .mask = GENMASK(3, 0),
1075                         },
1076                         [ST_LSM6DSX_ID_GYRO] = {
1077                                 .addr = 0x09,
1078                                 .mask = GENMASK(7, 4),
1079                         },
1080                 },
1081                 .fifo_ops = {
1082                         .update_fifo = st_lsm6dsx_update_fifo,
1083                         .read_fifo = st_lsm6dsx_read_tagged_fifo,
1084                         .fifo_th = {
1085                                 .addr = 0x07,
1086                                 .mask = GENMASK(8, 0),
1087                         },
1088                         .fifo_diff = {
1089                                 .addr = 0x3a,
1090                                 .mask = GENMASK(9, 0),
1091                         },
1092                         .th_wl = 1,
1093                 },
1094                 .ts_settings = {
1095                         .timer_en = {
1096                                 .addr = 0x19,
1097                                 .mask = BIT(5),
1098                         },
1099                         .decimator = {
1100                                 .addr = 0x0a,
1101                                 .mask = GENMASK(7, 6),
1102                         },
1103                         .freq_fine = 0x63,
1104                 },
1105                 .event_settings = {
1106                         .enable_reg = {
1107                                 .addr = 0x58,
1108                                 .mask = BIT(7),
1109                         },
1110                         .wakeup_reg = {
1111                                 .addr = 0x5B,
1112                                 .mask = GENMASK(5, 0),
1113                         },
1114                         .wakeup_src_reg = 0x1b,
1115                         .wakeup_src_status_mask = BIT(3),
1116                         .wakeup_src_z_mask = BIT(0),
1117                         .wakeup_src_y_mask = BIT(1),
1118                         .wakeup_src_x_mask = BIT(2),
1119                 },
1120         },
1121         {
1122                 .wai = 0x6b,
1123                 .reset = {
1124                         .addr = 0x12,
1125                         .mask = BIT(0),
1126                 },
1127                 .boot = {
1128                         .addr = 0x12,
1129                         .mask = BIT(7),
1130                 },
1131                 .bdu = {
1132                         .addr = 0x12,
1133                         .mask = BIT(6),
1134                 },
1135                 .max_fifo_size = 512,
1136                 .id = {
1137                         {
1138                                 .hw_id = ST_LSM6DSR_ID,
1139                                 .name = ST_LSM6DSR_DEV_NAME,
1140                         }, {
1141                                 .hw_id = ST_ISM330DHCX_ID,
1142                                 .name = ST_ISM330DHCX_DEV_NAME,
1143                         }, {
1144                                 .hw_id = ST_LSM6DSRX_ID,
1145                                 .name = ST_LSM6DSRX_DEV_NAME,
1146                         },
1147                 },
1148                 .channels = {
1149                         [ST_LSM6DSX_ID_ACC] = {
1150                                 .chan = st_lsm6dsx_acc_channels,
1151                                 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1152                         },
1153                         [ST_LSM6DSX_ID_GYRO] = {
1154                                 .chan = st_lsm6dsx_gyro_channels,
1155                                 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1156                         },
1157                 },
1158                 .drdy_mask = {
1159                         .addr = 0x13,
1160                         .mask = BIT(3),
1161                 },
1162                 .odr_table = {
1163                         [ST_LSM6DSX_ID_ACC] = {
1164                                 .reg = {
1165                                         .addr = 0x10,
1166                                         .mask = GENMASK(7, 4),
1167                                 },
1168                                 .odr_avl[0] = {  12500, 0x01 },
1169                                 .odr_avl[1] = {  26000, 0x02 },
1170                                 .odr_avl[2] = {  52000, 0x03 },
1171                                 .odr_avl[3] = { 104000, 0x04 },
1172                                 .odr_avl[4] = { 208000, 0x05 },
1173                                 .odr_avl[5] = { 416000, 0x06 },
1174                                 .odr_len = 6,
1175                         },
1176                         [ST_LSM6DSX_ID_GYRO] = {
1177                                 .reg = {
1178                                         .addr = 0x11,
1179                                         .mask = GENMASK(7, 4),
1180                                 },
1181                                 .odr_avl[0] = {  12500, 0x01 },
1182                                 .odr_avl[1] = {  26000, 0x02 },
1183                                 .odr_avl[2] = {  52000, 0x03 },
1184                                 .odr_avl[3] = { 104000, 0x04 },
1185                                 .odr_avl[4] = { 208000, 0x05 },
1186                                 .odr_avl[5] = { 416000, 0x06 },
1187                                 .odr_len = 6,
1188                         },
1189                 },
1190                 .fs_table = {
1191                         [ST_LSM6DSX_ID_ACC] = {
1192                                 .reg = {
1193                                         .addr = 0x10,
1194                                         .mask = GENMASK(3, 2),
1195                                 },
1196                                 .fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
1197                                 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
1198                                 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
1199                                 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
1200                                 .fs_len = 4,
1201                         },
1202                         [ST_LSM6DSX_ID_GYRO] = {
1203                                 .reg = {
1204                                         .addr = 0x11,
1205                                         .mask = GENMASK(3, 2),
1206                                 },
1207                                 .fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
1208                                 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
1209                                 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
1210                                 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
1211                                 .fs_len = 4,
1212                         },
1213                 },
1214                 .irq_config = {
1215                         .irq1 = {
1216                                 .addr = 0x0d,
1217                                 .mask = BIT(3),
1218                         },
1219                         .irq2 = {
1220                                 .addr = 0x0e,
1221                                 .mask = BIT(3),
1222                         },
1223                         .lir = {
1224                                 .addr = 0x56,
1225                                 .mask = BIT(0),
1226                         },
1227                         .clear_on_read = {
1228                                 .addr = 0x56,
1229                                 .mask = BIT(6),
1230                         },
1231                         .irq1_func = {
1232                                 .addr = 0x5e,
1233                                 .mask = BIT(5),
1234                         },
1235                         .irq2_func = {
1236                                 .addr = 0x5f,
1237                                 .mask = BIT(5),
1238                         },
1239                         .hla = {
1240                                 .addr = 0x12,
1241                                 .mask = BIT(5),
1242                         },
1243                         .od = {
1244                                 .addr = 0x12,
1245                                 .mask = BIT(4),
1246                         },
1247                 },
1248                 .batch = {
1249                         [ST_LSM6DSX_ID_ACC] = {
1250                                 .addr = 0x09,
1251                                 .mask = GENMASK(3, 0),
1252                         },
1253                         [ST_LSM6DSX_ID_GYRO] = {
1254                                 .addr = 0x09,
1255                                 .mask = GENMASK(7, 4),
1256                         },
1257                 },
1258                 .fifo_ops = {
1259                         .update_fifo = st_lsm6dsx_update_fifo,
1260                         .read_fifo = st_lsm6dsx_read_tagged_fifo,
1261                         .fifo_th = {
1262                                 .addr = 0x07,
1263                                 .mask = GENMASK(8, 0),
1264                         },
1265                         .fifo_diff = {
1266                                 .addr = 0x3a,
1267                                 .mask = GENMASK(9, 0),
1268                         },
1269                         .th_wl = 1,
1270                 },
1271                 .ts_settings = {
1272                         .timer_en = {
1273                                 .addr = 0x19,
1274                                 .mask = BIT(5),
1275                         },
1276                         .decimator = {
1277                                 .addr = 0x0a,
1278                                 .mask = GENMASK(7, 6),
1279                         },
1280                         .freq_fine = 0x63,
1281                 },
1282                 .shub_settings = {
1283                         .page_mux = {
1284                                 .addr = 0x01,
1285                                 .mask = BIT(6),
1286                         },
1287                         .master_en = {
1288                                 .sec_page = true,
1289                                 .addr = 0x14,
1290                                 .mask = BIT(2),
1291                         },
1292                         .pullup_en = {
1293                                 .sec_page = true,
1294                                 .addr = 0x14,
1295                                 .mask = BIT(3),
1296                         },
1297                         .aux_sens = {
1298                                 .addr = 0x14,
1299                                 .mask = GENMASK(1, 0),
1300                         },
1301                         .wr_once = {
1302                                 .addr = 0x14,
1303                                 .mask = BIT(6),
1304                         },
1305                         .num_ext_dev = 3,
1306                         .shub_out = {
1307                                 .sec_page = true,
1308                                 .addr = 0x02,
1309                         },
1310                         .slv0_addr = 0x15,
1311                         .dw_slv0_addr = 0x21,
1312                         .batch_en = BIT(3),
1313                 },
1314                 .event_settings = {
1315                         .enable_reg = {
1316                                 .addr = 0x58,
1317                                 .mask = BIT(7),
1318                         },
1319                         .wakeup_reg = {
1320                                 .addr = 0x5B,
1321                                 .mask = GENMASK(5, 0),
1322                         },
1323                         .wakeup_src_reg = 0x1b,
1324                         .wakeup_src_status_mask = BIT(3),
1325                         .wakeup_src_z_mask = BIT(0),
1326                         .wakeup_src_y_mask = BIT(1),
1327                         .wakeup_src_x_mask = BIT(2),
1328                 }
1329         },
1330 };
1331
1332 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1333 {
1334         const struct st_lsm6dsx_shub_settings *hub_settings;
1335         unsigned int data;
1336         int err;
1337
1338         hub_settings = &hw->settings->shub_settings;
1339         data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1340         err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1341                                  hub_settings->page_mux.mask, data);
1342         usleep_range(100, 150);
1343
1344         return err;
1345 }
1346
1347 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1348                                    const char **name)
1349 {
1350         int err, i, j, data;
1351
1352         for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1353                 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1354                         if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1355                             id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1356                                 break;
1357                 }
1358                 if (j < ST_LSM6DSX_MAX_ID)
1359                         break;
1360         }
1361
1362         if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1363                 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1364                 return -ENODEV;
1365         }
1366
1367         err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1368         if (err < 0) {
1369                 dev_err(hw->dev, "failed to read whoami register\n");
1370                 return err;
1371         }
1372
1373         if (data != st_lsm6dsx_sensor_settings[i].wai) {
1374                 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1375                 return -ENODEV;
1376         }
1377
1378         *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1379         hw->settings = &st_lsm6dsx_sensor_settings[i];
1380
1381         return 0;
1382 }
1383
1384 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1385                                      u32 gain)
1386 {
1387         const struct st_lsm6dsx_fs_table_entry *fs_table;
1388         unsigned int data;
1389         int i, err;
1390
1391         fs_table = &sensor->hw->settings->fs_table[sensor->id];
1392         for (i = 0; i < fs_table->fs_len; i++) {
1393                 if (fs_table->fs_avl[i].gain == gain)
1394                         break;
1395         }
1396
1397         if (i == fs_table->fs_len)
1398                 return -EINVAL;
1399
1400         data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1401                                     fs_table->reg.mask);
1402         err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1403                                             fs_table->reg.mask, data);
1404         if (err < 0)
1405                 return err;
1406
1407         sensor->gain = gain;
1408
1409         return 0;
1410 }
1411
1412 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1413 {
1414         const struct st_lsm6dsx_odr_table_entry *odr_table;
1415         int i;
1416
1417         odr_table = &sensor->hw->settings->odr_table[sensor->id];
1418         for (i = 0; i < odr_table->odr_len; i++) {
1419                 /*
1420                  * ext devices can run at different odr respect to
1421                  * accel sensor
1422                  */
1423                 if (odr_table->odr_avl[i].milli_hz >= odr)
1424                         break;
1425         }
1426
1427         if (i == odr_table->odr_len)
1428                 return -EINVAL;
1429
1430         *val = odr_table->odr_avl[i].val;
1431         return odr_table->odr_avl[i].milli_hz;
1432 }
1433
1434 static int
1435 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1436                                 enum st_lsm6dsx_sensor_id id)
1437 {
1438         struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1439
1440         if (odr > 0) {
1441                 if (hw->enable_mask & BIT(id))
1442                         return max_t(u32, ref->odr, odr);
1443                 else
1444                         return odr;
1445         } else {
1446                 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1447         }
1448 }
1449
1450 static int
1451 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1452 {
1453         struct st_lsm6dsx_sensor *ref_sensor = sensor;
1454         struct st_lsm6dsx_hw *hw = sensor->hw;
1455         const struct st_lsm6dsx_reg *reg;
1456         unsigned int data;
1457         u8 val = 0;
1458         int err;
1459
1460         switch (sensor->id) {
1461         case ST_LSM6DSX_ID_EXT0:
1462         case ST_LSM6DSX_ID_EXT1:
1463         case ST_LSM6DSX_ID_EXT2:
1464         case ST_LSM6DSX_ID_ACC: {
1465                 u32 odr;
1466                 int i;
1467
1468                 /*
1469                  * i2c embedded controller relies on the accelerometer sensor as
1470                  * bus read/write trigger so we need to enable accel device
1471                  * at odr = max(accel_odr, ext_odr) in order to properly
1472                  * communicate with i2c slave devices
1473                  */
1474                 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1475                 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1476                         if (!hw->iio_devs[i] || i == sensor->id)
1477                                 continue;
1478
1479                         odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1480                         if (odr != req_odr)
1481                                 /* device already configured */
1482                                 return 0;
1483                 }
1484                 break;
1485         }
1486         default:
1487                 break;
1488         }
1489
1490         if (req_odr > 0) {
1491                 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1492                 if (err < 0)
1493                         return err;
1494         }
1495
1496         reg = &hw->settings->odr_table[ref_sensor->id].reg;
1497         data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1498         return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1499 }
1500
1501 static int
1502 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1503                                bool enable)
1504 {
1505         struct st_lsm6dsx_hw *hw = sensor->hw;
1506         u32 odr = enable ? sensor->odr : 0;
1507         int err;
1508
1509         err = st_lsm6dsx_set_odr(sensor, odr);
1510         if (err < 0)
1511                 return err;
1512
1513         if (enable)
1514                 hw->enable_mask |= BIT(sensor->id);
1515         else
1516                 hw->enable_mask &= ~BIT(sensor->id);
1517
1518         return 0;
1519 }
1520
1521 static int
1522 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1523 {
1524         struct st_lsm6dsx_hw *hw = sensor->hw;
1525
1526         if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1527                 return 0;
1528
1529         return hw->enable_event;
1530 }
1531
1532 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1533                                  bool enable)
1534 {
1535         if (st_lsm6dsx_check_events(sensor, enable))
1536                 return 0;
1537
1538         return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1539 }
1540
1541 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1542                                    u8 addr, int *val)
1543 {
1544         struct st_lsm6dsx_hw *hw = sensor->hw;
1545         int err, delay;
1546         __le16 data;
1547
1548         err = st_lsm6dsx_sensor_set_enable(sensor, true);
1549         if (err < 0)
1550                 return err;
1551
1552         delay = 1000000000 / sensor->odr;
1553         usleep_range(delay, 2 * delay);
1554
1555         err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1556         if (err < 0)
1557                 return err;
1558
1559         if (!hw->enable_event) {
1560                 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1561                 if (err < 0)
1562                         return err;
1563         }
1564
1565         *val = (s16)le16_to_cpu(data);
1566
1567         return IIO_VAL_INT;
1568 }
1569
1570 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1571                                struct iio_chan_spec const *ch,
1572                                int *val, int *val2, long mask)
1573 {
1574         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1575         int ret;
1576
1577         switch (mask) {
1578         case IIO_CHAN_INFO_RAW:
1579                 ret = iio_device_claim_direct_mode(iio_dev);
1580                 if (ret)
1581                         break;
1582
1583                 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1584                 iio_device_release_direct_mode(iio_dev);
1585                 break;
1586         case IIO_CHAN_INFO_SAMP_FREQ:
1587                 *val = sensor->odr / 1000;
1588                 *val2 = (sensor->odr % 1000) * 1000;
1589                 ret = IIO_VAL_INT_PLUS_MICRO;
1590                 break;
1591         case IIO_CHAN_INFO_SCALE:
1592                 *val = 0;
1593                 *val2 = sensor->gain;
1594                 ret = IIO_VAL_INT_PLUS_MICRO;
1595                 break;
1596         default:
1597                 ret = -EINVAL;
1598                 break;
1599         }
1600
1601         return ret;
1602 }
1603
1604 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1605                                 struct iio_chan_spec const *chan,
1606                                 int val, int val2, long mask)
1607 {
1608         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1609         int err;
1610
1611         err = iio_device_claim_direct_mode(iio_dev);
1612         if (err)
1613                 return err;
1614
1615         switch (mask) {
1616         case IIO_CHAN_INFO_SCALE:
1617                 err = st_lsm6dsx_set_full_scale(sensor, val2);
1618                 break;
1619         case IIO_CHAN_INFO_SAMP_FREQ: {
1620                 u8 data;
1621
1622                 val = val * 1000 + val2 / 1000;
1623                 val = st_lsm6dsx_check_odr(sensor, val, &data);
1624                 if (val < 0)
1625                         err = val;
1626                 else
1627                         sensor->odr = val;
1628                 break;
1629         }
1630         default:
1631                 err = -EINVAL;
1632                 break;
1633         }
1634
1635         iio_device_release_direct_mode(iio_dev);
1636
1637         return err;
1638 }
1639
1640 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1641 {
1642         const struct st_lsm6dsx_reg *reg;
1643         unsigned int data;
1644         int err;
1645
1646         if (!hw->settings->irq_config.irq1_func.addr)
1647                 return -ENOTSUPP;
1648
1649         reg = &hw->settings->event_settings.enable_reg;
1650         if (reg->addr) {
1651                 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1652                 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1653                                                     reg->mask, data);
1654                 if (err < 0)
1655                         return err;
1656         }
1657
1658         /* Enable wakeup interrupt */
1659         data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1660         return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1661                                              hw->irq_routing->mask, data);
1662 }
1663
1664 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1665                                  const struct iio_chan_spec *chan,
1666                                  enum iio_event_type type,
1667                                  enum iio_event_direction dir,
1668                                  enum iio_event_info info,
1669                                  int *val, int *val2)
1670 {
1671         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1672         struct st_lsm6dsx_hw *hw = sensor->hw;
1673
1674         if (type != IIO_EV_TYPE_THRESH)
1675                 return -EINVAL;
1676
1677         *val2 = 0;
1678         *val = hw->event_threshold;
1679
1680         return IIO_VAL_INT;
1681 }
1682
1683 static int
1684 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1685                        const struct iio_chan_spec *chan,
1686                        enum iio_event_type type,
1687                        enum iio_event_direction dir,
1688                        enum iio_event_info info,
1689                        int val, int val2)
1690 {
1691         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1692         struct st_lsm6dsx_hw *hw = sensor->hw;
1693         const struct st_lsm6dsx_reg *reg;
1694         unsigned int data;
1695         int err;
1696
1697         if (type != IIO_EV_TYPE_THRESH)
1698                 return -EINVAL;
1699
1700         if (val < 0 || val > 31)
1701                 return -EINVAL;
1702
1703         reg = &hw->settings->event_settings.wakeup_reg;
1704         data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1705         err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1706                                             reg->mask, data);
1707         if (err < 0)
1708                 return -EINVAL;
1709
1710         hw->event_threshold = val;
1711
1712         return 0;
1713 }
1714
1715 static int
1716 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1717                              const struct iio_chan_spec *chan,
1718                              enum iio_event_type type,
1719                              enum iio_event_direction dir)
1720 {
1721         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1722         struct st_lsm6dsx_hw *hw = sensor->hw;
1723
1724         if (type != IIO_EV_TYPE_THRESH)
1725                 return -EINVAL;
1726
1727         return !!(hw->enable_event & BIT(chan->channel2));
1728 }
1729
1730 static int
1731 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1732                               const struct iio_chan_spec *chan,
1733                               enum iio_event_type type,
1734                               enum iio_event_direction dir, int state)
1735 {
1736         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1737         struct st_lsm6dsx_hw *hw = sensor->hw;
1738         u8 enable_event;
1739         int err;
1740
1741         if (type != IIO_EV_TYPE_THRESH)
1742                 return -EINVAL;
1743
1744         if (state) {
1745                 enable_event = hw->enable_event | BIT(chan->channel2);
1746
1747                 /* do not enable events if they are already enabled */
1748                 if (hw->enable_event)
1749                         goto out;
1750         } else {
1751                 enable_event = hw->enable_event & ~BIT(chan->channel2);
1752
1753                 /* only turn off sensor if no events is enabled */
1754                 if (enable_event)
1755                         goto out;
1756         }
1757
1758         /* stop here if no changes have been made */
1759         if (hw->enable_event == enable_event)
1760                 return 0;
1761
1762         err = st_lsm6dsx_event_setup(hw, state);
1763         if (err < 0)
1764                 return err;
1765
1766         mutex_lock(&hw->conf_lock);
1767         if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1768                 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1769         mutex_unlock(&hw->conf_lock);
1770         if (err < 0)
1771                 return err;
1772
1773 out:
1774         hw->enable_event = enable_event;
1775
1776         return 0;
1777 }
1778
1779 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1780 {
1781         struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1782         struct st_lsm6dsx_hw *hw = sensor->hw;
1783         int err;
1784
1785         if (val < 1 || val > hw->settings->max_fifo_size)
1786                 return -EINVAL;
1787
1788         mutex_lock(&hw->conf_lock);
1789
1790         err = st_lsm6dsx_update_watermark(sensor, val);
1791
1792         mutex_unlock(&hw->conf_lock);
1793
1794         if (err < 0)
1795                 return err;
1796
1797         sensor->watermark = val;
1798
1799         return 0;
1800 }
1801
1802 static ssize_t
1803 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1804                                           struct device_attribute *attr,
1805                                           char *buf)
1806 {
1807         struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1808         const struct st_lsm6dsx_odr_table_entry *odr_table;
1809         int i, len = 0;
1810
1811         odr_table = &sensor->hw->settings->odr_table[sensor->id];
1812         for (i = 0; i < odr_table->odr_len; i++)
1813                 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1814                                  odr_table->odr_avl[i].milli_hz / 1000,
1815                                  odr_table->odr_avl[i].milli_hz % 1000);
1816         buf[len - 1] = '\n';
1817
1818         return len;
1819 }
1820
1821 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1822                                             struct device_attribute *attr,
1823                                             char *buf)
1824 {
1825         struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1826         const struct st_lsm6dsx_fs_table_entry *fs_table;
1827         struct st_lsm6dsx_hw *hw = sensor->hw;
1828         int i, len = 0;
1829
1830         fs_table = &hw->settings->fs_table[sensor->id];
1831         for (i = 0; i < fs_table->fs_len; i++)
1832                 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
1833                                  fs_table->fs_avl[i].gain);
1834         buf[len - 1] = '\n';
1835
1836         return len;
1837 }
1838
1839 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1840 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1841                        st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1842 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1843                        st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1844
1845 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1846         &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1847         &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1848         NULL,
1849 };
1850
1851 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1852         .attrs = st_lsm6dsx_acc_attributes,
1853 };
1854
1855 static const struct iio_info st_lsm6dsx_acc_info = {
1856         .attrs = &st_lsm6dsx_acc_attribute_group,
1857         .read_raw = st_lsm6dsx_read_raw,
1858         .write_raw = st_lsm6dsx_write_raw,
1859         .read_event_value = st_lsm6dsx_read_event,
1860         .write_event_value = st_lsm6dsx_write_event,
1861         .read_event_config = st_lsm6dsx_read_event_config,
1862         .write_event_config = st_lsm6dsx_write_event_config,
1863         .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1864 };
1865
1866 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1867         &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1868         &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1869         NULL,
1870 };
1871
1872 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1873         .attrs = st_lsm6dsx_gyro_attributes,
1874 };
1875
1876 static const struct iio_info st_lsm6dsx_gyro_info = {
1877         .attrs = &st_lsm6dsx_gyro_attribute_group,
1878         .read_raw = st_lsm6dsx_read_raw,
1879         .write_raw = st_lsm6dsx_write_raw,
1880         .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1881 };
1882
1883 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1884 {
1885         struct device *dev = hw->dev;
1886
1887         if (!dev_fwnode(dev))
1888                 return -EINVAL;
1889
1890         return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1891 }
1892
1893 static int
1894 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1895                         const struct st_lsm6dsx_reg **drdy_reg)
1896 {
1897         int err = 0, drdy_pin;
1898
1899         if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1900                 struct st_sensors_platform_data *pdata;
1901                 struct device *dev = hw->dev;
1902
1903                 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1904                 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1905         }
1906
1907         switch (drdy_pin) {
1908         case 1:
1909                 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1910                 *drdy_reg = &hw->settings->irq_config.irq1;
1911                 break;
1912         case 2:
1913                 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1914                 *drdy_reg = &hw->settings->irq_config.irq2;
1915                 break;
1916         default:
1917                 dev_err(hw->dev, "unsupported data ready pin\n");
1918                 err = -EINVAL;
1919                 break;
1920         }
1921
1922         return err;
1923 }
1924
1925 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1926 {
1927         const struct st_lsm6dsx_shub_settings *hub_settings;
1928         struct st_sensors_platform_data *pdata;
1929         struct device *dev = hw->dev;
1930         unsigned int data;
1931         int err = 0;
1932
1933         hub_settings = &hw->settings->shub_settings;
1934
1935         pdata = (struct st_sensors_platform_data *)dev->platform_data;
1936         if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1937             (pdata && pdata->pullups)) {
1938                 if (hub_settings->pullup_en.sec_page) {
1939                         err = st_lsm6dsx_set_page(hw, true);
1940                         if (err < 0)
1941                                 return err;
1942                 }
1943
1944                 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1945                 err = regmap_update_bits(hw->regmap,
1946                                          hub_settings->pullup_en.addr,
1947                                          hub_settings->pullup_en.mask, data);
1948
1949                 if (hub_settings->pullup_en.sec_page)
1950                         st_lsm6dsx_set_page(hw, false);
1951
1952                 if (err < 0)
1953                         return err;
1954         }
1955
1956         if (hub_settings->aux_sens.addr) {
1957                 /* configure aux sensors */
1958                 err = st_lsm6dsx_set_page(hw, true);
1959                 if (err < 0)
1960                         return err;
1961
1962                 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1963                 err = regmap_update_bits(hw->regmap,
1964                                          hub_settings->aux_sens.addr,
1965                                          hub_settings->aux_sens.mask, data);
1966
1967                 st_lsm6dsx_set_page(hw, false);
1968
1969                 if (err < 0)
1970                         return err;
1971         }
1972
1973         if (hub_settings->emb_func.addr) {
1974                 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1975                 err = regmap_update_bits(hw->regmap,
1976                                          hub_settings->emb_func.addr,
1977                                          hub_settings->emb_func.mask, data);
1978         }
1979
1980         return err;
1981 }
1982
1983 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1984 {
1985         const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1986         int err, val;
1987
1988         ts_settings = &hw->settings->ts_settings;
1989         /* enable hw timestamp generation if necessary */
1990         if (ts_settings->timer_en.addr) {
1991                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1992                 err = regmap_update_bits(hw->regmap,
1993                                          ts_settings->timer_en.addr,
1994                                          ts_settings->timer_en.mask, val);
1995                 if (err < 0)
1996                         return err;
1997         }
1998
1999         /* enable high resolution for hw ts timer if necessary */
2000         if (ts_settings->hr_timer.addr) {
2001                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2002                 err = regmap_update_bits(hw->regmap,
2003                                          ts_settings->hr_timer.addr,
2004                                          ts_settings->hr_timer.mask, val);
2005                 if (err < 0)
2006                         return err;
2007         }
2008
2009         /* enable ts queueing in FIFO if necessary */
2010         if (ts_settings->fifo_en.addr) {
2011                 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2012                 err = regmap_update_bits(hw->regmap,
2013                                          ts_settings->fifo_en.addr,
2014                                          ts_settings->fifo_en.mask, val);
2015                 if (err < 0)
2016                         return err;
2017         }
2018
2019         /* calibrate timestamp sensitivity */
2020         hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
2021         if (ts_settings->freq_fine) {
2022                 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2023                 if (err < 0)
2024                         return err;
2025
2026                 /*
2027                  * linearize the AN5192 formula:
2028                  * 1 / (1 + x) ~= 1 - x (Taylor’s Series)
2029                  * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
2030                  * ttrim[ns] ~= 25000 - 37.5 * val
2031                  * ttrim[ns] ~= 25000 - (37500 * val) / 1000
2032                  */
2033                 hw->ts_gain -= ((s8)val * 37500) / 1000;
2034         }
2035
2036         return 0;
2037 }
2038
2039 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2040 {
2041         const struct st_lsm6dsx_reg *reg;
2042         int err;
2043
2044         /* device sw reset */
2045         reg = &hw->settings->reset;
2046         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2047                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2048         if (err < 0)
2049                 return err;
2050
2051         msleep(50);
2052
2053         /* reload trimming parameter */
2054         reg = &hw->settings->boot;
2055         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2056                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2057         if (err < 0)
2058                 return err;
2059
2060         msleep(50);
2061
2062         /* enable Block Data Update */
2063         reg = &hw->settings->bdu;
2064         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2065                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2066         if (err < 0)
2067                 return err;
2068
2069         /* enable FIFO watermak interrupt */
2070         err = st_lsm6dsx_get_drdy_reg(hw, &reg);
2071         if (err < 0)
2072                 return err;
2073
2074         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2075                                  ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2076         if (err < 0)
2077                 return err;
2078
2079         /* enable Latched interrupts for device events */
2080         if (hw->settings->irq_config.lir.addr) {
2081                 reg = &hw->settings->irq_config.lir;
2082                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2083                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2084                 if (err < 0)
2085                         return err;
2086
2087                 /* enable clear on read for latched interrupts */
2088                 if (hw->settings->irq_config.clear_on_read.addr) {
2089                         reg = &hw->settings->irq_config.clear_on_read;
2090                         err = regmap_update_bits(hw->regmap,
2091                                         reg->addr, reg->mask,
2092                                         ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2093                         if (err < 0)
2094                                 return err;
2095                 }
2096         }
2097
2098         /* enable drdy-mas if available */
2099         if (hw->settings->drdy_mask.addr) {
2100                 reg = &hw->settings->drdy_mask;
2101                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2102                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2103                 if (err < 0)
2104                         return err;
2105         }
2106
2107         err = st_lsm6dsx_init_shub(hw);
2108         if (err < 0)
2109                 return err;
2110
2111         return st_lsm6dsx_init_hw_timer(hw);
2112 }
2113
2114 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2115                                                enum st_lsm6dsx_sensor_id id,
2116                                                const char *name)
2117 {
2118         struct st_lsm6dsx_sensor *sensor;
2119         struct iio_dev *iio_dev;
2120
2121         iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2122         if (!iio_dev)
2123                 return NULL;
2124
2125         iio_dev->modes = INDIO_DIRECT_MODE;
2126         iio_dev->dev.parent = hw->dev;
2127         iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2128         iio_dev->channels = hw->settings->channels[id].chan;
2129         iio_dev->num_channels = hw->settings->channels[id].len;
2130
2131         sensor = iio_priv(iio_dev);
2132         sensor->id = id;
2133         sensor->hw = hw;
2134         sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2135         sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2136         sensor->watermark = 1;
2137
2138         switch (id) {
2139         case ST_LSM6DSX_ID_ACC:
2140                 iio_dev->info = &st_lsm6dsx_acc_info;
2141                 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2142                           name);
2143                 break;
2144         case ST_LSM6DSX_ID_GYRO:
2145                 iio_dev->info = &st_lsm6dsx_gyro_info;
2146                 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2147                           name);
2148                 break;
2149         default:
2150                 return NULL;
2151         }
2152         iio_dev->name = sensor->name;
2153
2154         return iio_dev;
2155 }
2156
2157 static bool
2158 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2159 {
2160         const struct st_lsm6dsx_event_settings *event_settings;
2161         int err, data;
2162         s64 timestamp;
2163
2164         if (!hw->enable_event)
2165                 return false;
2166
2167         event_settings = &hw->settings->event_settings;
2168         err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2169                                      &data, sizeof(data));
2170         if (err < 0)
2171                 return false;
2172
2173         timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2174         if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2175             (hw->enable_event & BIT(IIO_MOD_Z)))
2176                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2177                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2178                                                   0,
2179                                                   IIO_MOD_Z,
2180                                                   IIO_EV_TYPE_THRESH,
2181                                                   IIO_EV_DIR_EITHER),
2182                                                   timestamp);
2183
2184         if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2185             (hw->enable_event & BIT(IIO_MOD_Y)))
2186                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2187                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2188                                                   0,
2189                                                   IIO_MOD_Y,
2190                                                   IIO_EV_TYPE_THRESH,
2191                                                   IIO_EV_DIR_EITHER),
2192                                                   timestamp);
2193
2194         if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2195             (hw->enable_event & BIT(IIO_MOD_X)))
2196                 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2197                                IIO_MOD_EVENT_CODE(IIO_ACCEL,
2198                                                   0,
2199                                                   IIO_MOD_X,
2200                                                   IIO_EV_TYPE_THRESH,
2201                                                   IIO_EV_DIR_EITHER),
2202                                                   timestamp);
2203
2204         return data & event_settings->wakeup_src_status_mask;
2205 }
2206
2207 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2208 {
2209         struct st_lsm6dsx_hw *hw = private;
2210         bool event;
2211         int count;
2212
2213         event = st_lsm6dsx_report_motion_event(hw);
2214
2215         if (!hw->settings->fifo_ops.read_fifo)
2216                 return event ? IRQ_HANDLED : IRQ_NONE;
2217
2218         mutex_lock(&hw->fifo_lock);
2219         count = hw->settings->fifo_ops.read_fifo(hw);
2220         mutex_unlock(&hw->fifo_lock);
2221
2222         return count || event ? IRQ_HANDLED : IRQ_NONE;
2223 }
2224
2225 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2226 {
2227         struct st_sensors_platform_data *pdata;
2228         const struct st_lsm6dsx_reg *reg;
2229         struct device *dev = hw->dev;
2230         unsigned long irq_type;
2231         bool irq_active_low;
2232         int err;
2233
2234         irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2235
2236         switch (irq_type) {
2237         case IRQF_TRIGGER_HIGH:
2238         case IRQF_TRIGGER_RISING:
2239                 irq_active_low = false;
2240                 break;
2241         case IRQF_TRIGGER_LOW:
2242         case IRQF_TRIGGER_FALLING:
2243                 irq_active_low = true;
2244                 break;
2245         default:
2246                 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2247                 return -EINVAL;
2248         }
2249
2250         reg = &hw->settings->irq_config.hla;
2251         err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2252                                  ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2253                                                       reg->mask));
2254         if (err < 0)
2255                 return err;
2256
2257         pdata = (struct st_sensors_platform_data *)dev->platform_data;
2258         if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2259             (pdata && pdata->open_drain)) {
2260                 reg = &hw->settings->irq_config.od;
2261                 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2262                                          ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2263                 if (err < 0)
2264                         return err;
2265
2266                 irq_type |= IRQF_SHARED;
2267         }
2268
2269         err = devm_request_threaded_irq(hw->dev, hw->irq,
2270                                         NULL,
2271                                         st_lsm6dsx_handler_thread,
2272                                         irq_type | IRQF_ONESHOT,
2273                                         "lsm6dsx", hw);
2274         if (err) {
2275                 dev_err(hw->dev, "failed to request trigger irq %d\n",
2276                         hw->irq);
2277                 return err;
2278         }
2279
2280         return 0;
2281 }
2282
2283 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2284                      struct regmap *regmap)
2285 {
2286         struct st_sensors_platform_data *pdata = dev->platform_data;
2287         const struct st_lsm6dsx_shub_settings *hub_settings;
2288         struct st_lsm6dsx_hw *hw;
2289         const char *name = NULL;
2290         int i, err;
2291
2292         hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2293         if (!hw)
2294                 return -ENOMEM;
2295
2296         dev_set_drvdata(dev, (void *)hw);
2297
2298         mutex_init(&hw->fifo_lock);
2299         mutex_init(&hw->conf_lock);
2300         mutex_init(&hw->page_lock);
2301
2302         hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2303         if (!hw->buff)
2304                 return -ENOMEM;
2305
2306         hw->dev = dev;
2307         hw->irq = irq;
2308         hw->regmap = regmap;
2309
2310         err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2311         if (err < 0)
2312                 return err;
2313
2314         for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2315                 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2316                 if (!hw->iio_devs[i])
2317                         return -ENOMEM;
2318         }
2319
2320         err = st_lsm6dsx_init_device(hw);
2321         if (err < 0)
2322                 return err;
2323
2324         hub_settings = &hw->settings->shub_settings;
2325         if (hub_settings->master_en.addr) {
2326                 err = st_lsm6dsx_shub_probe(hw, name);
2327                 if (err < 0)
2328                         return err;
2329         }
2330
2331         if (hw->irq > 0) {
2332                 err = st_lsm6dsx_irq_setup(hw);
2333                 if (err < 0)
2334                         return err;
2335
2336                 err = st_lsm6dsx_fifo_setup(hw);
2337                 if (err < 0)
2338                         return err;
2339         }
2340
2341         err = iio_read_mount_matrix(hw->dev, "mount-matrix", &hw->orientation);
2342         if (err)
2343                 return err;
2344
2345         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2346                 if (!hw->iio_devs[i])
2347                         continue;
2348
2349                 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2350                 if (err)
2351                         return err;
2352         }
2353
2354         if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2355             (pdata && pdata->wakeup_source))
2356                 device_init_wakeup(dev, true);
2357
2358         return 0;
2359 }
2360 EXPORT_SYMBOL(st_lsm6dsx_probe);
2361
2362 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
2363 {
2364         struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2365         struct st_lsm6dsx_sensor *sensor;
2366         int i, err = 0;
2367
2368         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2369                 if (!hw->iio_devs[i])
2370                         continue;
2371
2372                 sensor = iio_priv(hw->iio_devs[i]);
2373                 if (!(hw->enable_mask & BIT(sensor->id)))
2374                         continue;
2375
2376                 if (device_may_wakeup(dev) &&
2377                     sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2378                         /* Enable wake from IRQ */
2379                         enable_irq_wake(hw->irq);
2380                         continue;
2381                 }
2382
2383                 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2384                     sensor->id == ST_LSM6DSX_ID_EXT1 ||
2385                     sensor->id == ST_LSM6DSX_ID_EXT2)
2386                         err = st_lsm6dsx_shub_set_enable(sensor, false);
2387                 else
2388                         err = st_lsm6dsx_sensor_set_enable(sensor, false);
2389                 if (err < 0)
2390                         return err;
2391
2392                 hw->suspend_mask |= BIT(sensor->id);
2393         }
2394
2395         if (hw->fifo_mask)
2396                 err = st_lsm6dsx_flush_fifo(hw);
2397
2398         return err;
2399 }
2400
2401 static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
2402 {
2403         struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2404         struct st_lsm6dsx_sensor *sensor;
2405         int i, err = 0;
2406
2407         for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2408                 if (!hw->iio_devs[i])
2409                         continue;
2410
2411                 sensor = iio_priv(hw->iio_devs[i]);
2412                 if (device_may_wakeup(dev) &&
2413                     sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2414                         disable_irq_wake(hw->irq);
2415
2416                 if (!(hw->suspend_mask & BIT(sensor->id)))
2417                         continue;
2418
2419                 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2420                     sensor->id == ST_LSM6DSX_ID_EXT1 ||
2421                     sensor->id == ST_LSM6DSX_ID_EXT2)
2422                         err = st_lsm6dsx_shub_set_enable(sensor, true);
2423                 else
2424                         err = st_lsm6dsx_sensor_set_enable(sensor, true);
2425                 if (err < 0)
2426                         return err;
2427
2428                 hw->suspend_mask &= ~BIT(sensor->id);
2429         }
2430
2431         if (hw->fifo_mask)
2432                 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
2433
2434         return err;
2435 }
2436
2437 const struct dev_pm_ops st_lsm6dsx_pm_ops = {
2438         SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
2439 };
2440 EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
2441
2442 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2443 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2444 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2445 MODULE_LICENSE("GPL v2");