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1 /*
2  * Broadcom NetXtreme-E RoCE driver.
3  *
4  * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
5  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  *
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in
21  *    the documentation and/or other materials provided with the
22  *    distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *
36  * Description: Slow Path Operators (header)
37  *
38  */
39
40 #ifndef __BNXT_QPLIB_SP_H__
41 #define __BNXT_QPLIB_SP_H__
42
43 #define BNXT_QPLIB_RESERVED_QP_WRS      128
44
45 #define PCI_EXP_DEVCTL2_ATOMIC_REQ      0x0040
46
47 struct bnxt_qplib_dev_attr {
48 #define FW_VER_ARR_LEN                  4
49         u8                              fw_ver[FW_VER_ARR_LEN];
50         u16                             max_sgid;
51         u16                             max_mrw;
52         u32                             max_qp;
53 #define BNXT_QPLIB_MAX_OUT_RD_ATOM      126
54         u32                             max_qp_rd_atom;
55         u32                             max_qp_init_rd_atom;
56         u32                             max_qp_wqes;
57         u32                             max_qp_sges;
58         u32                             max_cq;
59         u32                             max_cq_wqes;
60         u32                             max_cq_sges;
61         u32                             max_mr;
62         u64                             max_mr_size;
63         u32                             max_pd;
64         u32                             max_mw;
65         u32                             max_raw_ethy_qp;
66         u32                             max_ah;
67         u32                             max_fmr;
68         u32                             max_map_per_fmr;
69         u32                             max_srq;
70         u32                             max_srq_wqes;
71         u32                             max_srq_sges;
72         u32                             max_pkey;
73         u32                             max_inline_data;
74         u32                             l2_db_size;
75         u8                              tqm_alloc_reqs[MAX_TQM_ALLOC_REQ];
76         bool                            is_atomic;
77 };
78
79 struct bnxt_qplib_pd {
80         u32                             id;
81 };
82
83 struct bnxt_qplib_gid {
84         u8                              data[16];
85 };
86
87 struct bnxt_qplib_gid_info {
88         struct bnxt_qplib_gid gid;
89         u16 vlan_id;
90 };
91
92 struct bnxt_qplib_ah {
93         struct bnxt_qplib_gid           dgid;
94         struct bnxt_qplib_pd            *pd;
95         u32                             id;
96         u8                              sgid_index;
97         /* For Query AH if the hw table and SW table are differnt */
98         u8                              host_sgid_index;
99         u8                              traffic_class;
100         u32                             flow_label;
101         u8                              hop_limit;
102         u8                              sl;
103         u8                              dmac[6];
104         u16                             vlan_id;
105         u8                              nw_type;
106 };
107
108 struct bnxt_qplib_mrw {
109         struct bnxt_qplib_pd            *pd;
110         int                             type;
111         u32                             flags;
112 #define BNXT_QPLIB_FR_PMR               0x80000000
113         u32                             lkey;
114         u32                             rkey;
115 #define BNXT_QPLIB_RSVD_LKEY            0xFFFFFFFF
116         u64                             va;
117         u64                             total_size;
118         u32                             npages;
119         u64                             mr_handle;
120         struct bnxt_qplib_hwq           hwq;
121 };
122
123 struct bnxt_qplib_frpl {
124         int                             max_pg_ptrs;
125         struct bnxt_qplib_hwq           hwq;
126 };
127
128 #define BNXT_QPLIB_ACCESS_LOCAL_WRITE   BIT(0)
129 #define BNXT_QPLIB_ACCESS_REMOTE_READ   BIT(1)
130 #define BNXT_QPLIB_ACCESS_REMOTE_WRITE  BIT(2)
131 #define BNXT_QPLIB_ACCESS_REMOTE_ATOMIC BIT(3)
132 #define BNXT_QPLIB_ACCESS_MW_BIND       BIT(4)
133 #define BNXT_QPLIB_ACCESS_ZERO_BASED    BIT(5)
134 #define BNXT_QPLIB_ACCESS_ON_DEMAND     BIT(6)
135
136 struct bnxt_qplib_roce_stats {
137         u64 to_retransmits;
138         u64 seq_err_naks_rcvd;
139         /* seq_err_naks_rcvd is 64 b */
140         u64 max_retry_exceeded;
141         /* max_retry_exceeded is 64 b */
142         u64 rnr_naks_rcvd;
143         /* rnr_naks_rcvd is 64 b */
144         u64 missing_resp;
145         u64 unrecoverable_err;
146         /* unrecoverable_err is 64 b */
147         u64 bad_resp_err;
148         /* bad_resp_err is 64 b */
149         u64 local_qp_op_err;
150         /* local_qp_op_err is 64 b */
151         u64 local_protection_err;
152         /* local_protection_err is 64 b */
153         u64 mem_mgmt_op_err;
154         /* mem_mgmt_op_err is 64 b */
155         u64 remote_invalid_req_err;
156         /* remote_invalid_req_err is 64 b */
157         u64 remote_access_err;
158         /* remote_access_err is 64 b */
159         u64 remote_op_err;
160         /* remote_op_err is 64 b */
161         u64 dup_req;
162         /* dup_req is 64 b */
163         u64 res_exceed_max;
164         /* res_exceed_max is 64 b */
165         u64 res_length_mismatch;
166         /* res_length_mismatch is 64 b */
167         u64 res_exceeds_wqe;
168         /* res_exceeds_wqe is 64 b */
169         u64 res_opcode_err;
170         /* res_opcode_err is 64 b */
171         u64 res_rx_invalid_rkey;
172         /* res_rx_invalid_rkey is 64 b */
173         u64 res_rx_domain_err;
174         /* res_rx_domain_err is 64 b */
175         u64 res_rx_no_perm;
176         /* res_rx_no_perm is 64 b */
177         u64 res_rx_range_err;
178         /* res_rx_range_err is 64 b */
179         u64 res_tx_invalid_rkey;
180         /* res_tx_invalid_rkey is 64 b */
181         u64 res_tx_domain_err;
182         /* res_tx_domain_err is 64 b */
183         u64 res_tx_no_perm;
184         /* res_tx_no_perm is 64 b */
185         u64 res_tx_range_err;
186         /* res_tx_range_err is 64 b */
187         u64 res_irrq_oflow;
188         /* res_irrq_oflow is 64 b */
189         u64 res_unsup_opcode;
190         /* res_unsup_opcode is 64 b */
191         u64 res_unaligned_atomic;
192         /* res_unaligned_atomic is 64 b */
193         u64 res_rem_inv_err;
194         /* res_rem_inv_err is 64 b */
195         u64 res_mem_error;
196         /* res_mem_error is 64 b */
197         u64 res_srq_err;
198         /* res_srq_err is 64 b */
199         u64 res_cmp_err;
200         /* res_cmp_err is 64 b */
201         u64 res_invalid_dup_rkey;
202         /* res_invalid_dup_rkey is 64 b */
203         u64 res_wqe_format_err;
204         /* res_wqe_format_err is 64 b */
205         u64 res_cq_load_err;
206         /* res_cq_load_err is 64 b */
207         u64 res_srq_load_err;
208         /* res_srq_load_err is 64 b */
209         u64 res_tx_pci_err;
210         /* res_tx_pci_err is 64 b */
211         u64 res_rx_pci_err;
212         /* res_rx_pci_err is 64 b */
213         u64 res_oos_drop_count;
214         /* res_oos_drop_count */
215         u64     active_qp_count_p0;
216         /* port 0 active qps */
217         u64     active_qp_count_p1;
218         /* port 1 active qps */
219         u64     active_qp_count_p2;
220         /* port 2 active qps */
221         u64     active_qp_count_p3;
222         /* port 3 active qps */
223 };
224
225 int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res,
226                         struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
227                         struct bnxt_qplib_gid *gid);
228 int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
229                         struct bnxt_qplib_gid *gid, u16 vlan_id, bool update);
230 int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
231                         struct bnxt_qplib_gid *gid, u8 *mac, u16 vlan_id,
232                         bool update, u32 *index);
233 int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
234                            struct bnxt_qplib_gid *gid, u16 gid_idx, u8 *smac);
235 int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res,
236                         struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index,
237                         u16 *pkey);
238 int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res,
239                         struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
240                         bool update);
241 int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res,
242                         struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey,
243                         bool update);
244 int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw,
245                             struct bnxt_qplib_dev_attr *attr, bool vf);
246 int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res,
247                                   struct bnxt_qplib_rcfw *rcfw,
248                                   struct bnxt_qplib_ctx *ctx);
249 int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
250                          bool block);
251 void bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah,
252                            bool block);
253 int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res,
254                          struct bnxt_qplib_mrw *mrw);
255 int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw,
256                          bool block);
257 int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr,
258                       u64 *pbl_tbl, int num_pbls, bool block, u32 buf_pg_size);
259 int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr);
260 int bnxt_qplib_alloc_fast_reg_mr(struct bnxt_qplib_res *res,
261                                  struct bnxt_qplib_mrw *mr, int max);
262 int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res,
263                                         struct bnxt_qplib_frpl *frpl, int max);
264 int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res,
265                                        struct bnxt_qplib_frpl *frpl);
266 int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids);
267 int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw,
268                               struct bnxt_qplib_roce_stats *stats);
269 #endif /* __BNXT_QPLIB_SP_H__*/