2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/acpi.h>
34 #include <linux/of_platform.h>
35 #include <rdma/ib_addr.h>
36 #include <rdma/ib_smi.h>
37 #include <rdma/ib_user_verbs.h>
38 #include <rdma/ib_cache.h>
39 #include "hns_roce_common.h"
40 #include "hns_roce_device.h"
41 #include <rdma/hns-abi.h>
42 #include "hns_roce_hem.h"
45 * hns_get_gid_index - Get gid index.
46 * @hr_dev: pointer to structure hns_roce_dev.
47 * @port: port, value range: 0 ~ MAX
48 * @gid_index: gid_index, value range: 0 ~ MAX
50 * N ports shared gids, allocation method as follow:
51 * GID[0][0], GID[1][0],.....GID[N - 1][0],
52 * GID[0][0], GID[1][0],.....GID[N - 1][0],
55 int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57 return gid_index * hr_dev->caps.num_ports + port;
60 static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
65 if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
68 for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
69 hr_dev->dev_addr[port][i] = addr[i];
71 phy_port = hr_dev->iboe.phy_port[port];
72 hr_dev->hw->set_mac(hr_dev, phy_port, addr);
75 static int hns_roce_add_gid(struct ib_device *device, u8 port_num,
76 unsigned int index, const union ib_gid *gid,
77 const struct ib_gid_attr *attr, void **context)
79 struct hns_roce_dev *hr_dev = to_hr_dev(device);
80 u8 port = port_num - 1;
83 if (port >= hr_dev->caps.num_ports)
86 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
88 hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid);
90 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
95 static int hns_roce_del_gid(struct ib_device *device, u8 port_num,
96 unsigned int index, void **context)
98 struct hns_roce_dev *hr_dev = to_hr_dev(device);
99 union ib_gid zgid = { {0} };
100 u8 port = port_num - 1;
103 if (port >= hr_dev->caps.num_ports)
106 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
108 hr_dev->hw->set_gid(hr_dev, port, index, &zgid);
110 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
115 static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
118 struct device *dev = &hr_dev->pdev->dev;
119 struct net_device *netdev;
121 netdev = hr_dev->iboe.netdevs[port];
123 dev_err(dev, "port(%d) can't find netdev\n", port);
127 spin_lock_bh(&hr_dev->iboe.lock);
132 case NETDEV_REGISTER:
133 case NETDEV_CHANGEADDR:
134 hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
138 * In v1 engine, only support all ports closed together.
142 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
146 spin_unlock_bh(&hr_dev->iboe.lock);
150 static int hns_roce_netdev_event(struct notifier_block *self,
151 unsigned long event, void *ptr)
153 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
154 struct hns_roce_ib_iboe *iboe = NULL;
155 struct hns_roce_dev *hr_dev = NULL;
159 hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
160 iboe = &hr_dev->iboe;
162 for (port = 0; port < hr_dev->caps.num_ports; port++) {
163 if (dev == iboe->netdevs[port]) {
164 ret = handle_en_event(hr_dev, port, event);
174 static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
178 for (i = 0; i < hr_dev->caps.num_ports; i++) {
179 hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
180 hr_dev->caps.max_mtu);
181 hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr);
187 static int hns_roce_query_device(struct ib_device *ib_dev,
188 struct ib_device_attr *props,
189 struct ib_udata *uhw)
191 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
193 memset(props, 0, sizeof(*props));
195 props->sys_image_guid = hr_dev->sys_image_guid;
196 props->max_mr_size = (u64)(~(0ULL));
197 props->page_size_cap = hr_dev->caps.page_size_cap;
198 props->vendor_id = hr_dev->vendor_id;
199 props->vendor_part_id = hr_dev->vendor_part_id;
200 props->hw_ver = hr_dev->hw_rev;
201 props->max_qp = hr_dev->caps.num_qps;
202 props->max_qp_wr = hr_dev->caps.max_wqes;
203 props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
204 IB_DEVICE_RC_RNR_NAK_GEN;
205 props->max_sge = hr_dev->caps.max_sq_sg;
206 props->max_sge_rd = 1;
207 props->max_cq = hr_dev->caps.num_cqs;
208 props->max_cqe = hr_dev->caps.max_cqes;
209 props->max_mr = hr_dev->caps.num_mtpts;
210 props->max_pd = hr_dev->caps.num_pds;
211 props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
212 props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
213 props->atomic_cap = IB_ATOMIC_NONE;
214 props->max_pkeys = 1;
215 props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
220 static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
223 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
224 struct net_device *ndev;
226 if (port_num < 1 || port_num > hr_dev->caps.num_ports)
231 ndev = hr_dev->iboe.netdevs[port_num - 1];
239 static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
240 struct ib_port_attr *props)
242 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
243 struct device *dev = &hr_dev->pdev->dev;
244 struct net_device *net_dev;
249 assert(port_num > 0);
252 memset(props, 0, sizeof(*props));
254 props->max_mtu = hr_dev->caps.max_mtu;
255 props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
256 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
257 IB_PORT_VENDOR_CLASS_SUP |
258 IB_PORT_BOOT_MGMT_SUP;
259 props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
260 props->pkey_tbl_len = 1;
261 props->active_width = IB_WIDTH_4X;
262 props->active_speed = 1;
264 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
266 net_dev = hr_dev->iboe.netdevs[port];
268 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
269 dev_err(dev, "find netdev %d failed!\r\n", port);
273 mtu = iboe_get_mtu(net_dev->mtu);
274 props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
275 props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
276 IB_PORT_ACTIVE : IB_PORT_DOWN;
277 props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
279 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
284 static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
287 return IB_LINK_LAYER_ETHERNET;
290 static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index,
296 static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
304 static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
305 struct ib_device_modify *props)
309 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
312 if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
313 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
314 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
315 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
321 static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
322 struct ib_port_modify *props)
327 static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
328 struct ib_udata *udata)
331 struct hns_roce_ucontext *context;
332 struct hns_roce_ib_alloc_ucontext_resp resp;
333 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
335 resp.qp_tab_size = hr_dev->caps.num_qps;
337 context = kmalloc(sizeof(*context), GFP_KERNEL);
339 return ERR_PTR(-ENOMEM);
341 ret = hns_roce_uar_alloc(hr_dev, &context->uar);
343 goto error_fail_uar_alloc;
345 ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
347 goto error_fail_copy_to_udata;
349 return &context->ibucontext;
351 error_fail_copy_to_udata:
352 hns_roce_uar_free(hr_dev, &context->uar);
354 error_fail_uar_alloc:
360 static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
362 struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
364 hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
370 static int hns_roce_mmap(struct ib_ucontext *context,
371 struct vm_area_struct *vma)
373 struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
375 if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
378 if (vma->vm_pgoff == 0) {
379 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
380 if (io_remap_pfn_range(vma, vma->vm_start,
381 to_hr_ucontext(context)->uar.pfn,
382 PAGE_SIZE, vma->vm_page_prot))
384 } else if (vma->vm_pgoff == 1 && hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
385 /* vm_pgoff: 1 -- TPTR */
386 if (io_remap_pfn_range(vma, vma->vm_start,
387 hr_dev->tptr_dma_addr >> PAGE_SHIFT,
397 static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
398 struct ib_port_immutable *immutable)
400 struct ib_port_attr attr;
403 ret = hns_roce_query_port(ib_dev, port_num, &attr);
407 immutable->pkey_tbl_len = attr.pkey_tbl_len;
408 immutable->gid_tbl_len = attr.gid_tbl_len;
410 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
411 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
416 static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
418 struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
420 unregister_inetaddr_notifier(&iboe->nb_inet);
421 unregister_netdevice_notifier(&iboe->nb);
422 ib_unregister_device(&hr_dev->ib_dev);
425 static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
428 struct hns_roce_ib_iboe *iboe = NULL;
429 struct ib_device *ib_dev = NULL;
430 struct device *dev = &hr_dev->pdev->dev;
432 iboe = &hr_dev->iboe;
433 spin_lock_init(&iboe->lock);
435 ib_dev = &hr_dev->ib_dev;
436 strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
438 ib_dev->owner = THIS_MODULE;
439 ib_dev->node_type = RDMA_NODE_IB_CA;
440 ib_dev->dma_device = dev;
442 ib_dev->phys_port_cnt = hr_dev->caps.num_ports;
443 ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;
444 ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;
445 ib_dev->uverbs_abi_ver = 1;
446 ib_dev->uverbs_cmd_mask =
447 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
448 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
449 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
450 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
451 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
452 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
453 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
454 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
455 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
456 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
457 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
458 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
459 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
460 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
462 /* HCA||device||port */
463 ib_dev->modify_device = hns_roce_modify_device;
464 ib_dev->query_device = hns_roce_query_device;
465 ib_dev->query_port = hns_roce_query_port;
466 ib_dev->modify_port = hns_roce_modify_port;
467 ib_dev->get_link_layer = hns_roce_get_link_layer;
468 ib_dev->get_netdev = hns_roce_get_netdev;
469 ib_dev->query_gid = hns_roce_query_gid;
470 ib_dev->add_gid = hns_roce_add_gid;
471 ib_dev->del_gid = hns_roce_del_gid;
472 ib_dev->query_pkey = hns_roce_query_pkey;
473 ib_dev->alloc_ucontext = hns_roce_alloc_ucontext;
474 ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext;
475 ib_dev->mmap = hns_roce_mmap;
478 ib_dev->alloc_pd = hns_roce_alloc_pd;
479 ib_dev->dealloc_pd = hns_roce_dealloc_pd;
482 ib_dev->create_ah = hns_roce_create_ah;
483 ib_dev->query_ah = hns_roce_query_ah;
484 ib_dev->destroy_ah = hns_roce_destroy_ah;
487 ib_dev->create_qp = hns_roce_create_qp;
488 ib_dev->modify_qp = hns_roce_modify_qp;
489 ib_dev->query_qp = hr_dev->hw->query_qp;
490 ib_dev->destroy_qp = hr_dev->hw->destroy_qp;
491 ib_dev->post_send = hr_dev->hw->post_send;
492 ib_dev->post_recv = hr_dev->hw->post_recv;
495 ib_dev->create_cq = hns_roce_ib_create_cq;
496 ib_dev->destroy_cq = hns_roce_ib_destroy_cq;
497 ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq;
498 ib_dev->poll_cq = hr_dev->hw->poll_cq;
501 ib_dev->get_dma_mr = hns_roce_get_dma_mr;
502 ib_dev->reg_user_mr = hns_roce_reg_user_mr;
503 ib_dev->dereg_mr = hns_roce_dereg_mr;
506 ib_dev->get_port_immutable = hns_roce_port_immutable;
508 ret = ib_register_device(ib_dev, NULL);
510 dev_err(dev, "ib_register_device failed!\n");
514 ret = hns_roce_setup_mtu_mac(hr_dev);
516 dev_err(dev, "setup_mtu_mac failed!\n");
517 goto error_failed_setup_mtu_mac;
520 iboe->nb.notifier_call = hns_roce_netdev_event;
521 ret = register_netdevice_notifier(&iboe->nb);
523 dev_err(dev, "register_netdevice_notifier failed!\n");
524 goto error_failed_setup_mtu_mac;
529 error_failed_setup_mtu_mac:
530 ib_unregister_device(ib_dev);
535 static const struct of_device_id hns_roce_of_match[] = {
536 { .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, },
539 MODULE_DEVICE_TABLE(of, hns_roce_of_match);
541 static const struct acpi_device_id hns_roce_acpi_match[] = {
542 { "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 },
545 MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match);
547 static int hns_roce_node_match(struct device *dev, void *fwnode)
549 return dev->fwnode == fwnode;
553 platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode)
557 /* get the 'device'corresponding to matching 'fwnode' */
558 dev = bus_find_device(&platform_bus_type, NULL,
559 fwnode, hns_roce_node_match);
560 /* get the platform device */
561 return dev ? to_platform_device(dev) : NULL;
564 static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev)
570 struct device *dev = &hr_dev->pdev->dev;
571 struct device_node *net_node;
572 struct net_device *netdev = NULL;
573 struct platform_device *pdev = NULL;
574 struct resource *res;
576 /* check if we are compatible with the underlying SoC */
577 if (dev_of_node(dev)) {
578 const struct of_device_id *of_id;
580 of_id = of_match_node(hns_roce_of_match, dev->of_node);
582 dev_err(dev, "device is not compatible!\n");
585 hr_dev->hw = (struct hns_roce_hw *)of_id->data;
587 dev_err(dev, "couldn't get H/W specific DT data!\n");
590 } else if (is_acpi_device_node(dev->fwnode)) {
591 const struct acpi_device_id *acpi_id;
593 acpi_id = acpi_match_device(hns_roce_acpi_match, dev);
595 dev_err(dev, "device is not compatible!\n");
598 hr_dev->hw = (struct hns_roce_hw *) acpi_id->driver_data;
600 dev_err(dev, "couldn't get H/W specific ACPI data!\n");
604 dev_err(dev, "can't read compatibility data from DT or ACPI\n");
608 /* get the mapped register base address */
609 res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
611 dev_err(dev, "memory resource not found!\n");
614 hr_dev->reg_base = devm_ioremap_resource(dev, res);
615 if (IS_ERR(hr_dev->reg_base))
616 return PTR_ERR(hr_dev->reg_base);
618 /* read the node_guid of IB device from the DT or ACPI */
619 ret = device_property_read_u8_array(dev, "node-guid",
620 (u8 *)&hr_dev->ib_dev.node_guid,
623 dev_err(dev, "couldn't get node_guid from DT or ACPI!\n");
627 /* get the RoCE associated ethernet ports or netdevices */
628 for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) {
629 if (dev_of_node(dev)) {
630 net_node = of_parse_phandle(dev->of_node, "eth-handle",
634 pdev = of_find_device_by_node(net_node);
635 } else if (is_acpi_device_node(dev->fwnode)) {
636 struct acpi_reference_args args;
637 struct fwnode_handle *fwnode;
639 ret = acpi_node_get_property_reference(dev->fwnode,
644 fwnode = acpi_fwnode_handle(args.adev);
645 pdev = hns_roce_find_pdev(fwnode);
647 dev_err(dev, "cannot read data from DT or ACPI\n");
652 netdev = platform_get_drvdata(pdev);
655 hr_dev->iboe.netdevs[port_cnt] = netdev;
656 hr_dev->iboe.phy_port[port_cnt] = phy_port;
658 dev_err(dev, "no netdev found with pdev %s\n",
667 dev_err(dev, "unable to get eth-handle for available ports!\n");
671 hr_dev->caps.num_ports = port_cnt;
673 /* cmd issue mode: 0 is poll, 1 is event */
675 hr_dev->loop_idc = 0;
677 /* read the interrupt names from the DT or ACPI */
678 ret = device_property_read_string_array(dev, "interrupt-names",
680 HNS_ROCE_MAX_IRQ_NUM);
682 dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n");
686 /* fetch the interrupt numbers */
687 for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) {
688 hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i);
689 if (hr_dev->irq[i] <= 0) {
690 dev_err(dev, "platform get of irq[=%d] failed!\n", i);
698 static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
701 struct device *dev = &hr_dev->pdev->dev;
703 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
704 HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
705 hr_dev->caps.num_mtt_segs, 1);
707 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
711 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
712 HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
713 hr_dev->caps.num_mtpts, 1);
715 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
719 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
720 HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
721 hr_dev->caps.num_qps, 1);
723 dev_err(dev, "Failed to init QP context memory, aborting.\n");
727 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
729 hr_dev->caps.irrl_entry_sz *
730 hr_dev->caps.max_qp_init_rdma,
731 hr_dev->caps.num_qps, 1);
733 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
737 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
738 HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
739 hr_dev->caps.num_cqs, 1);
741 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
748 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
751 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
754 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
757 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
763 * hns_roce_setup_hca - setup host channel adapter
764 * @hr_dev: pointer to hns roce device
767 static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
770 struct device *dev = &hr_dev->pdev->dev;
772 spin_lock_init(&hr_dev->sm_lock);
773 spin_lock_init(&hr_dev->bt_cmd_lock);
775 ret = hns_roce_init_uar_table(hr_dev);
777 dev_err(dev, "Failed to initialize uar table. aborting\n");
781 ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
783 dev_err(dev, "Failed to allocate priv_uar.\n");
784 goto err_uar_table_free;
787 ret = hns_roce_init_pd_table(hr_dev);
789 dev_err(dev, "Failed to init protected domain table.\n");
790 goto err_uar_alloc_free;
793 ret = hns_roce_init_mr_table(hr_dev);
795 dev_err(dev, "Failed to init memory region table.\n");
796 goto err_pd_table_free;
799 ret = hns_roce_init_cq_table(hr_dev);
801 dev_err(dev, "Failed to init completion queue table.\n");
802 goto err_mr_table_free;
805 ret = hns_roce_init_qp_table(hr_dev);
807 dev_err(dev, "Failed to init queue pair table.\n");
808 goto err_cq_table_free;
814 hns_roce_cleanup_cq_table(hr_dev);
817 hns_roce_cleanup_mr_table(hr_dev);
820 hns_roce_cleanup_pd_table(hr_dev);
823 hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
826 hns_roce_cleanup_uar_table(hr_dev);
831 * hns_roce_probe - RoCE driver entrance
832 * @pdev: pointer to platform device
836 static int hns_roce_probe(struct platform_device *pdev)
839 struct hns_roce_dev *hr_dev;
840 struct device *dev = &pdev->dev;
842 hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev));
847 platform_set_drvdata(pdev, hr_dev);
849 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) &&
850 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) {
851 dev_err(dev, "Not usable DMA addressing mode\n");
853 goto error_failed_get_cfg;
856 ret = hns_roce_get_cfg(hr_dev);
858 dev_err(dev, "Get Configuration failed!\n");
859 goto error_failed_get_cfg;
862 ret = hr_dev->hw->reset(hr_dev, true);
864 dev_err(dev, "Reset RoCE engine failed!\n");
865 goto error_failed_get_cfg;
868 hr_dev->hw->hw_profile(hr_dev);
870 ret = hns_roce_cmd_init(hr_dev);
872 dev_err(dev, "cmd init failed!\n");
873 goto error_failed_cmd_init;
876 ret = hns_roce_init_eq_table(hr_dev);
878 dev_err(dev, "eq init failed!\n");
879 goto error_failed_eq_table;
882 if (hr_dev->cmd_mod) {
883 ret = hns_roce_cmd_use_events(hr_dev);
885 dev_err(dev, "Switch to event-driven cmd failed!\n");
886 goto error_failed_use_event;
890 ret = hns_roce_init_hem(hr_dev);
892 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
893 goto error_failed_init_hem;
896 ret = hns_roce_setup_hca(hr_dev);
898 dev_err(dev, "setup hca failed!\n");
899 goto error_failed_setup_hca;
902 ret = hr_dev->hw->hw_init(hr_dev);
904 dev_err(dev, "hw_init failed!\n");
905 goto error_failed_engine_init;
908 ret = hns_roce_register_device(hr_dev);
910 goto error_failed_register_device;
914 error_failed_register_device:
915 hr_dev->hw->hw_exit(hr_dev);
917 error_failed_engine_init:
918 hns_roce_cleanup_bitmap(hr_dev);
920 error_failed_setup_hca:
921 hns_roce_cleanup_hem(hr_dev);
923 error_failed_init_hem:
925 hns_roce_cmd_use_polling(hr_dev);
927 error_failed_use_event:
928 hns_roce_cleanup_eq_table(hr_dev);
930 error_failed_eq_table:
931 hns_roce_cmd_cleanup(hr_dev);
933 error_failed_cmd_init:
934 ret = hr_dev->hw->reset(hr_dev, false);
936 dev_err(&hr_dev->pdev->dev, "roce_engine reset fail\n");
938 error_failed_get_cfg:
939 ib_dealloc_device(&hr_dev->ib_dev);
945 * hns_roce_remove - remove RoCE device
946 * @pdev: pointer to platform device
948 static int hns_roce_remove(struct platform_device *pdev)
950 struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev);
952 hns_roce_unregister_device(hr_dev);
953 hr_dev->hw->hw_exit(hr_dev);
954 hns_roce_cleanup_bitmap(hr_dev);
955 hns_roce_cleanup_hem(hr_dev);
958 hns_roce_cmd_use_polling(hr_dev);
960 hns_roce_cleanup_eq_table(hr_dev);
961 hns_roce_cmd_cleanup(hr_dev);
962 hr_dev->hw->reset(hr_dev, false);
964 ib_dealloc_device(&hr_dev->ib_dev);
969 static struct platform_driver hns_roce_driver = {
970 .probe = hns_roce_probe,
971 .remove = hns_roce_remove,
974 .of_match_table = hns_roce_of_match,
975 .acpi_match_table = ACPI_PTR(hns_roce_acpi_match),
979 module_platform_driver(hns_roce_driver);
981 MODULE_LICENSE("Dual BSD/GPL");
982 MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
983 MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
984 MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
985 MODULE_DESCRIPTION("HNS RoCE Driver");