2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/module.h>
34 #include <rdma/ib_umem.h>
35 #include <rdma/ib_umem_odp.h>
37 #include <linux/jiffies.h>
39 /* @umem: umem object to scan
40 * @addr: ib virtual address requested by the user
41 * @max_page_shift: high limit for page_shift - 0 means no limit
42 * @count: number of PAGE_SIZE pages covered by umem
43 * @shift: page shift for the compound pages found in the region
44 * @ncont: number of compund pages
45 * @order: log2 of the number of compound pages
47 void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr,
48 unsigned long max_page_shift,
49 int *count, int *shift,
50 int *ncont, int *order)
57 struct scatterlist *sg;
60 addr = addr >> PAGE_SHIFT;
61 tmp = (unsigned long)addr;
62 m = find_first_bit(&tmp, BITS_PER_LONG);
64 m = min_t(unsigned long, max_page_shift - PAGE_SHIFT, m);
66 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
67 len = sg_dma_len(sg) >> PAGE_SHIFT;
68 pfn = sg_dma_address(sg) >> PAGE_SHIFT;
69 if (base + p != pfn) {
70 /* If either the offset or the new
71 * base are unaligned update m
73 tmp = (unsigned long)(pfn | p);
74 if (!IS_ALIGNED(tmp, 1 << m))
75 m = find_first_bit(&tmp, BITS_PER_LONG);
86 m = min_t(unsigned long, ilog2(roundup_pow_of_two(i)), m);
89 *order = ilog2(roundup_pow_of_two(i) >> m);
91 *ncont = DIV_ROUND_UP(i, (1 << m));
100 *shift = PAGE_SHIFT + m;
105 * Populate the given array with bus addresses from the umem.
107 * dev - mlx5_ib device
108 * umem - umem to use to fill the pages
109 * page_shift - determines the page size used in the resulting array
110 * offset - offset into the umem to start from,
111 * only implemented for ODP umems
112 * num_pages - total number of pages to fill
113 * pas - bus addresses array to fill
114 * access_flags - access flags to set on all present pages.
115 use enum mlx5_ib_mtt_access_flags for this.
117 void __mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem,
118 int page_shift, size_t offset, size_t num_pages,
119 __be64 *pas, int access_flags)
121 int shift = page_shift - PAGE_SHIFT;
122 int mask = (1 << shift) - 1;
127 struct scatterlist *sg;
131 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
132 len = sg_dma_len(sg) >> PAGE_SHIFT;
133 base = sg_dma_address(sg);
135 /* Skip elements below offset */
136 if (i + len < offset << shift) {
141 /* Skip pages below offset */
142 if (i < offset << shift) {
143 k = (offset << shift) - i;
149 for (; k < len; k++) {
151 cur = base + (k << PAGE_SHIFT);
153 idx = (i >> shift) - offset;
155 pas[idx] = cpu_to_be64(cur);
156 mlx5_ib_dbg(dev, "pas[%d] 0x%llx\n",
157 i >> shift, be64_to_cpu(pas[idx]));
161 /* Stop after num_pages reached */
162 if (i >> shift >= offset + num_pages)
168 void mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem,
169 int page_shift, __be64 *pas, int access_flags)
171 return __mlx5_ib_populate_pas(dev, umem, page_shift, 0,
172 ib_umem_num_pages(umem), pas,
175 int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset)
183 page_size = (u64)1 << page_shift;
184 page_mask = page_size - 1;
185 buf_off = addr & page_mask;
186 off_size = page_size >> 6;
187 off_mask = off_size - 1;
189 if (buf_off & off_mask)
192 *offset = buf_off >> ilog2(off_size);
196 #define WR_ID_BF 0xBF
197 #define WR_ID_END 0xBAD
198 #define TEST_WC_NUM_WQES 255
199 #define TEST_WC_POLLING_MAX_TIME_JIFFIES msecs_to_jiffies(100)
200 static int post_send_nop(struct mlx5_ib_dev *dev, struct ib_qp *ibqp, u64 wr_id,
203 struct mlx5_ib_qp *qp = to_mqp(ibqp);
204 struct mlx5_wqe_ctrl_seg *ctrl;
205 struct mlx5_bf *bf = &qp->bf;
206 __be32 mmio_wqe[16] = {};
211 if (unlikely(dev->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR))
214 spin_lock_irqsave(&qp->sq.lock, flags);
216 idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1);
217 ctrl = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx);
219 memset(ctrl, 0, sizeof(struct mlx5_wqe_ctrl_seg));
220 ctrl->fm_ce_se = signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0;
221 ctrl->opmod_idx_opcode =
222 cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | MLX5_OPCODE_NOP);
223 ctrl->qpn_ds = cpu_to_be32((sizeof(struct mlx5_wqe_ctrl_seg) / 16) |
224 (qp->trans_qp.base.mqp.qpn << 8));
226 qp->sq.wrid[idx] = wr_id;
227 qp->sq.w_list[idx].opcode = MLX5_OPCODE_NOP;
228 qp->sq.wqe_head[idx] = qp->sq.head + 1;
229 qp->sq.cur_post += DIV_ROUND_UP(sizeof(struct mlx5_wqe_ctrl_seg),
231 qp->sq.w_list[idx].next = qp->sq.cur_post;
234 memcpy(mmio_wqe, ctrl, sizeof(*ctrl));
235 ((struct mlx5_wqe_ctrl_seg *)&mmio_wqe)->fm_ce_se |=
236 MLX5_WQE_CTRL_CQ_UPDATE;
238 /* Make sure that descriptors are written before
239 * updating doorbell record and ringing the doorbell
243 qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post);
245 /* Make sure doorbell record is visible to the HCA before
249 for (i = 0; i < 8; i++)
250 mlx5_write64(&mmio_wqe[i * 2],
251 bf->bfreg->map + bf->offset + i * 8);
253 bf->offset ^= bf->buf_size;
255 spin_unlock_irqrestore(&qp->sq.lock, flags);
260 static int test_wc_poll_cq_result(struct mlx5_ib_dev *dev, struct ib_cq *cq)
263 struct ib_wc wc = {};
264 unsigned long end = jiffies + TEST_WC_POLLING_MAX_TIME_JIFFIES;
267 ret = ib_poll_cq(cq, 1, &wc);
268 if (ret < 0 || wc.status)
269 return ret < 0 ? ret : -EINVAL;
272 } while (!time_after(jiffies, end));
277 if (wc.wr_id != WR_ID_BF)
283 static int test_wc_do_send(struct mlx5_ib_dev *dev, struct ib_qp *qp)
287 for (i = 0; i < TEST_WC_NUM_WQES; i++) {
288 err = post_send_nop(dev, qp, WR_ID_BF, false);
293 return post_send_nop(dev, qp, WR_ID_END, true);
296 int mlx5_ib_test_wc(struct mlx5_ib_dev *dev)
298 struct ib_cq_init_attr cq_attr = { .cqe = TEST_WC_NUM_WQES + 1 };
299 int port_type_cap = MLX5_CAP_GEN(dev->mdev, port_type);
300 struct ib_qp_init_attr qp_init_attr = {
301 .cap = { .max_send_wr = TEST_WC_NUM_WQES },
302 .qp_type = IB_QPT_UD,
303 .sq_sig_type = IB_SIGNAL_REQ_WR,
304 .create_flags = MLX5_IB_QP_CREATE_WC_TEST,
306 struct ib_qp_attr qp_attr = { .port_num = 1 };
307 struct ib_device *ibdev = &dev->ib_dev;
313 if (!MLX5_CAP_GEN(dev->mdev, bf))
316 if (!dev->mdev->roce.roce_en &&
317 port_type_cap == MLX5_CAP_PORT_TYPE_ETH) {
318 if (mlx5_core_is_pf(dev->mdev))
319 dev->wc_support = true;
323 ret = mlx5_alloc_bfreg(dev->mdev, &dev->wc_bfreg, true, false);
327 if (!dev->wc_bfreg.wc)
330 pd = ib_alloc_pd(ibdev, 0);
336 cq = ib_create_cq(ibdev, NULL, NULL, NULL, &cq_attr);
342 qp_init_attr.recv_cq = cq;
343 qp_init_attr.send_cq = cq;
344 qp = ib_create_qp(pd, &qp_init_attr);
350 qp_attr.qp_state = IB_QPS_INIT;
351 ret = ib_modify_qp(qp, &qp_attr,
352 IB_QP_STATE | IB_QP_PORT | IB_QP_PKEY_INDEX |
357 qp_attr.qp_state = IB_QPS_RTR;
358 ret = ib_modify_qp(qp, &qp_attr, IB_QP_STATE);
362 qp_attr.qp_state = IB_QPS_RTS;
363 ret = ib_modify_qp(qp, &qp_attr, IB_QP_STATE | IB_QP_SQ_PSN);
367 ret = test_wc_do_send(dev, qp);
371 ret = test_wc_poll_cq_result(dev, cq);
373 dev->wc_support = true;
384 mlx5_free_bfreg(dev->mdev, &dev->wc_bfreg);
389 "Error %d while trying to test write-combining support\n",