1 /* QLogic qedr NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <rdma/ib_addr.h>
37 #include <linux/qed/qed_if.h>
38 #include <linux/qed/qed_chain.h>
39 #include <linux/qed/qed_roce_if.h>
40 #include <linux/qed/qede_roce.h>
43 #define QEDR_MODULE_VERSION "8.10.10.0"
44 #define QEDR_NODE_DESC "QLogic 579xx RoCE HCA"
45 #define DP_NAME(dev) ((dev)->ibdev.name)
47 #define DP_DEBUG(dev, module, fmt, ...) \
48 pr_debug("(%s) " module ": " fmt, \
49 DP_NAME(dev) ? DP_NAME(dev) : "", ## __VA_ARGS__)
51 #define QEDR_MSG_INIT "INIT"
52 #define QEDR_MSG_MISC "MISC"
53 #define QEDR_MSG_CQ " CQ"
54 #define QEDR_MSG_MR " MR"
55 #define QEDR_MSG_RQ " RQ"
56 #define QEDR_MSG_SQ " SQ"
57 #define QEDR_MSG_QP " QP"
58 #define QEDR_MSG_GSI " GSI"
60 #define QEDR_CQ_MAGIC_NUMBER (0x11223344)
67 struct qed_sb_info *sb;
74 #define QEDR_MAX_SGID 128
76 struct qedr_device_attr {
88 u8 max_qp_resp_rd_atomic_resc;
89 u8 max_qp_req_rd_atomic_resc;
90 u64 max_dev_resp_rd_atomic_resc;
98 u32 max_mr_mw_fmr_pbl;
99 u64 max_mr_mw_fmr_size;
112 u32 bad_pkey_counter;
113 struct qed_rdma_events events;
117 struct ib_device ibdev;
118 struct qed_dev *cdev;
119 struct pci_dev *pdev;
120 struct net_device *ndev;
122 enum ib_atomic_cap atomic_cap;
125 struct qedr_device_attr attr;
127 const struct qed_rdma_ops *ops;
128 struct qed_int_info int_info;
130 struct qed_sb_info *sb_array;
131 struct qedr_cnq *cnq_array;
135 void __iomem *db_addr;
140 union ib_gid *sgid_tbl;
142 /* Lock for sgid table */
143 spinlock_t sgid_lock;
151 u8 gsi_ll2_mac_address[ETH_ALEN];
153 struct qedr_cq *gsi_sqcq;
154 struct qedr_cq *gsi_rqcq;
155 struct qedr_qp *gsi_qp;
158 #define QEDR_MAX_SQ_PBL (0x8000)
159 #define QEDR_MAX_SQ_PBL_ENTRIES (0x10000 / sizeof(void *))
160 #define QEDR_SQE_ELEMENT_SIZE (sizeof(struct rdma_sq_sge))
161 #define QEDR_MAX_SQE_ELEMENTS_PER_SQE (ROCE_REQ_MAX_SINGLE_SQ_WQE_SIZE / \
162 QEDR_SQE_ELEMENT_SIZE)
163 #define QEDR_MAX_SQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
164 QEDR_SQE_ELEMENT_SIZE)
165 #define QEDR_MAX_SQE ((QEDR_MAX_SQ_PBL_ENTRIES) *\
166 (RDMA_RING_PAGE_SIZE) / \
167 (QEDR_SQE_ELEMENT_SIZE) /\
168 (QEDR_MAX_SQE_ELEMENTS_PER_SQE))
170 #define QEDR_MAX_RQ_PBL (0x2000)
171 #define QEDR_MAX_RQ_PBL_ENTRIES (0x10000 / sizeof(void *))
172 #define QEDR_RQE_ELEMENT_SIZE (sizeof(struct rdma_rq_sge))
173 #define QEDR_MAX_RQE_ELEMENTS_PER_RQE (RDMA_MAX_SGE_PER_RQ_WQE)
174 #define QEDR_MAX_RQE_ELEMENTS_PER_PAGE ((RDMA_RING_PAGE_SIZE) / \
175 QEDR_RQE_ELEMENT_SIZE)
176 #define QEDR_MAX_RQE ((QEDR_MAX_RQ_PBL_ENTRIES) *\
177 (RDMA_RING_PAGE_SIZE) / \
178 (QEDR_RQE_ELEMENT_SIZE) /\
179 (QEDR_MAX_RQE_ELEMENTS_PER_RQE))
181 #define QEDR_CQE_SIZE (sizeof(union rdma_cqe))
182 #define QEDR_MAX_CQE_PBL_SIZE (512 * 1024)
183 #define QEDR_MAX_CQE_PBL_ENTRIES (((QEDR_MAX_CQE_PBL_SIZE) / \
185 #define QEDR_MAX_CQES ((u32)((QEDR_MAX_CQE_PBL_ENTRIES) * \
186 (QED_CHAIN_PAGE_SIZE) / QEDR_CQE_SIZE))
188 #define QEDR_ROCE_MAX_CNQ_SIZE (0x4000)
190 #define QEDR_MAX_PORT (1)
192 #define QEDR_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
194 #define QEDR_ROCE_PKEY_MAX 1
195 #define QEDR_ROCE_PKEY_TABLE_LEN 1
196 #define QEDR_ROCE_PKEY_DEFAULT 0xffff
199 struct list_head list_entry;
204 struct qedr_ucontext {
205 struct ib_ucontext ibucontext;
206 struct qedr_dev *dev;
213 struct list_head mm_head;
215 /* Lock to protect mm list */
216 struct mutex mm_list_lock;
220 struct rdma_pwm_val32_data data;
230 struct qedr_pbl_info {
239 struct ib_umem *umem;
240 struct qedr_pbl_info pbl_info;
241 struct qedr_pbl *pbl_tbl;
249 enum qedr_cq_type cq_type;
254 /* Lock to protect multiplem CQ's */
257 struct qed_chain pbl;
259 void __iomem *db_addr;
263 union rdma_cqe *latest_cqe;
264 union rdma_cqe *toggle_cqe;
274 struct qedr_ucontext *uctx;
282 struct list_head entry;
286 struct rdma_pwm_val16_data data;
290 struct qedr_qp_hwq_info {
292 struct qed_chain pbl;
305 union db_prod32 db_data;
308 #define QEDR_INC_SW_IDX(p_info, index) \
310 p_info->index = (p_info->index + 1) & \
311 qed_chain_get_capacity(p_info->pbl) \
314 enum qedr_qp_err_bitmap {
315 QEDR_QP_ERR_SQ_FULL = 1,
316 QEDR_QP_ERR_RQ_FULL = 2,
317 QEDR_QP_ERR_BAD_SR = 4,
318 QEDR_QP_ERR_BAD_RR = 8,
319 QEDR_QP_ERR_SQ_PBL_FULL = 16,
320 QEDR_QP_ERR_RQ_PBL_FULL = 32,
324 struct ib_qp ibqp; /* must be first */
325 struct qedr_dev *dev;
327 struct qedr_qp_hwq_info sq;
328 struct qedr_qp_hwq_info rq;
334 struct qedr_cq *sq_cq;
335 struct qedr_cq *rq_cq;
336 struct qedr_srq *srq;
337 enum qed_roce_qp_state state;
340 enum ib_qp_type qp_type;
341 struct qed_rdma_qp *qed_qp;
351 /* Relevant to qps created from kernel space only (ULPs) */
360 enum ib_wc_opcode opcode;
364 dma_addr_t icrc_mapping;
372 struct ib_sge sg_list[RDMA_MAX_SGE_PER_RQ_WQE];
380 /* Relevant to qps created from user space only (applications) */
381 struct qedr_userq usq;
382 struct qedr_userq urq;
387 struct ib_ah_attr attr;
398 struct qedr_pbl *pbl_table;
399 struct qedr_pbl_info pbl_info;
400 struct list_head free_pbl_list;
401 struct list_head inuse_pbl_list;
403 u32 completed_handled;
408 struct ib_umem *umem;
410 struct qed_rdma_register_tid_in_params hw_mr;
411 enum qedr_mr_type type;
413 struct qedr_dev *dev;
420 #define SET_FIELD2(value, name, flag) ((value) |= ((flag) << (name ## _SHIFT)))
422 #define QEDR_RESP_IMM (RDMA_CQE_RESPONDER_IMM_FLG_MASK << \
423 RDMA_CQE_RESPONDER_IMM_FLG_SHIFT)
424 #define QEDR_RESP_RDMA (RDMA_CQE_RESPONDER_RDMA_FLG_MASK << \
425 RDMA_CQE_RESPONDER_RDMA_FLG_SHIFT)
426 #define QEDR_RESP_RDMA_IMM (QEDR_RESP_IMM | QEDR_RESP_RDMA)
428 static inline void qedr_inc_sw_cons(struct qedr_qp_hwq_info *info)
430 info->cons = (info->cons + 1) % info->max_wr;
434 static inline void qedr_inc_sw_prod(struct qedr_qp_hwq_info *info)
436 info->prod = (info->prod + 1) % info->max_wr;
439 static inline int qedr_get_dmac(struct qedr_dev *dev,
440 struct ib_ah_attr *ah_attr, u8 *mac_addr)
442 union ib_gid zero_sgid = { { 0 } };
445 if (!memcmp(&ah_attr->grh.dgid, &zero_sgid, sizeof(union ib_gid))) {
446 DP_ERR(dev, "Local port GID not supported\n");
447 eth_zero_addr(mac_addr);
451 memcpy(&in6, ah_attr->grh.dgid.raw, sizeof(in6));
452 ether_addr_copy(mac_addr, ah_attr->dmac);
458 struct qedr_ucontext *get_qedr_ucontext(struct ib_ucontext *ibucontext)
460 return container_of(ibucontext, struct qedr_ucontext, ibucontext);
463 static inline struct qedr_dev *get_qedr_dev(struct ib_device *ibdev)
465 return container_of(ibdev, struct qedr_dev, ibdev);
468 static inline struct qedr_pd *get_qedr_pd(struct ib_pd *ibpd)
470 return container_of(ibpd, struct qedr_pd, ibpd);
473 static inline struct qedr_cq *get_qedr_cq(struct ib_cq *ibcq)
475 return container_of(ibcq, struct qedr_cq, ibcq);
478 static inline struct qedr_qp *get_qedr_qp(struct ib_qp *ibqp)
480 return container_of(ibqp, struct qedr_qp, ibqp);
483 static inline struct qedr_ah *get_qedr_ah(struct ib_ah *ibah)
485 return container_of(ibah, struct qedr_ah, ibah);
488 static inline struct qedr_mr *get_qedr_mr(struct ib_mr *ibmr)
490 return container_of(ibmr, struct qedr_mr, ibmr);