1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ISSI IS31FL32xx family of I2C LED controllers
5 * Copyright 2015 Allworx Corp.
8 * http://www.issi.com/US/product-analog-fxled-driver.shtml
9 * http://www.si-en.com/product.asp?parentid=890
12 #include <linux/device.h>
13 #include <linux/i2c.h>
14 #include <linux/kernel.h>
15 #include <linux/leds.h>
16 #include <linux/module.h>
18 #include <linux/of_device.h>
20 /* Used to indicate a device has no such register */
21 #define IS31FL32XX_REG_NONE 0xFF
23 /* Software Shutdown bit in Shutdown Register */
24 #define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
25 #define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
27 /* IS31FL3216 has a number of unique registers */
28 #define IS31FL3216_CONFIG_REG 0x00
29 #define IS31FL3216_LIGHTING_EFFECT_REG 0x03
30 #define IS31FL3216_CHANNEL_CONFIG_REG 0x04
32 /* Software Shutdown bit in 3216 Config Register */
33 #define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
34 #define IS31FL3216_CONFIG_SSD_DISABLE 0
36 struct is31fl32xx_priv;
37 struct is31fl32xx_led_data {
38 struct led_classdev cdev;
39 u8 channel; /* 1-based, max priv->cdef->channels */
40 struct is31fl32xx_priv *priv;
43 struct is31fl32xx_priv {
44 const struct is31fl32xx_chipdef *cdef;
45 struct i2c_client *client;
46 unsigned int num_leds;
47 struct is31fl32xx_led_data leds[0];
51 * struct is31fl32xx_chipdef - chip-specific attributes
52 * @channels : Number of LED channels
53 * @shutdown_reg : address of Shutdown register (optional)
54 * @pwm_update_reg : address of PWM Update register
55 * @global_control_reg : address of Global Control register (optional)
56 * @reset_reg : address of Reset register (optional)
57 * @pwm_register_base : address of first PWM register
58 * @pwm_registers_reversed: : true if PWM registers count down instead of up
59 * @led_control_register_base : address of first LED control register (optional)
60 * @enable_bits_per_led_control_register: number of LEDs enable bits in each
61 * @reset_func: : pointer to reset function
63 * For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
64 * indicates that this chip has no such register.
66 * If non-NULL, @reset_func will be called during probing to set all
67 * necessary registers to a known initialization state. This is needed
68 * for chips that do not have a @reset_reg.
70 * @enable_bits_per_led_control_register must be >=1 if
71 * @led_control_register_base != %IS31FL32XX_REG_NONE.
73 struct is31fl32xx_chipdef {
77 u8 global_control_reg;
80 bool pwm_registers_reversed;
81 u8 led_control_register_base;
82 u8 enable_bits_per_led_control_register;
83 int (*reset_func)(struct is31fl32xx_priv *priv);
84 int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable);
87 static const struct is31fl32xx_chipdef is31fl3236_cdef = {
90 .pwm_update_reg = 0x25,
91 .global_control_reg = 0x4a,
93 .pwm_register_base = 0x01,
94 .led_control_register_base = 0x26,
95 .enable_bits_per_led_control_register = 1,
98 static const struct is31fl32xx_chipdef is31fl3235_cdef = {
100 .shutdown_reg = 0x00,
101 .pwm_update_reg = 0x25,
102 .global_control_reg = 0x4a,
104 .pwm_register_base = 0x05,
105 .led_control_register_base = 0x2a,
106 .enable_bits_per_led_control_register = 1,
109 static const struct is31fl32xx_chipdef is31fl3218_cdef = {
111 .shutdown_reg = 0x00,
112 .pwm_update_reg = 0x16,
113 .global_control_reg = IS31FL32XX_REG_NONE,
115 .pwm_register_base = 0x01,
116 .led_control_register_base = 0x13,
117 .enable_bits_per_led_control_register = 6,
120 static int is31fl3216_reset(struct is31fl32xx_priv *priv);
121 static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
123 static const struct is31fl32xx_chipdef is31fl3216_cdef = {
125 .shutdown_reg = IS31FL32XX_REG_NONE,
126 .pwm_update_reg = 0xB0,
127 .global_control_reg = IS31FL32XX_REG_NONE,
128 .reset_reg = IS31FL32XX_REG_NONE,
129 .pwm_register_base = 0x10,
130 .pwm_registers_reversed = true,
131 .led_control_register_base = 0x01,
132 .enable_bits_per_led_control_register = 8,
133 .reset_func = is31fl3216_reset,
134 .sw_shutdown_func = is31fl3216_software_shutdown,
137 static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
141 dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
143 ret = i2c_smbus_write_byte_data(priv->client, reg, val);
145 dev_err(&priv->client->dev,
146 "register write to 0x%02X failed (error %d)",
153 * Custom reset function for IS31FL3216 because it does not have a RESET
154 * register the way that the other IS31FL32xx chips do. We don't bother
155 * writing the GPIO and animation registers, because the registers we
156 * do write ensure those will have no effect.
158 static int is31fl3216_reset(struct is31fl32xx_priv *priv)
163 ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
164 IS31FL3216_CONFIG_SSD_ENABLE);
167 for (i = 0; i < priv->cdef->channels; i++) {
168 ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
173 ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
176 ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
179 ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
187 * Custom Software-Shutdown function for IS31FL3216 because it does not have
188 * a SHUTDOWN register the way that the other IS31FL32xx chips do.
189 * We don't bother doing a read/modify/write on the CONFIG register because
190 * we only ever use a value of '0' for the other fields in that register.
192 static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
195 u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
196 IS31FL3216_CONFIG_SSD_DISABLE;
198 return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
202 * NOTE: A mutex is not needed in this function because:
203 * - All referenced data is read-only after probe()
204 * - The I2C core has a mutex on to protect the bus
205 * - There are no read/modify/write operations
206 * - Intervening operations between the write of the PWM register
207 * and the Update register are harmless.
212 * PWM_REG_2 write 128
216 * PWM_REG_2 write 128
219 * are equivalent. Poking the Update register merely applies all PWM
220 * register writes up to that point.
222 static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
223 enum led_brightness brightness)
225 const struct is31fl32xx_led_data *led_data =
226 container_of(led_cdev, struct is31fl32xx_led_data, cdev);
227 const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
228 u8 pwm_register_offset;
231 dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);
233 /* NOTE: led_data->channel is 1-based */
234 if (cdef->pwm_registers_reversed)
235 pwm_register_offset = cdef->channels - led_data->channel;
237 pwm_register_offset = led_data->channel - 1;
239 ret = is31fl32xx_write(led_data->priv,
240 cdef->pwm_register_base + pwm_register_offset,
245 return is31fl32xx_write(led_data->priv, cdef->pwm_update_reg, 0);
248 static int is31fl32xx_reset_regs(struct is31fl32xx_priv *priv)
250 const struct is31fl32xx_chipdef *cdef = priv->cdef;
253 if (cdef->reset_reg != IS31FL32XX_REG_NONE) {
254 ret = is31fl32xx_write(priv, cdef->reset_reg, 0);
259 if (cdef->reset_func)
260 return cdef->reset_func(priv);
265 static int is31fl32xx_software_shutdown(struct is31fl32xx_priv *priv,
268 const struct is31fl32xx_chipdef *cdef = priv->cdef;
271 if (cdef->shutdown_reg != IS31FL32XX_REG_NONE) {
272 u8 value = enable ? IS31FL32XX_SHUTDOWN_SSD_ENABLE :
273 IS31FL32XX_SHUTDOWN_SSD_DISABLE;
274 ret = is31fl32xx_write(priv, cdef->shutdown_reg, value);
279 if (cdef->sw_shutdown_func)
280 return cdef->sw_shutdown_func(priv, enable);
285 static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv)
287 const struct is31fl32xx_chipdef *cdef = priv->cdef;
290 ret = is31fl32xx_reset_regs(priv);
295 * Set enable bit for all channels.
296 * We will control state with PWM registers alone.
298 if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) {
300 GENMASK(cdef->enable_bits_per_led_control_register-1, 0);
301 u8 num_regs = cdef->channels /
302 cdef->enable_bits_per_led_control_register;
305 for (i = 0; i < num_regs; i++) {
306 ret = is31fl32xx_write(priv,
307 cdef->led_control_register_base+i,
314 ret = is31fl32xx_software_shutdown(priv, false);
318 if (cdef->global_control_reg != IS31FL32XX_REG_NONE) {
319 ret = is31fl32xx_write(priv, cdef->global_control_reg, 0x00);
327 static int is31fl32xx_parse_child_dt(const struct device *dev,
328 const struct device_node *child,
329 struct is31fl32xx_led_data *led_data)
331 struct led_classdev *cdev = &led_data->cdev;
335 if (of_property_read_string(child, "label", &cdev->name))
336 cdev->name = child->name;
338 ret = of_property_read_u32(child, "reg", ®);
339 if (ret || reg < 1 || reg > led_data->priv->cdef->channels) {
341 "Child node %pOF does not have a valid reg property\n",
345 led_data->channel = reg;
347 of_property_read_string(child, "linux,default-trigger",
348 &cdev->default_trigger);
350 cdev->brightness_set_blocking = is31fl32xx_brightness_set;
355 static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
356 struct is31fl32xx_priv *priv,
361 for (i = 0; i < priv->num_leds; i++) {
362 if (priv->leds[i].channel == channel)
363 return &priv->leds[i];
369 static int is31fl32xx_parse_dt(struct device *dev,
370 struct is31fl32xx_priv *priv)
372 struct device_node *child;
375 for_each_child_of_node(dev->of_node, child) {
376 struct is31fl32xx_led_data *led_data =
377 &priv->leds[priv->num_leds];
378 const struct is31fl32xx_led_data *other_led_data;
380 led_data->priv = priv;
382 ret = is31fl32xx_parse_child_dt(dev, child, led_data);
386 /* Detect if channel is already in use by another child */
387 other_led_data = is31fl32xx_find_led_data(priv,
389 if (other_led_data) {
391 "%s and %s both attempting to use channel %d\n",
393 other_led_data->cdev.name,
398 ret = devm_led_classdev_register(dev, &led_data->cdev);
400 dev_err(dev, "failed to register PWM led for %s: %d\n",
401 led_data->cdev.name, ret);
415 static const struct of_device_id of_is31fl32xx_match[] = {
416 { .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
417 { .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
418 { .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
419 { .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
420 { .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
421 { .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
425 MODULE_DEVICE_TABLE(of, of_is31fl32xx_match);
427 static int is31fl32xx_probe(struct i2c_client *client,
428 const struct i2c_device_id *id)
430 const struct is31fl32xx_chipdef *cdef;
431 const struct of_device_id *of_dev_id;
432 struct device *dev = &client->dev;
433 struct is31fl32xx_priv *priv;
437 of_dev_id = of_match_device(of_is31fl32xx_match, dev);
441 cdef = of_dev_id->data;
443 count = of_get_child_count(dev->of_node);
447 priv = devm_kzalloc(dev, struct_size(priv, leds, count),
452 priv->client = client;
454 i2c_set_clientdata(client, priv);
456 ret = is31fl32xx_init_regs(priv);
460 ret = is31fl32xx_parse_dt(dev, priv);
467 static int is31fl32xx_remove(struct i2c_client *client)
469 struct is31fl32xx_priv *priv = i2c_get_clientdata(client);
471 return is31fl32xx_reset_regs(priv);
475 * i2c-core (and modalias) requires that id_table be properly filled,
476 * even though it is not used for DeviceTree based instantiation.
478 static const struct i2c_device_id is31fl32xx_id[] = {
488 MODULE_DEVICE_TABLE(i2c, is31fl32xx_id);
490 static struct i2c_driver is31fl32xx_driver = {
492 .name = "is31fl32xx",
493 .of_match_table = of_is31fl32xx_match,
495 .probe = is31fl32xx_probe,
496 .remove = is31fl32xx_remove,
497 .id_table = is31fl32xx_id,
500 module_i2c_driver(is31fl32xx_driver);
502 MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
503 MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
504 MODULE_LICENSE("GPL v2");