2 * Analog Devices ADV7511 HDMI Transmitter Device Driver
4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/slab.h>
24 #include <linux/i2c.h>
25 #include <linux/delay.h>
26 #include <linux/videodev2.h>
27 #include <linux/gpio.h>
28 #include <linux/workqueue.h>
29 #include <linux/hdmi.h>
30 #include <linux/v4l2-dv-timings.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-dv-timings.h>
35 #include <media/i2c/adv7511.h>
36 #include <media/cec.h>
39 module_param(debug, int, 0644);
40 MODULE_PARM_DESC(debug, "debug level (0-2)");
42 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
43 MODULE_AUTHOR("Hans Verkuil");
44 MODULE_LICENSE("GPL v2");
46 #define MASK_ADV7511_EDID_RDY_INT 0x04
47 #define MASK_ADV7511_MSEN_INT 0x40
48 #define MASK_ADV7511_HPD_INT 0x80
50 #define MASK_ADV7511_HPD_DETECT 0x40
51 #define MASK_ADV7511_MSEN_DETECT 0x20
52 #define MASK_ADV7511_EDID_RDY 0x10
54 #define EDID_MAX_RETRIES (8)
55 #define EDID_DELAY 250
56 #define EDID_MAX_SEGM 8
58 #define ADV7511_MAX_WIDTH 1920
59 #define ADV7511_MAX_HEIGHT 1200
60 #define ADV7511_MIN_PIXELCLOCK 20000000
61 #define ADV7511_MAX_PIXELCLOCK 225000000
63 #define ADV7511_MAX_ADDRS (3)
66 **********************************************************************
68 * Arrays with configuration parameters for the ADV7511
70 **********************************************************************
73 struct i2c_reg_value {
78 struct adv7511_state_edid {
79 /* total number of blocks */
81 /* Number of segments read */
83 u8 data[EDID_MAX_SEGM * 256];
84 /* Number of EDID read retries left */
85 unsigned read_retries;
89 struct adv7511_state {
90 struct adv7511_platform_data pdata;
91 struct v4l2_subdev sd;
93 struct v4l2_ctrl_handler hdl;
99 struct i2c_client *i2c_cec;
100 struct cec_adapter *cec_adap;
101 u8 cec_addr[ADV7511_MAX_ADDRS];
103 bool cec_enabled_adap;
105 /* Is the adv7511 powered on? */
107 /* Did we receive hotplug and rx-sense signals? */
110 /* timings from s_dv_timings */
111 struct v4l2_dv_timings dv_timings;
119 struct v4l2_ctrl *hdmi_mode_ctrl;
120 struct v4l2_ctrl *hotplug_ctrl;
121 struct v4l2_ctrl *rx_sense_ctrl;
122 struct v4l2_ctrl *have_edid0_ctrl;
123 struct v4l2_ctrl *rgb_quantization_range_ctrl;
124 struct v4l2_ctrl *content_type_ctrl;
125 struct i2c_client *i2c_edid;
126 struct i2c_client *i2c_pktmem;
127 struct adv7511_state_edid edid;
128 /* Running counter of the number of detected EDIDs (for debugging) */
129 unsigned edid_detect_counter;
130 struct workqueue_struct *work_queue;
131 struct delayed_work edid_handler; /* work entry */
134 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
135 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
136 static void adv7511_setup(struct v4l2_subdev *sd);
137 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
138 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
141 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
142 .type = V4L2_DV_BT_656_1120,
143 /* keep this initialization for compatibility with GCC < 4.4.6 */
145 V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT,
146 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
147 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
148 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
149 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
150 V4L2_DV_BT_CAP_CUSTOM)
153 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
155 return container_of(sd, struct adv7511_state, sd);
158 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
160 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
163 /* ------------------------ I2C ----------------------------------------------- */
165 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
166 u8 command, bool check)
168 union i2c_smbus_data data;
170 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
171 I2C_SMBUS_READ, command,
172 I2C_SMBUS_BYTE_DATA, &data))
175 v4l_err(client, "error reading %02x, %02x\n",
176 client->addr, command);
180 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
183 for (i = 0; i < 3; i++) {
184 int ret = adv_smbus_read_byte_data_check(client, command, true);
187 v4l_err(client, "read ok after %d retries\n", i);
191 v4l_err(client, "read failed\n");
195 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
197 struct i2c_client *client = v4l2_get_subdevdata(sd);
199 return adv_smbus_read_byte_data(client, reg);
202 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
204 struct i2c_client *client = v4l2_get_subdevdata(sd);
208 for (i = 0; i < 3; i++) {
209 ret = i2c_smbus_write_byte_data(client, reg, val);
213 v4l2_err(sd, "%s: i2c write error\n", __func__);
217 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
218 and then the value-mask (to be OR-ed). */
219 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
221 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
224 static int adv_smbus_read_i2c_block_data(struct i2c_client *client,
225 u8 command, unsigned length, u8 *values)
227 union i2c_smbus_data data;
230 if (length > I2C_SMBUS_BLOCK_MAX)
231 length = I2C_SMBUS_BLOCK_MAX;
232 data.block[0] = length;
234 ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
235 I2C_SMBUS_READ, command,
236 I2C_SMBUS_I2C_BLOCK_DATA, &data);
237 memcpy(values, data.block + 1, length);
241 static void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
243 struct adv7511_state *state = get_adv7511_state(sd);
247 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
249 for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
250 err = adv_smbus_read_i2c_block_data(state->i2c_edid, i,
251 I2C_SMBUS_BLOCK_MAX, buf + i);
253 v4l2_err(sd, "%s: i2c read error\n", __func__);
256 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
258 struct adv7511_state *state = get_adv7511_state(sd);
260 return i2c_smbus_read_byte_data(state->i2c_cec, reg);
263 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
265 struct adv7511_state *state = get_adv7511_state(sd);
269 for (i = 0; i < 3; i++) {
270 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
274 v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
278 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
281 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
284 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
286 struct adv7511_state *state = get_adv7511_state(sd);
288 return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
291 static int adv7511_pktmem_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
293 struct adv7511_state *state = get_adv7511_state(sd);
297 for (i = 0; i < 3; i++) {
298 ret = i2c_smbus_write_byte_data(state->i2c_pktmem, reg, val);
302 v4l2_err(sd, "%s: i2c write error\n", __func__);
306 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
307 and then the value-mask (to be OR-ed). */
308 static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
310 adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask);
313 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
315 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
318 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
320 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
323 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
325 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
328 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
329 u16 A1, u16 A2, u16 A3, u16 A4,
330 u16 B1, u16 B2, u16 B3, u16 B4,
331 u16 C1, u16 C2, u16 C3, u16 C4)
334 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
335 adv7511_wr(sd, 0x19, A1);
336 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
337 adv7511_wr(sd, 0x1B, A2);
338 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
339 adv7511_wr(sd, 0x1d, A3);
340 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
341 adv7511_wr(sd, 0x1f, A4);
344 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
345 adv7511_wr(sd, 0x21, B1);
346 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
347 adv7511_wr(sd, 0x23, B2);
348 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
349 adv7511_wr(sd, 0x25, B3);
350 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
351 adv7511_wr(sd, 0x27, B4);
354 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
355 adv7511_wr(sd, 0x29, C1);
356 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
357 adv7511_wr(sd, 0x2B, C2);
358 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
359 adv7511_wr(sd, 0x2D, C3);
360 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
361 adv7511_wr(sd, 0x2F, C4);
364 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
368 adv7511_csc_conversion_mode(sd, csc_mode);
369 adv7511_csc_coeff(sd,
372 0, 0, 4096-564, 256);
374 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
375 /* AVI infoframe: Limited range RGB (16-235) */
376 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
379 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
380 /* AVI infoframe: Full range RGB (0-255) */
381 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
385 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
387 struct adv7511_state *state = get_adv7511_state(sd);
389 /* Only makes sense for RGB formats */
390 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
391 /* so just keep quantization */
392 adv7511_csc_rgb_full2limit(sd, false);
397 case V4L2_DV_RGB_RANGE_AUTO:
399 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
400 /* CE format, RGB limited range (16-235) */
401 adv7511_csc_rgb_full2limit(sd, true);
403 /* not CE format, RGB full range (0-255) */
404 adv7511_csc_rgb_full2limit(sd, false);
407 case V4L2_DV_RGB_RANGE_LIMITED:
408 /* RGB limited range (16-235) */
409 adv7511_csc_rgb_full2limit(sd, true);
411 case V4L2_DV_RGB_RANGE_FULL:
412 /* RGB full range (0-255) */
413 adv7511_csc_rgb_full2limit(sd, false);
418 /* ------------------------------ CTRL OPS ------------------------------ */
420 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
422 struct v4l2_subdev *sd = to_sd(ctrl);
423 struct adv7511_state *state = get_adv7511_state(sd);
425 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
427 if (state->hdmi_mode_ctrl == ctrl) {
428 /* Set HDMI or DVI-D */
429 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
432 if (state->rgb_quantization_range_ctrl == ctrl) {
433 adv7511_set_rgb_quantization_mode(sd, ctrl);
436 if (state->content_type_ctrl == ctrl) {
439 state->content_type = ctrl->val;
440 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
441 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
442 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
443 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
450 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
451 .s_ctrl = adv7511_s_ctrl,
454 /* ---------------------------- CORE OPS ------------------------------------------- */
456 #ifdef CONFIG_VIDEO_ADV_DEBUG
457 static void adv7511_inv_register(struct v4l2_subdev *sd)
459 struct adv7511_state *state = get_adv7511_state(sd);
461 v4l2_info(sd, "0x000-0x0ff: Main Map\n");
463 v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
466 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
468 struct adv7511_state *state = get_adv7511_state(sd);
471 switch (reg->reg >> 8) {
473 reg->val = adv7511_rd(sd, reg->reg & 0xff);
476 if (state->i2c_cec) {
477 reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
482 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
483 adv7511_inv_register(sd);
489 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
491 struct adv7511_state *state = get_adv7511_state(sd);
493 switch (reg->reg >> 8) {
495 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
498 if (state->i2c_cec) {
499 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
504 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
505 adv7511_inv_register(sd);
512 struct adv7511_cfg_read_infoframe {
520 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
525 /* compute checksum */
526 for (i = 0; i < size; i++)
532 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
534 struct i2c_client *client = v4l2_get_subdevdata(sd);
535 struct device *dev = &client->dev;
536 union hdmi_infoframe frame;
541 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
542 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
546 memcpy(buffer, cri->header, sizeof(cri->header));
550 if (len + 4 > sizeof(buffer)) {
551 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
555 if (cri->payload_addr >= 0x100) {
556 for (i = 0; i < len; i++)
557 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
559 for (i = 0; i < len; i++)
560 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
563 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
565 if (hdmi_infoframe_unpack(&frame, buffer) < 0) {
566 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
570 hdmi_infoframe_log(KERN_INFO, dev, &frame);
573 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
575 static const struct adv7511_cfg_read_infoframe cri[] = {
576 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
577 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
578 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
582 for (i = 0; i < ARRAY_SIZE(cri); i++)
583 log_infoframe(sd, &cri[i]);
586 static int adv7511_log_status(struct v4l2_subdev *sd)
588 struct adv7511_state *state = get_adv7511_state(sd);
589 struct adv7511_state_edid *edid = &state->edid;
592 static const char * const states[] = {
598 "initializing HDCP repeater",
599 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
601 static const char * const errors[] = {
608 "max repeater cascade exceeded",
611 "9", "A", "B", "C", "D", "E", "F"
614 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
615 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
616 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
617 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
618 edid->segments ? "found" : "no",
620 v4l2_info(sd, "%s output %s\n",
621 (adv7511_rd(sd, 0xaf) & 0x02) ?
623 (adv7511_rd(sd, 0xa1) & 0x3c) ?
624 "disabled" : "enabled");
625 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
626 states[adv7511_rd(sd, 0xc8) & 0xf],
627 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
628 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
629 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
630 if (adv7511_rd(sd, 0xaf) & 0x02) {
632 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
633 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
634 adv7511_rd(sd, 0x02) << 8 |
635 adv7511_rd(sd, 0x03);
636 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
637 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
641 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
642 adv7511_rd(sd, 0x08) << 8 |
643 adv7511_rd(sd, 0x09);
645 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
646 adv7511_rd(sd, 0x05) << 8 |
647 adv7511_rd(sd, 0x06);
648 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
649 manual_cts ? "manual" : "automatic", N, CTS);
650 v4l2_info(sd, "VIC: detected %d, sent %d\n",
651 vic_detect, vic_sent);
652 adv7511_log_infoframes(sd);
654 if (state->dv_timings.type == V4L2_DV_BT_656_1120)
655 v4l2_print_dv_timings(sd->name, "timings: ",
656 &state->dv_timings, false);
658 v4l2_info(sd, "no timings set\n");
659 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
661 if (state->i2c_cec == NULL)
664 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
666 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
667 "enabled" : "disabled");
668 if (state->cec_enabled_adap) {
669 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
670 bool is_valid = state->cec_valid_addrs & (1 << i);
673 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
677 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
681 /* Power up/down adv7511 */
682 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
684 struct adv7511_state *state = get_adv7511_state(sd);
685 const int retries = 20;
688 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
690 state->power_on = on;
694 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
699 /* The adv7511 does not always come up immediately.
700 Retry multiple times. */
701 for (i = 0; i < retries; i++) {
702 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
703 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
705 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
709 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
710 adv7511_s_power(sd, 0);
714 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
716 /* Reserved registers that must be set */
717 adv7511_wr(sd, 0x98, 0x03);
718 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
719 adv7511_wr(sd, 0x9c, 0x30);
720 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
721 adv7511_wr(sd, 0xa2, 0xa4);
722 adv7511_wr(sd, 0xa3, 0xa4);
723 adv7511_wr(sd, 0xe0, 0xd0);
724 adv7511_wr(sd, 0xf9, 0x00);
726 adv7511_wr(sd, 0x43, state->i2c_edid_addr);
727 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
729 /* Set number of attempts to read the EDID */
730 adv7511_wr(sd, 0xc9, 0xf);
734 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
735 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
737 struct adv7511_state *state = adap->priv;
738 struct v4l2_subdev *sd = &state->sd;
740 if (state->i2c_cec == NULL)
743 if (!state->cec_enabled_adap && enable) {
744 /* power up cec section */
745 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
746 /* legacy mode and clear all rx buffers */
747 adv7511_cec_write(sd, 0x4a, 0x07);
748 adv7511_cec_write(sd, 0x4a, 0);
749 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
752 /* tx: arbitration lost */
753 /* tx: retry timeout */
755 if (state->enabled_irq)
756 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
757 } else if (state->cec_enabled_adap && !enable) {
758 if (state->enabled_irq)
759 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
760 /* disable address mask 1-3 */
761 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
762 /* power down cec section */
763 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
764 state->cec_valid_addrs = 0;
766 state->cec_enabled_adap = enable;
770 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
772 struct adv7511_state *state = adap->priv;
773 struct v4l2_subdev *sd = &state->sd;
774 unsigned int i, free_idx = ADV7511_MAX_ADDRS;
776 if (!state->cec_enabled_adap)
777 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
779 if (addr == CEC_LOG_ADDR_INVALID) {
780 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
781 state->cec_valid_addrs = 0;
785 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
786 bool is_valid = state->cec_valid_addrs & (1 << i);
788 if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
790 if (is_valid && state->cec_addr[i] == addr)
793 if (i == ADV7511_MAX_ADDRS) {
795 if (i == ADV7511_MAX_ADDRS)
798 state->cec_addr[i] = addr;
799 state->cec_valid_addrs |= 1 << i;
803 /* enable address mask 0 */
804 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
805 /* set address for mask 0 */
806 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
809 /* enable address mask 1 */
810 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
811 /* set address for mask 1 */
812 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
815 /* enable address mask 2 */
816 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
817 /* set address for mask 1 */
818 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
824 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
825 u32 signal_free_time, struct cec_msg *msg)
827 struct adv7511_state *state = adap->priv;
828 struct v4l2_subdev *sd = &state->sd;
832 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
835 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
840 * The number of retries is the number of attempts - 1, but retry
841 * at least once. It's not clear if a value of 0 is allowed, so
842 * let's do at least one retry.
844 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
846 /* blocking, clear cec tx irq status */
847 adv7511_wr_and_or(sd, 0x97, 0xc7, 0x38);
850 for (i = 0; i < len; i++)
851 adv7511_cec_write(sd, i, msg->msg[i]);
853 /* set length (data + header) */
854 adv7511_cec_write(sd, 0x10, len);
855 /* start transmit, enable tx */
856 adv7511_cec_write(sd, 0x11, 0x01);
860 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
862 struct adv7511_state *state = get_adv7511_state(sd);
864 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
865 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
869 if (tx_raw_status & 0x10) {
870 v4l2_dbg(1, debug, sd,
871 "%s: tx raw: arbitration lost\n", __func__);
872 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
876 if (tx_raw_status & 0x08) {
881 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
883 * We set this status bit since this hardware performs
886 status = CEC_TX_STATUS_MAX_RETRIES;
887 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
889 status |= CEC_TX_STATUS_NACK;
890 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
892 status |= CEC_TX_STATUS_LOW_DRIVE;
893 cec_transmit_done(state->cec_adap, status,
894 0, nack_cnt, low_drive_cnt, 0);
897 if (tx_raw_status & 0x20) {
898 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
899 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
904 static const struct cec_adap_ops adv7511_cec_adap_ops = {
905 .adap_enable = adv7511_cec_adap_enable,
906 .adap_log_addr = adv7511_cec_adap_log_addr,
907 .adap_transmit = adv7511_cec_adap_transmit,
911 /* Enable interrupts */
912 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
914 struct adv7511_state *state = get_adv7511_state(sd);
915 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
919 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
921 if (state->enabled_irq == enable)
923 state->enabled_irq = enable;
925 /* The datasheet says that the EDID ready interrupt should be
926 disabled if there is no hotplug. */
929 else if (adv7511_have_hotplug(sd))
930 irqs |= MASK_ADV7511_EDID_RDY_INT;
932 adv7511_wr_and_or(sd, 0x95, 0xc0,
933 (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
936 * This i2c write can fail (approx. 1 in 1000 writes). But it
937 * is essential that this register is correct, so retry it
940 * Note that the i2c write does not report an error, but the readback
941 * clearly shows the wrong value.
944 adv7511_wr(sd, 0x94, irqs);
945 irqs_rd = adv7511_rd(sd, 0x94);
946 } while (retries-- && irqs_rd != irqs);
950 v4l2_err(sd, "Could not set interrupts: hw failure?\n");
953 /* Interrupt handler */
954 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
959 /* disable interrupts to prevent a race condition */
960 adv7511_set_isr(sd, false);
961 irq_status = adv7511_rd(sd, 0x96);
962 cec_irq = adv7511_rd(sd, 0x97);
963 /* clear detected interrupts */
964 adv7511_wr(sd, 0x96, irq_status);
965 adv7511_wr(sd, 0x97, cec_irq);
967 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
968 irq_status, cec_irq);
970 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
971 adv7511_check_monitor_present_status(sd);
972 if (irq_status & MASK_ADV7511_EDID_RDY_INT)
973 adv7511_check_edid_status(sd);
975 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
977 adv_cec_tx_raw_status(sd, cec_irq);
980 struct adv7511_state *state = get_adv7511_state(sd);
983 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
985 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
994 for (i = 0; i < msg.len; i++)
995 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
997 adv7511_cec_write(sd, 0x4a, 1); /* toggle to re-enable rx 1 */
998 adv7511_cec_write(sd, 0x4a, 0);
999 cec_received_msg(state->cec_adap, &msg);
1004 /* enable interrupts */
1005 adv7511_set_isr(sd, true);
1012 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
1013 .log_status = adv7511_log_status,
1014 #ifdef CONFIG_VIDEO_ADV_DEBUG
1015 .g_register = adv7511_g_register,
1016 .s_register = adv7511_s_register,
1018 .s_power = adv7511_s_power,
1019 .interrupt_service_routine = adv7511_isr,
1022 /* ------------------------------ VIDEO OPS ------------------------------ */
1024 /* Enable/disable adv7511 output */
1025 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
1027 struct adv7511_state *state = get_adv7511_state(sd);
1029 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1030 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
1032 adv7511_check_monitor_present_status(sd);
1034 adv7511_s_power(sd, 0);
1035 state->have_monitor = false;
1040 static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
1041 struct v4l2_dv_timings *timings)
1043 struct adv7511_state *state = get_adv7511_state(sd);
1045 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1047 /* quick sanity check */
1048 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1051 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1052 if the format is one of the CEA or DMT timings. */
1053 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1055 timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
1058 state->dv_timings = *timings;
1060 /* set h/vsync polarities */
1061 adv7511_wr_and_or(sd, 0x17, 0x9f,
1062 ((timings->bt.polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1063 ((timings->bt.polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1065 /* update quantization range based on new dv_timings */
1066 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1071 static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
1072 struct v4l2_dv_timings *timings)
1074 struct adv7511_state *state = get_adv7511_state(sd);
1076 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1081 *timings = state->dv_timings;
1086 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1087 struct v4l2_enum_dv_timings *timings)
1089 if (timings->pad != 0)
1092 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1095 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1096 struct v4l2_dv_timings_cap *cap)
1101 *cap = adv7511_timings_cap;
1105 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1106 .s_stream = adv7511_s_stream,
1107 .s_dv_timings = adv7511_s_dv_timings,
1108 .g_dv_timings = adv7511_g_dv_timings,
1111 /* ------------------------------ AUDIO OPS ------------------------------ */
1112 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1114 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1117 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1119 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1124 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1129 case 32000: N = 4096; break;
1130 case 44100: N = 6272; break;
1131 case 48000: N = 6144; break;
1132 case 88200: N = 12544; break;
1133 case 96000: N = 12288; break;
1134 case 176400: N = 25088; break;
1135 case 192000: N = 24576; break;
1140 /* Set N (used with CTS to regenerate the audio clock) */
1141 adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1142 adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1143 adv7511_wr(sd, 0x03, N & 0xff);
1148 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1153 case 32000: i2s_sf = 0x30; break;
1154 case 44100: i2s_sf = 0x00; break;
1155 case 48000: i2s_sf = 0x20; break;
1156 case 88200: i2s_sf = 0x80; break;
1157 case 96000: i2s_sf = 0xa0; break;
1158 case 176400: i2s_sf = 0xc0; break;
1159 case 192000: i2s_sf = 0xe0; break;
1164 /* Set sampling frequency for I2S audio to 48 kHz */
1165 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1170 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1172 /* Only 2 channels in use for application */
1173 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1174 /* Speaker mapping */
1175 adv7511_wr(sd, 0x76, 0x00);
1177 /* 16 bit audio word length */
1178 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1183 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1184 .s_stream = adv7511_s_audio_stream,
1185 .s_clock_freq = adv7511_s_clock_freq,
1186 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1187 .s_routing = adv7511_s_routing,
1190 /* ---------------------------- PAD OPS ------------------------------------- */
1192 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1194 struct adv7511_state *state = get_adv7511_state(sd);
1196 memset(edid->reserved, 0, sizeof(edid->reserved));
1201 if (edid->start_block == 0 && edid->blocks == 0) {
1202 edid->blocks = state->edid.segments * 2;
1206 if (state->edid.segments == 0)
1209 if (edid->start_block >= state->edid.segments * 2)
1212 if (edid->start_block + edid->blocks > state->edid.segments * 2)
1213 edid->blocks = state->edid.segments * 2 - edid->start_block;
1215 memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1216 128 * edid->blocks);
1221 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1222 struct v4l2_subdev_pad_config *cfg,
1223 struct v4l2_subdev_mbus_code_enum *code)
1228 switch (code->index) {
1230 code->code = MEDIA_BUS_FMT_RGB888_1X24;
1233 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1236 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1244 static void adv7511_fill_format(struct adv7511_state *state,
1245 struct v4l2_mbus_framefmt *format)
1247 format->width = state->dv_timings.bt.width;
1248 format->height = state->dv_timings.bt.height;
1249 format->field = V4L2_FIELD_NONE;
1252 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1253 struct v4l2_subdev_pad_config *cfg,
1254 struct v4l2_subdev_format *format)
1256 struct adv7511_state *state = get_adv7511_state(sd);
1258 if (format->pad != 0)
1261 memset(&format->format, 0, sizeof(format->format));
1262 adv7511_fill_format(state, &format->format);
1264 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1265 struct v4l2_mbus_framefmt *fmt;
1267 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1268 format->format.code = fmt->code;
1269 format->format.colorspace = fmt->colorspace;
1270 format->format.ycbcr_enc = fmt->ycbcr_enc;
1271 format->format.quantization = fmt->quantization;
1272 format->format.xfer_func = fmt->xfer_func;
1274 format->format.code = state->fmt_code;
1275 format->format.colorspace = state->colorspace;
1276 format->format.ycbcr_enc = state->ycbcr_enc;
1277 format->format.quantization = state->quantization;
1278 format->format.xfer_func = state->xfer_func;
1284 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1285 struct v4l2_subdev_pad_config *cfg,
1286 struct v4l2_subdev_format *format)
1288 struct adv7511_state *state = get_adv7511_state(sd);
1290 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1291 * Video Information (AVI) InfoFrame Format"
1294 * ec = Extended Colorimetry
1296 * q = RGB Quantization Range
1297 * yq = YCC Quantization Range
1299 u8 c = HDMI_COLORIMETRY_NONE;
1300 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1301 u8 y = HDMI_COLORSPACE_RGB;
1302 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1303 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1304 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1305 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1307 if (format->pad != 0)
1309 switch (format->format.code) {
1310 case MEDIA_BUS_FMT_UYVY8_1X16:
1311 case MEDIA_BUS_FMT_YUYV8_1X16:
1312 case MEDIA_BUS_FMT_RGB888_1X24:
1318 adv7511_fill_format(state, &format->format);
1319 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1320 struct v4l2_mbus_framefmt *fmt;
1322 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1323 fmt->code = format->format.code;
1324 fmt->colorspace = format->format.colorspace;
1325 fmt->ycbcr_enc = format->format.ycbcr_enc;
1326 fmt->quantization = format->format.quantization;
1327 fmt->xfer_func = format->format.xfer_func;
1331 switch (format->format.code) {
1332 case MEDIA_BUS_FMT_UYVY8_1X16:
1333 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1334 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1335 y = HDMI_COLORSPACE_YUV422;
1337 case MEDIA_BUS_FMT_YUYV8_1X16:
1338 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1339 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1340 y = HDMI_COLORSPACE_YUV422;
1342 case MEDIA_BUS_FMT_RGB888_1X24:
1344 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1345 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1348 state->fmt_code = format->format.code;
1349 state->colorspace = format->format.colorspace;
1350 state->ycbcr_enc = format->format.ycbcr_enc;
1351 state->quantization = format->format.quantization;
1352 state->xfer_func = format->format.xfer_func;
1354 switch (format->format.colorspace) {
1355 case V4L2_COLORSPACE_ADOBERGB:
1356 c = HDMI_COLORIMETRY_EXTENDED;
1357 ec = y ? HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601 :
1358 HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB;
1360 case V4L2_COLORSPACE_SMPTE170M:
1361 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1362 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1363 c = HDMI_COLORIMETRY_EXTENDED;
1364 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1367 case V4L2_COLORSPACE_REC709:
1368 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1369 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1370 c = HDMI_COLORIMETRY_EXTENDED;
1371 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1374 case V4L2_COLORSPACE_SRGB:
1375 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1376 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1377 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1379 case V4L2_COLORSPACE_BT2020:
1380 c = HDMI_COLORIMETRY_EXTENDED;
1381 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1382 ec = 5; /* Not yet available in hdmi.h */
1384 ec = 6; /* Not yet available in hdmi.h */
1391 * CEA-861-F says that for RGB formats the YCC range must match the
1392 * RGB range, although sources should ignore the YCC range.
1394 * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1395 * have the Q bit set in the Video Capabilities Data Block, however this
1396 * isn't checked at the moment. The assumption is that the application
1397 * knows the EDID and can detect this.
1399 * The same is true for the YCC quantization range: non-standard YCC
1400 * quantization ranges should only be sent if the EDID has the YQ bit
1401 * set in the Video Capabilities Data Block.
1403 switch (format->format.quantization) {
1404 case V4L2_QUANTIZATION_FULL_RANGE:
1405 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1406 HDMI_QUANTIZATION_RANGE_FULL;
1407 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1409 case V4L2_QUANTIZATION_LIM_RANGE:
1410 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1411 HDMI_QUANTIZATION_RANGE_LIMITED;
1412 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1416 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1417 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1418 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1419 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1420 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1421 adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1422 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1427 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1428 .get_edid = adv7511_get_edid,
1429 .enum_mbus_code = adv7511_enum_mbus_code,
1430 .get_fmt = adv7511_get_fmt,
1431 .set_fmt = adv7511_set_fmt,
1432 .enum_dv_timings = adv7511_enum_dv_timings,
1433 .dv_timings_cap = adv7511_dv_timings_cap,
1436 /* --------------------- SUBDEV OPS --------------------------------------- */
1438 static const struct v4l2_subdev_ops adv7511_ops = {
1439 .core = &adv7511_core_ops,
1440 .pad = &adv7511_pad_ops,
1441 .video = &adv7511_video_ops,
1442 .audio = &adv7511_audio_ops,
1445 /* ----------------------------------------------------------------------- */
1446 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1450 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1451 for (i = 0; i < 256; i += 16) {
1455 v4l2_dbg(lvl, debug, sd, "\n");
1456 for (j = i; j < i + 16; j++) {
1457 sprintf(bp, "0x%02x, ", buf[j]);
1461 v4l2_dbg(lvl, debug, sd, "%s\n", b);
1466 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1468 struct adv7511_state *state = get_adv7511_state(sd);
1469 struct adv7511_edid_detect ed;
1471 /* We failed to read the EDID, so send an event for this. */
1473 ed.segment = adv7511_rd(sd, 0xc4);
1474 ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1475 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1476 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1477 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1480 static void adv7511_edid_handler(struct work_struct *work)
1482 struct delayed_work *dwork = to_delayed_work(work);
1483 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1484 struct v4l2_subdev *sd = &state->sd;
1486 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1488 if (adv7511_check_edid_status(sd)) {
1489 /* Return if we received the EDID. */
1493 if (adv7511_have_hotplug(sd)) {
1494 /* We must retry reading the EDID several times, it is possible
1495 * that initially the EDID couldn't be read due to i2c errors
1496 * (DVI connectors are particularly prone to this problem). */
1497 if (state->edid.read_retries) {
1498 state->edid.read_retries--;
1499 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1500 state->have_monitor = false;
1501 adv7511_s_power(sd, false);
1502 adv7511_s_power(sd, true);
1503 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1508 /* We failed to read the EDID, so send an event for this. */
1509 adv7511_notify_no_edid(sd);
1510 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1513 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1515 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1517 adv7511_s_i2s_clock_freq(sd, 48000);
1518 adv7511_s_clock_freq(sd, 48000);
1519 adv7511_s_routing(sd, 0, 0, 0);
1522 /* Configure hdmi transmitter. */
1523 static void adv7511_setup(struct v4l2_subdev *sd)
1525 struct adv7511_state *state = get_adv7511_state(sd);
1526 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1528 /* Input format: RGB 4:4:4 */
1529 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1530 /* Output format: RGB 4:4:4 */
1531 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1532 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1533 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1534 /* Disable pixel repetition */
1535 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1537 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1538 /* Output format: RGB 4:4:4, Active Format Information is valid,
1540 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1541 /* AVI Info frame packet enable, Audio Info frame disable */
1542 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1543 /* Colorimetry, Active format aspect ratio: same as picure. */
1544 adv7511_wr(sd, 0x56, 0xa8);
1546 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1548 /* Positive clk edge capture for input video clock */
1549 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1551 adv7511_audio_setup(sd);
1553 v4l2_ctrl_handler_setup(&state->hdl);
1556 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1558 struct adv7511_monitor_detect mdt;
1559 struct adv7511_state *state = get_adv7511_state(sd);
1561 mdt.present = state->have_monitor;
1562 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1565 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1567 struct adv7511_state *state = get_adv7511_state(sd);
1568 /* read hotplug and rx-sense state */
1569 u8 status = adv7511_rd(sd, 0x42);
1571 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1574 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1575 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1577 /* update read only ctrls */
1578 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1579 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1581 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1582 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1583 if (!state->have_monitor) {
1584 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1585 state->have_monitor = true;
1586 adv7511_set_isr(sd, true);
1587 if (!adv7511_s_power(sd, true)) {
1588 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1592 adv7511_notify_monitor_detect(sd);
1593 state->edid.read_retries = EDID_MAX_RETRIES;
1594 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1596 } else if (status & MASK_ADV7511_HPD_DETECT) {
1597 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1598 state->edid.read_retries = EDID_MAX_RETRIES;
1599 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1600 } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1601 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1602 if (state->have_monitor) {
1603 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1604 state->have_monitor = false;
1605 adv7511_notify_monitor_detect(sd);
1607 adv7511_s_power(sd, false);
1608 memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1609 adv7511_notify_no_edid(sd);
1613 static bool edid_block_verify_crc(u8 *edid_block)
1618 for (i = 0; i < 128; i++)
1619 sum += edid_block[i];
1623 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1625 struct adv7511_state *state = get_adv7511_state(sd);
1626 u32 blocks = state->edid.blocks;
1627 u8 *data = state->edid.data;
1629 if (!edid_block_verify_crc(&data[segment * 256]))
1631 if ((segment + 1) * 2 <= blocks)
1632 return edid_block_verify_crc(&data[segment * 256 + 128]);
1636 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1638 static const u8 hdmi_header[] = {
1639 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1641 struct adv7511_state *state = get_adv7511_state(sd);
1642 u8 *data = state->edid.data;
1646 return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1649 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1651 struct adv7511_state *state = get_adv7511_state(sd);
1652 u8 edidRdy = adv7511_rd(sd, 0xc5);
1654 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1655 __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1657 if (state->edid.complete)
1660 if (edidRdy & MASK_ADV7511_EDID_RDY) {
1661 int segment = adv7511_rd(sd, 0xc4);
1662 struct adv7511_edid_detect ed;
1664 if (segment >= EDID_MAX_SEGM) {
1665 v4l2_err(sd, "edid segment number too big\n");
1668 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1669 adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1670 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1672 state->edid.blocks = state->edid.data[0x7e] + 1;
1673 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks);
1675 if (!edid_verify_crc(sd, segment) ||
1676 !edid_verify_header(sd, segment)) {
1677 /* edid crc error, force reread of edid segment */
1678 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1679 state->have_monitor = false;
1680 adv7511_s_power(sd, false);
1681 adv7511_s_power(sd, true);
1684 /* one more segment read ok */
1685 state->edid.segments = segment + 1;
1686 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1687 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1688 /* Request next EDID segment */
1689 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1690 adv7511_wr(sd, 0xc9, 0xf);
1691 adv7511_wr(sd, 0xc4, state->edid.segments);
1692 state->edid.read_retries = EDID_MAX_RETRIES;
1693 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1697 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1698 state->edid.complete = true;
1699 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1700 state->edid.segments * 256,
1702 /* report when we have all segments
1703 but report only for segment 0
1707 state->edid_detect_counter++;
1708 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1709 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1716 static int adv7511_registered(struct v4l2_subdev *sd)
1718 struct adv7511_state *state = get_adv7511_state(sd);
1721 err = cec_register_adapter(state->cec_adap);
1723 cec_delete_adapter(state->cec_adap);
1727 static void adv7511_unregistered(struct v4l2_subdev *sd)
1729 struct adv7511_state *state = get_adv7511_state(sd);
1731 cec_unregister_adapter(state->cec_adap);
1734 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1735 .registered = adv7511_registered,
1736 .unregistered = adv7511_unregistered,
1739 /* ----------------------------------------------------------------------- */
1741 static void adv7511_init_setup(struct v4l2_subdev *sd)
1743 struct adv7511_state *state = get_adv7511_state(sd);
1744 struct adv7511_state_edid *edid = &state->edid;
1745 u32 cec_clk = state->pdata.cec_clk;
1748 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1750 /* clear all interrupts */
1751 adv7511_wr(sd, 0x96, 0xff);
1752 adv7511_wr(sd, 0x97, 0xff);
1754 * Stop HPD from resetting a lot of registers.
1755 * It might leave the chip in a partly un-initialized state,
1756 * in particular with regards to hotplug bounces.
1758 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1759 memset(edid, 0, sizeof(struct adv7511_state_edid));
1760 state->have_monitor = false;
1761 adv7511_set_isr(sd, false);
1762 adv7511_s_stream(sd, false);
1763 adv7511_s_audio_stream(sd, false);
1765 if (state->i2c_cec == NULL)
1768 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1770 /* cec soft reset */
1771 adv7511_cec_write(sd, 0x50, 0x01);
1772 adv7511_cec_write(sd, 0x50, 0x00);
1775 adv7511_cec_write(sd, 0x4a, 0x00);
1777 if (cec_clk % 750000 != 0)
1778 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1781 ratio = (cec_clk / 750000) - 1;
1782 adv7511_cec_write(sd, 0x4e, ratio << 2);
1785 static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id)
1787 struct adv7511_state *state;
1788 struct adv7511_platform_data *pdata = client->dev.platform_data;
1789 struct v4l2_ctrl_handler *hdl;
1790 struct v4l2_subdev *sd;
1794 /* Check if the adapter supports the needed features */
1795 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1798 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1804 v4l_err(client, "No platform data!\n");
1807 memcpy(&state->pdata, pdata, sizeof(state->pdata));
1808 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1809 state->colorspace = V4L2_COLORSPACE_SRGB;
1813 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1816 v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1817 sd->internal_ops = &adv7511_int_ops;
1820 v4l2_ctrl_handler_init(hdl, 10);
1821 /* add in ascending ID order */
1822 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1823 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1824 0, V4L2_DV_TX_MODE_DVI_D);
1825 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1826 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1827 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1828 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1829 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1830 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1831 state->rgb_quantization_range_ctrl =
1832 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1833 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1834 0, V4L2_DV_RGB_RANGE_AUTO);
1835 state->content_type_ctrl =
1836 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1837 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1838 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1839 sd->ctrl_handler = hdl;
1844 state->pad.flags = MEDIA_PAD_FL_SINK;
1845 err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1849 /* EDID and CEC i2c addr */
1850 state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1851 state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1852 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1854 state->chip_revision = adv7511_rd(sd, 0x0);
1855 chip_id[0] = adv7511_rd(sd, 0xf5);
1856 chip_id[1] = adv7511_rd(sd, 0xf6);
1857 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1858 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1864 state->i2c_edid = i2c_new_dummy(client->adapter,
1865 state->i2c_edid_addr >> 1);
1866 if (state->i2c_edid == NULL) {
1867 v4l2_err(sd, "failed to register edid i2c client\n");
1872 adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1873 if (state->pdata.cec_clk < 3000000 ||
1874 state->pdata.cec_clk > 100000000) {
1875 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1876 __func__, state->pdata.cec_clk);
1877 state->pdata.cec_clk = 0;
1880 if (state->pdata.cec_clk) {
1881 state->i2c_cec = i2c_new_dummy(client->adapter,
1882 state->i2c_cec_addr >> 1);
1883 if (state->i2c_cec == NULL) {
1884 v4l2_err(sd, "failed to register cec i2c client\n");
1885 goto err_unreg_edid;
1887 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1889 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1892 state->i2c_pktmem = i2c_new_dummy(client->adapter, state->i2c_pktmem_addr >> 1);
1893 if (state->i2c_pktmem == NULL) {
1894 v4l2_err(sd, "failed to register pktmem i2c client\n");
1899 state->work_queue = create_singlethread_workqueue(sd->name);
1900 if (state->work_queue == NULL) {
1901 v4l2_err(sd, "could not create workqueue\n");
1903 goto err_unreg_pktmem;
1906 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1908 adv7511_init_setup(sd);
1910 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1911 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1912 state, dev_name(&client->dev), CEC_CAP_TRANSMIT |
1913 CEC_CAP_LOG_ADDRS | CEC_CAP_PASSTHROUGH | CEC_CAP_RC,
1914 ADV7511_MAX_ADDRS, &client->dev);
1915 err = PTR_ERR_OR_ZERO(state->cec_adap);
1917 destroy_workqueue(state->work_queue);
1918 goto err_unreg_pktmem;
1922 adv7511_set_isr(sd, true);
1923 adv7511_check_monitor_present_status(sd);
1925 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1926 client->addr << 1, client->adapter->name);
1930 i2c_unregister_device(state->i2c_pktmem);
1933 i2c_unregister_device(state->i2c_cec);
1935 i2c_unregister_device(state->i2c_edid);
1937 media_entity_cleanup(&sd->entity);
1939 v4l2_ctrl_handler_free(&state->hdl);
1943 /* ----------------------------------------------------------------------- */
1945 static int adv7511_remove(struct i2c_client *client)
1947 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1948 struct adv7511_state *state = get_adv7511_state(sd);
1950 state->chip_revision = -1;
1952 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1953 client->addr << 1, client->adapter->name);
1955 adv7511_set_isr(sd, false);
1956 adv7511_init_setup(sd);
1957 cancel_delayed_work(&state->edid_handler);
1958 i2c_unregister_device(state->i2c_edid);
1960 i2c_unregister_device(state->i2c_cec);
1961 i2c_unregister_device(state->i2c_pktmem);
1962 destroy_workqueue(state->work_queue);
1963 v4l2_device_unregister_subdev(sd);
1964 media_entity_cleanup(&sd->entity);
1965 v4l2_ctrl_handler_free(sd->ctrl_handler);
1969 /* ----------------------------------------------------------------------- */
1971 static struct i2c_device_id adv7511_id[] = {
1975 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1977 static struct i2c_driver adv7511_driver = {
1981 .probe = adv7511_probe,
1982 .remove = adv7511_remove,
1983 .id_table = adv7511_id,
1986 module_i2c_driver(adv7511_driver);