1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN 6000000
30 #define OV5640_XCLK_MAX 54000000
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_REG_SYS_RESET02 0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
36 #define OV5640_REG_SYS_CTRL0 0x3008
37 #define OV5640_REG_CHIP_ID 0x300a
38 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
39 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
40 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
41 #define OV5640_REG_PAD_OUTPUT00 0x3019
42 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
43 #define OV5640_REG_SC_PLL_CTRL0 0x3034
44 #define OV5640_REG_SC_PLL_CTRL1 0x3035
45 #define OV5640_REG_SC_PLL_CTRL2 0x3036
46 #define OV5640_REG_SC_PLL_CTRL3 0x3037
47 #define OV5640_REG_SLAVE_ID 0x3100
48 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
49 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
50 #define OV5640_REG_AWB_R_GAIN 0x3400
51 #define OV5640_REG_AWB_G_GAIN 0x3402
52 #define OV5640_REG_AWB_B_GAIN 0x3404
53 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
54 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
55 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
56 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
57 #define OV5640_REG_AEC_PK_MANUAL 0x3503
58 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
59 #define OV5640_REG_AEC_PK_VTS 0x350c
60 #define OV5640_REG_TIMING_DVPHO 0x3808
61 #define OV5640_REG_TIMING_DVPVO 0x380a
62 #define OV5640_REG_TIMING_HTS 0x380c
63 #define OV5640_REG_TIMING_VTS 0x380e
64 #define OV5640_REG_TIMING_TC_REG20 0x3820
65 #define OV5640_REG_TIMING_TC_REG21 0x3821
66 #define OV5640_REG_AEC_CTRL00 0x3a00
67 #define OV5640_REG_AEC_B50_STEP 0x3a08
68 #define OV5640_REG_AEC_B60_STEP 0x3a0a
69 #define OV5640_REG_AEC_CTRL0D 0x3a0d
70 #define OV5640_REG_AEC_CTRL0E 0x3a0e
71 #define OV5640_REG_AEC_CTRL0F 0x3a0f
72 #define OV5640_REG_AEC_CTRL10 0x3a10
73 #define OV5640_REG_AEC_CTRL11 0x3a11
74 #define OV5640_REG_AEC_CTRL1B 0x3a1b
75 #define OV5640_REG_AEC_CTRL1E 0x3a1e
76 #define OV5640_REG_AEC_CTRL1F 0x3a1f
77 #define OV5640_REG_HZ5060_CTRL00 0x3c00
78 #define OV5640_REG_HZ5060_CTRL01 0x3c01
79 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
80 #define OV5640_REG_FRAME_CTRL01 0x4202
81 #define OV5640_REG_FORMAT_CONTROL00 0x4300
82 #define OV5640_REG_VFIFO_HSIZE 0x4602
83 #define OV5640_REG_VFIFO_VSIZE 0x4604
84 #define OV5640_REG_JPG_MODE_SELECT 0x4713
85 #define OV5640_REG_POLARITY_CTRL00 0x4740
86 #define OV5640_REG_MIPI_CTRL00 0x4800
87 #define OV5640_REG_DEBUG_MODE 0x4814
88 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
89 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
90 #define OV5640_REG_SDE_CTRL0 0x5580
91 #define OV5640_REG_SDE_CTRL1 0x5581
92 #define OV5640_REG_SDE_CTRL3 0x5583
93 #define OV5640_REG_SDE_CTRL4 0x5584
94 #define OV5640_REG_SDE_CTRL5 0x5585
95 #define OV5640_REG_AVG_READOUT 0x56a1
98 OV5640_MODE_QCIF_176_144 = 0,
99 OV5640_MODE_QVGA_320_240,
100 OV5640_MODE_VGA_640_480,
101 OV5640_MODE_NTSC_720_480,
102 OV5640_MODE_PAL_720_576,
103 OV5640_MODE_XGA_1024_768,
104 OV5640_MODE_720P_1280_720,
105 OV5640_MODE_1080P_1920_1080,
106 OV5640_MODE_QSXGA_2592_1944,
110 enum ov5640_frame_rate {
114 OV5640_NUM_FRAMERATES,
117 enum ov5640_format_mux {
118 OV5640_FMT_MUX_YUV422 = 0,
120 OV5640_FMT_MUX_DITHER,
121 OV5640_FMT_MUX_RAW_DPC,
122 OV5640_FMT_MUX_SNR_RAW,
123 OV5640_FMT_MUX_RAW_CIP,
126 struct ov5640_pixfmt {
131 static const struct ov5640_pixfmt ov5640_formats[] = {
132 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
133 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
134 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
135 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
136 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
137 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
138 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
139 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
140 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
144 * FIXME: remove this when a subdev API becomes available
145 * to set the MIPI CSI-2 virtual channel.
147 static unsigned int virtual_channel;
148 module_param(virtual_channel, uint, 0444);
149 MODULE_PARM_DESC(virtual_channel,
150 "MIPI CSI-2 virtual channel (0..3), default 0");
152 static const int ov5640_framerates[] = {
153 [OV5640_15_FPS] = 15,
154 [OV5640_30_FPS] = 30,
155 [OV5640_60_FPS] = 60,
158 /* regulator supplies */
159 static const char * const ov5640_supply_name[] = {
160 "DOVDD", /* Digital I/O (1.8V) supply */
161 "AVDD", /* Analog (2.8V) supply */
162 "DVDD", /* Digital Core (1.5V) supply */
165 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
168 * Image size under 1280 * 960 are SUBSAMPLING
169 * Image size upper 1280 * 960 are SCALING
171 enum ov5640_downsize_mode {
183 struct ov5640_mode_info {
184 enum ov5640_mode_id id;
185 enum ov5640_downsize_mode dn_mode;
190 const struct reg_value *reg_data;
195 struct ov5640_ctrls {
196 struct v4l2_ctrl_handler handler;
197 struct v4l2_ctrl *pixel_rate;
199 struct v4l2_ctrl *auto_exp;
200 struct v4l2_ctrl *exposure;
203 struct v4l2_ctrl *auto_wb;
204 struct v4l2_ctrl *blue_balance;
205 struct v4l2_ctrl *red_balance;
208 struct v4l2_ctrl *auto_gain;
209 struct v4l2_ctrl *gain;
211 struct v4l2_ctrl *brightness;
212 struct v4l2_ctrl *light_freq;
213 struct v4l2_ctrl *saturation;
214 struct v4l2_ctrl *contrast;
215 struct v4l2_ctrl *hue;
216 struct v4l2_ctrl *test_pattern;
217 struct v4l2_ctrl *hflip;
218 struct v4l2_ctrl *vflip;
222 struct i2c_client *i2c_client;
223 struct v4l2_subdev sd;
224 struct media_pad pad;
225 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
226 struct clk *xclk; /* system clock to OV5640 */
229 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
230 struct gpio_desc *reset_gpio;
231 struct gpio_desc *pwdn_gpio;
234 /* lock to protect all members below */
239 struct v4l2_mbus_framefmt fmt;
240 bool pending_fmt_change;
242 const struct ov5640_mode_info *current_mode;
243 const struct ov5640_mode_info *last_mode;
244 enum ov5640_frame_rate current_fr;
245 struct v4l2_fract frame_interval;
247 struct ov5640_ctrls ctrls;
249 u32 prev_sysclk, prev_hts;
250 u32 ae_low, ae_high, ae_target;
252 bool pending_mode_change;
256 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
258 return container_of(sd, struct ov5640_dev, sd);
261 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
263 return &container_of(ctrl->handler, struct ov5640_dev,
268 * FIXME: all of these register tables are likely filled with
269 * entries that set the register to their power-on default values,
270 * and which are otherwise not touched by this driver. Those entries
271 * should be identified and removed to speed register load time
274 /* YUV422 UYVY VGA@30fps */
275 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
276 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
277 {0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0},
278 {0x3630, 0x36, 0, 0},
279 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
280 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
281 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
282 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
283 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
284 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
285 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
286 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
287 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
288 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
289 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
290 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
291 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
292 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
293 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
294 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
295 {0x3810, 0x00, 0, 0},
296 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
297 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
298 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
299 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
300 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
301 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
302 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
303 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
304 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
305 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
306 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
307 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
308 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
309 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
310 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
311 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
312 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
313 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
314 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
315 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
316 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
317 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
318 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
319 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
320 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
321 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
322 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
323 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
324 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
325 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
326 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
327 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
328 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
329 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
330 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
331 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
332 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
333 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
334 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
335 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
336 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
337 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
338 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
339 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
340 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
341 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
342 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
343 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
344 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
345 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
346 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
347 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
348 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
349 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
350 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
351 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
352 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
353 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
354 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
355 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
356 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
357 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
360 static const struct reg_value ov5640_setting_VGA_640_480[] = {
361 {0x3c07, 0x08, 0, 0},
362 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
363 {0x3814, 0x31, 0, 0},
364 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
365 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
366 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
367 {0x3810, 0x00, 0, 0},
368 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
369 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
370 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
371 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
372 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
373 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
374 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
375 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
376 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
379 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
380 {0x3c07, 0x08, 0, 0},
381 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
382 {0x3814, 0x31, 0, 0},
383 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
384 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
385 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
386 {0x3810, 0x00, 0, 0},
387 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
388 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
389 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
390 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
391 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
392 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
393 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
394 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
395 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
398 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
399 {0x3c07, 0x08, 0, 0},
400 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
401 {0x3814, 0x31, 0, 0},
402 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
403 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
404 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
405 {0x3810, 0x00, 0, 0},
406 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
407 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
408 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
409 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
410 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
411 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
412 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
413 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
414 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
417 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
418 {0x3c07, 0x08, 0, 0},
419 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
420 {0x3814, 0x31, 0, 0},
421 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
422 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
423 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
424 {0x3810, 0x00, 0, 0},
425 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
426 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
427 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
428 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
429 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
430 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
431 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
432 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
433 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
436 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
437 {0x3c07, 0x08, 0, 0},
438 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
439 {0x3814, 0x31, 0, 0},
440 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
441 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
442 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
443 {0x3810, 0x00, 0, 0},
444 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
445 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
446 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
447 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
448 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
449 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
450 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
451 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
452 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
455 static const struct reg_value ov5640_setting_PAL_720_576[] = {
456 {0x3c07, 0x08, 0, 0},
457 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
458 {0x3814, 0x31, 0, 0},
459 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
460 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
461 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
462 {0x3810, 0x00, 0, 0},
463 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
464 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
465 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
466 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
467 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
468 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
469 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
470 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
471 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
474 static const struct reg_value ov5640_setting_720P_1280_720[] = {
475 {0x3c07, 0x07, 0, 0},
476 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
477 {0x3814, 0x31, 0, 0},
478 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
479 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
480 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
481 {0x3810, 0x00, 0, 0},
482 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
483 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
484 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
485 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
486 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
487 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
488 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
489 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
490 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
493 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
494 {0x3c07, 0x08, 0, 0},
495 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
496 {0x3814, 0x11, 0, 0},
497 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
498 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
499 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
500 {0x3810, 0x00, 0, 0},
501 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
502 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
503 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
504 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
505 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
506 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
507 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
508 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
509 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
510 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
511 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
512 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
513 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
514 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
515 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
516 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
517 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
518 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
519 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
520 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
521 {0x4005, 0x1a, 0, 0},
524 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
525 {0x3c07, 0x08, 0, 0},
526 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
527 {0x3814, 0x11, 0, 0},
528 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
529 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
530 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
531 {0x3810, 0x00, 0, 0},
532 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
533 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
534 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
535 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
536 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
537 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
538 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
539 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
540 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
543 /* power-on sensor init reg table */
544 static const struct ov5640_mode_info ov5640_mode_init_data = {
545 0, SUBSAMPLING, 640, 1896, 480, 984,
546 ov5640_init_setting_30fps_VGA,
547 ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
551 static const struct ov5640_mode_info
552 ov5640_mode_data[OV5640_NUM_MODES] = {
553 {OV5640_MODE_QCIF_176_144, SUBSAMPLING,
555 ov5640_setting_QCIF_176_144,
556 ARRAY_SIZE(ov5640_setting_QCIF_176_144),
558 {OV5640_MODE_QVGA_320_240, SUBSAMPLING,
560 ov5640_setting_QVGA_320_240,
561 ARRAY_SIZE(ov5640_setting_QVGA_320_240),
563 {OV5640_MODE_VGA_640_480, SUBSAMPLING,
564 640, 1896, 480, 1080,
565 ov5640_setting_VGA_640_480,
566 ARRAY_SIZE(ov5640_setting_VGA_640_480),
568 {OV5640_MODE_NTSC_720_480, SUBSAMPLING,
570 ov5640_setting_NTSC_720_480,
571 ARRAY_SIZE(ov5640_setting_NTSC_720_480),
573 {OV5640_MODE_PAL_720_576, SUBSAMPLING,
575 ov5640_setting_PAL_720_576,
576 ARRAY_SIZE(ov5640_setting_PAL_720_576),
578 {OV5640_MODE_XGA_1024_768, SUBSAMPLING,
579 1024, 1896, 768, 1080,
580 ov5640_setting_XGA_1024_768,
581 ARRAY_SIZE(ov5640_setting_XGA_1024_768),
583 {OV5640_MODE_720P_1280_720, SUBSAMPLING,
584 1280, 1892, 720, 740,
585 ov5640_setting_720P_1280_720,
586 ARRAY_SIZE(ov5640_setting_720P_1280_720),
588 {OV5640_MODE_1080P_1920_1080, SCALING,
589 1920, 2500, 1080, 1120,
590 ov5640_setting_1080P_1920_1080,
591 ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
593 {OV5640_MODE_QSXGA_2592_1944, SCALING,
594 2592, 2844, 1944, 1968,
595 ov5640_setting_QSXGA_2592_1944,
596 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
600 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
602 struct i2c_client *client = sensor->i2c_client;
607 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
610 buf[0] = OV5640_REG_SLAVE_ID >> 8;
611 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
612 buf[2] = client->addr << 1;
614 msg.addr = OV5640_DEFAULT_SLAVE_ID;
617 msg.len = sizeof(buf);
619 ret = i2c_transfer(client->adapter, &msg, 1);
621 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
628 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
630 struct i2c_client *client = sensor->i2c_client;
639 msg.addr = client->addr;
640 msg.flags = client->flags;
642 msg.len = sizeof(buf);
644 ret = i2c_transfer(client->adapter, &msg, 1);
646 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
654 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
656 struct i2c_client *client = sensor->i2c_client;
657 struct i2c_msg msg[2];
664 msg[0].addr = client->addr;
665 msg[0].flags = client->flags;
667 msg[0].len = sizeof(buf);
669 msg[1].addr = client->addr;
670 msg[1].flags = client->flags | I2C_M_RD;
674 ret = i2c_transfer(client->adapter, msg, 2);
676 dev_err(&client->dev, "%s: error: reg=%x\n",
685 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
690 ret = ov5640_read_reg(sensor, reg, &hi);
693 ret = ov5640_read_reg(sensor, reg + 1, &lo);
697 *val = ((u16)hi << 8) | (u16)lo;
701 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
705 ret = ov5640_write_reg(sensor, reg, val >> 8);
709 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
712 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
718 ret = ov5640_read_reg(sensor, reg, &readval);
726 return ov5640_write_reg(sensor, reg, val);
730 * After trying the various combinations, reading various
731 * documentations spread around the net, and from the various
732 * feedback, the clock tree is probably as follows:
738 * +->| PLL1 | - reg 0x3036, for the multiplier
739 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
741 * +->| System Clock | - reg 0x3035, bits 4-7
744 * +->| MIPI Divider | - reg 0x3035, bits 0-3
746 * | +----------------> MIPI SCLK
748 * | +->| / 2 |-------> MIPI BIT CLK
751 * +->| PLL Root Div | - reg 0x3037, bit 4
754 * +->| Bit Div | - reg 0x3035, bits 0-3
757 * +->| SCLK Div | - reg 0x3108, bits 0-1
759 * | +---------------> SCLK
761 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
763 * | +---------------> SCLK 2X
765 * +->| PCLK Div | - reg 0x3108, bits 4-5
768 * +->| P_DIV | - reg 0x3035, bits 0-3
770 * +------------> PCLK
772 * This is deviating from the datasheet at least for the register
773 * 0x3108, since it's said here that the PCLK would be clocked from
776 * There seems to be also (unverified) constraints:
777 * - the PLL pre-divider output rate should be in the 4-27MHz range
778 * - the PLL multiplier output rate should be in the 500-1000MHz range
779 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
781 * In the two latter cases, these constraints are met since our
782 * factors are hardcoded. If we were to change that, we would need to
783 * take this into account. The only varying parts are the PLL
784 * multiplier and the system clock divider, which are shared between
785 * all these clocks so won't cause any issue.
789 * This is supposed to be ranging from 1 to 8, but the value is always
790 * set to 3 in the vendor kernels.
792 #define OV5640_PLL_PREDIV 3
794 #define OV5640_PLL_MULT_MIN 4
795 #define OV5640_PLL_MULT_MAX 252
798 * This is supposed to be ranging from 1 to 16, but the value is
799 * always set to either 1 or 2 in the vendor kernels.
801 #define OV5640_SYSDIV_MIN 1
802 #define OV5640_SYSDIV_MAX 16
805 * Hardcode these values for scaler and non-scaler modes.
806 * FIXME: to be re-calcualted for 1 data lanes setups
808 #define OV5640_MIPI_DIV_PCLK 2
809 #define OV5640_MIPI_DIV_SCLK 1
812 * This is supposed to be ranging from 1 to 2, but the value is always
813 * set to 2 in the vendor kernels.
815 #define OV5640_PLL_ROOT_DIV 2
816 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
819 * We only supports 8-bit formats at the moment
821 #define OV5640_BIT_DIV 2
822 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
825 * This is supposed to be ranging from 1 to 8, but the value is always
826 * set to 2 in the vendor kernels.
828 #define OV5640_SCLK_ROOT_DIV 2
831 * This is hardcoded so that the consistency is maintained between SCLK and
834 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
837 * This is supposed to be ranging from 1 to 8, but the value is always
838 * set to 1 in the vendor kernels.
840 #define OV5640_PCLK_ROOT_DIV 1
841 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
843 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
844 u8 pll_prediv, u8 pll_mult,
847 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
849 /* PLL1 output cannot exceed 1GHz. */
850 if (sysclk / 1000000 > 1000)
853 return sysclk / sysdiv;
856 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
858 u8 *pll_prediv, u8 *pll_mult,
861 unsigned long best = ~0;
862 u8 best_sysdiv = 1, best_mult = 1;
863 u8 _sysdiv, _pll_mult;
865 for (_sysdiv = OV5640_SYSDIV_MIN;
866 _sysdiv <= OV5640_SYSDIV_MAX;
868 for (_pll_mult = OV5640_PLL_MULT_MIN;
869 _pll_mult <= OV5640_PLL_MULT_MAX;
874 * The PLL multiplier cannot be odd if above
877 if (_pll_mult > 127 && (_pll_mult % 2))
880 _rate = ov5640_compute_sys_clk(sensor,
885 * We have reached the maximum allowed PLL1 output,
892 * Prefer rates above the expected clock rate than
893 * below, even if that means being less precise.
898 if (abs(rate - _rate) < abs(rate - best)) {
900 best_sysdiv = _sysdiv;
901 best_mult = _pll_mult;
910 *sysdiv = best_sysdiv;
911 *pll_prediv = OV5640_PLL_PREDIV;
912 *pll_mult = best_mult;
918 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
919 * for the MIPI CSI-2 output.
921 * @rate: The requested bandwidth per lane in bytes per second.
922 * 'Bandwidth Per Lane' is calculated as:
923 * bpl = HTOT * VTOT * FPS * bpp / num_lanes;
925 * This function use the requested bandwidth to calculate:
926 * - sample_rate = bpl / (bpp / num_lanes);
927 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
929 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
931 * with these fixed parameters:
933 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
936 * The MIPI clock generation differs for modes that use the scaler and modes
937 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
940 * - mipi_sclk = bpl / MIPI_DIV / 2;
943 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
944 * from the pixel clock, and thus:
946 * - sample_rate = bpl / (bpp / num_lanes);
947 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
948 * = bpl / (4 * MIPI_DIV / num_lanes);
949 * - MIPI_DIV = bpp / (4 * num_lanes);
951 * FIXME: this have been tested with 16bpp and 2 lanes setup only.
952 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
953 * above formula for setups with 1 lane or image formats with different bpp.
955 * FIXME: this deviates from the sensor manual documentation which is quite
956 * thin on the MIPI clock tree generation part.
958 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
961 const struct ov5640_mode_info *mode = sensor->current_mode;
962 u8 prediv, mult, sysdiv;
967 * 1280x720 is reported to use 'SUBSAMPLING' only,
968 * but according to the sensor manual it goes through the
969 * scaler before subsampling.
971 if (mode->dn_mode == SCALING ||
972 (mode->id == OV5640_MODE_720P_1280_720))
973 mipi_div = OV5640_MIPI_DIV_SCLK;
975 mipi_div = OV5640_MIPI_DIV_PCLK;
977 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
979 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
980 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
982 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
983 0xff, sysdiv << 4 | mipi_div);
987 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
991 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
992 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
996 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
997 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
1000 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1002 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1003 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1005 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1006 OV5640_PCLK_ROOT_DIV;
1008 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1010 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1011 *bit_div = OV5640_BIT_DIV;
1012 *pclk_div = OV5640_PCLK_ROOT_DIV;
1014 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1017 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1019 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1022 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1023 &bit_div, &pclk_div);
1028 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1034 * We need to set sysdiv according to the clock, and to clear
1037 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1042 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1047 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1048 0x1f, prediv | ((pll_rdiv - 1) << 4));
1052 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1053 (ilog2(pclk_div) << 4));
1056 /* set JPEG framing sizes */
1057 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1058 const struct ov5640_mode_info *mode)
1063 * compression mode 3 timing
1065 * Data is transmitted with programmable width (VFIFO_HSIZE).
1066 * No padding done. Last line may have less data. Varying
1067 * number of lines per frame, depending on amount of data.
1069 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1073 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1077 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1080 /* download ov5640 settings to sensor through i2c */
1081 static int ov5640_set_timings(struct ov5640_dev *sensor,
1082 const struct ov5640_mode_info *mode)
1086 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1087 ret = ov5640_set_jpeg_timings(sensor, mode);
1092 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1096 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1100 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1104 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1107 static int ov5640_load_regs(struct ov5640_dev *sensor,
1108 const struct ov5640_mode_info *mode)
1110 const struct reg_value *regs = mode->reg_data;
1117 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1118 delay_ms = regs->delay_ms;
1119 reg_addr = regs->reg_addr;
1124 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1126 ret = ov5640_write_reg(sensor, reg_addr, val);
1131 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1134 return ov5640_set_timings(sensor, mode);
1137 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1139 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1140 BIT(0), on ? 0 : BIT(0));
1143 /* read exposure, in number of line periods */
1144 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1149 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1152 exp = ((int)temp & 0x0f) << 16;
1153 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1156 exp |= ((int)temp << 8);
1157 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1165 /* write exposure, given number of line periods */
1166 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1172 ret = ov5640_write_reg(sensor,
1173 OV5640_REG_AEC_PK_EXPOSURE_LO,
1177 ret = ov5640_write_reg(sensor,
1178 OV5640_REG_AEC_PK_EXPOSURE_MED,
1179 (exposure >> 8) & 0xff);
1182 return ov5640_write_reg(sensor,
1183 OV5640_REG_AEC_PK_EXPOSURE_HI,
1184 (exposure >> 16) & 0x0f);
1187 static int ov5640_get_gain(struct ov5640_dev *sensor)
1192 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1196 return gain & 0x3ff;
1199 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1201 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1205 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1207 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1208 BIT(1), on ? 0 : BIT(1));
1211 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1214 unsigned int flags = sensor->ep.bus.parallel.flags;
1220 * Note about parallel port configuration.
1222 * When configured in parallel mode, the OV5640 will
1223 * output 10 bits data on DVP data lines [9:0].
1224 * If only 8 bits data are wanted, the 8 bits data lines
1225 * of the camera interface must be physically connected
1226 * on the DVP data lines [9:2].
1228 * Control lines polarity can be configured through
1229 * devicetree endpoint control lines properties.
1230 * If no endpoint control lines properties are set,
1231 * polarity will be as below:
1232 * - VSYNC: active high
1233 * - HREF: active low
1234 * - PCLK: active low
1239 * configure parallel port control lines polarity
1242 * - [5]: PCLK polarity (0: active low, 1: active high)
1243 * - [1]: HREF polarity (0: active low, 1: active high)
1244 * - [0]: VSYNC polarity (mismatch here between
1245 * datasheet and hardware, 0 is active high
1246 * and 1 is active low...)
1248 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1250 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1252 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1255 ret = ov5640_write_reg(sensor,
1256 OV5640_REG_POLARITY_CTRL00,
1266 * powerdown MIPI TX/RX PHY & disable MIPI
1273 ret = ov5640_write_reg(sensor,
1274 OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
1279 * enable VSYNC/HREF/PCLK DVP control lines
1280 * & D[9:6] DVP data lines
1282 * PAD OUTPUT ENABLE 01
1283 * - 6: VSYNC output enable
1284 * - 5: HREF output enable
1285 * - 4: PCLK output enable
1286 * - [3:0]: D[9:6] output enable
1288 ret = ov5640_write_reg(sensor,
1289 OV5640_REG_PAD_OUTPUT_ENABLE01,
1295 * enable D[5:0] DVP data lines
1297 * PAD OUTPUT ENABLE 02
1298 * - [7:2]: D[5:0] output enable
1300 return ov5640_write_reg(sensor,
1301 OV5640_REG_PAD_OUTPUT_ENABLE02,
1305 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1310 * Enable/disable the MIPI interface
1312 * 0x300e = on ? 0x45 : 0x40
1314 * FIXME: the sensor manual (version 2.03) reports
1315 * [7:5] = 000 : 1 data lane mode
1316 * [7:5] = 001 : 2 data lanes mode
1317 * But this settings do not work, while the following ones
1318 * have been validated for 2 data lanes mode.
1320 * [7:5] = 010 : 2 data lanes mode
1321 * [4] = 0 : Power up MIPI HS Tx
1322 * [3] = 0 : Power up MIPI LS Rx
1323 * [2] = 1/0 : MIPI interface enable/disable
1324 * [1:0] = 01/00: FIXME: 'debug'
1326 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1331 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1335 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1337 /* calculate sysclk */
1338 u32 xvclk = sensor->xclk_freq / 10000;
1339 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1340 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1341 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1345 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1348 temp2 = temp1 & 0x0f;
1349 if (temp2 == 8 || temp2 == 10)
1350 bit_div2x = temp2 / 2;
1352 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1355 sysdiv = temp1 >> 4;
1359 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1364 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1367 prediv = temp1 & 0x0f;
1368 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1370 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1373 temp2 = temp1 & 0x03;
1374 sclk_rdiv = sclk_rdiv_map[temp2];
1376 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1379 VCO = xvclk * multiplier / prediv;
1381 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1386 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1388 /* read HTS from register settings */
1392 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1396 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1399 static int ov5640_get_hts(struct ov5640_dev *sensor)
1401 /* read HTS from register settings */
1405 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1411 static int ov5640_get_vts(struct ov5640_dev *sensor)
1416 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1422 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1424 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1427 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1429 /* get banding filter value */
1430 int ret, light_freq = 0;
1433 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1439 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1452 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1468 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1470 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1473 /* read preview PCLK */
1474 ret = ov5640_get_sysclk(sensor);
1479 sensor->prev_sysclk = ret;
1480 /* read preview HTS */
1481 ret = ov5640_get_hts(sensor);
1486 sensor->prev_hts = ret;
1488 /* read preview VTS */
1489 ret = ov5640_get_vts(sensor);
1494 /* calculate banding filter */
1496 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1497 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1502 max_band60 = (int)((prev_vts - 4) / band_step60);
1503 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1508 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1509 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1514 max_band50 = (int)((prev_vts - 4) / band_step50);
1515 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1518 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1520 /* stable in high */
1521 u32 fast_high, fast_low;
1524 sensor->ae_low = target * 23 / 25; /* 0.92 */
1525 sensor->ae_high = target * 27 / 25; /* 1.08 */
1527 fast_high = sensor->ae_high << 1;
1528 if (fast_high > 255)
1531 fast_low = sensor->ae_low >> 1;
1533 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1536 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1539 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1542 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1545 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1548 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1551 static int ov5640_get_binning(struct ov5640_dev *sensor)
1556 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1560 return temp & BIT(0);
1563 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1569 * - [0]: Horizontal binning enable
1571 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1572 BIT(0), enable ? BIT(0) : 0);
1577 * - [0]: Undocumented, but hardcoded init sequences
1578 * are always setting REG21/REG20 bit 0 to same value...
1580 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1581 BIT(0), enable ? BIT(0) : 0);
1584 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1586 struct i2c_client *client = sensor->i2c_client;
1587 u8 temp, channel = virtual_channel;
1591 dev_err(&client->dev,
1592 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1597 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1601 temp |= (channel << 6);
1602 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1605 static const struct ov5640_mode_info *
1606 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1607 int width, int height, bool nearest)
1609 const struct ov5640_mode_info *mode;
1611 mode = v4l2_find_nearest_size(ov5640_mode_data,
1612 ARRAY_SIZE(ov5640_mode_data),
1617 (!nearest && (mode->hact != width || mode->vact != height)))
1620 /* Check to see if the current mode exceeds the max frame rate */
1621 if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1627 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1631 rate = sensor->current_mode->vtot * sensor->current_mode->htot;
1632 rate *= ov5640_framerates[sensor->current_fr];
1638 * sensor changes between scaling and subsampling, go through
1639 * exposure calculation
1641 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1642 const struct ov5640_mode_info *mode)
1644 u32 prev_shutter, prev_gain16;
1645 u32 cap_shutter, cap_gain16;
1646 u32 cap_sysclk, cap_hts, cap_vts;
1647 u32 light_freq, cap_bandfilt, cap_maxband;
1648 u32 cap_gain16_shutter;
1652 if (!mode->reg_data)
1655 /* read preview shutter */
1656 ret = ov5640_get_exposure(sensor);
1660 ret = ov5640_get_binning(sensor);
1663 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1664 mode->id != OV5640_MODE_1080P_1920_1080)
1667 /* read preview gain */
1668 ret = ov5640_get_gain(sensor);
1674 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1678 /* turn off night mode for capture */
1679 ret = ov5640_set_night_mode(sensor);
1683 /* Write capture setting */
1684 ret = ov5640_load_regs(sensor, mode);
1688 /* read capture VTS */
1689 ret = ov5640_get_vts(sensor);
1693 ret = ov5640_get_hts(sensor);
1700 ret = ov5640_get_sysclk(sensor);
1707 /* calculate capture banding filter */
1708 ret = ov5640_get_light_freq(sensor);
1713 if (light_freq == 60) {
1715 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1718 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1721 if (!sensor->prev_sysclk) {
1722 ret = ov5640_get_sysclk(sensor);
1727 sensor->prev_sysclk = ret;
1733 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1735 /* calculate capture shutter/gain16 */
1736 if (average > sensor->ae_low && average < sensor->ae_high) {
1737 /* in stable range */
1738 cap_gain16_shutter =
1739 prev_gain16 * prev_shutter *
1740 cap_sysclk / sensor->prev_sysclk *
1741 sensor->prev_hts / cap_hts *
1742 sensor->ae_target / average;
1744 cap_gain16_shutter =
1745 prev_gain16 * prev_shutter *
1746 cap_sysclk / sensor->prev_sysclk *
1747 sensor->prev_hts / cap_hts;
1750 /* gain to shutter */
1751 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1752 /* shutter < 1/100 */
1753 cap_shutter = cap_gain16_shutter / 16;
1754 if (cap_shutter < 1)
1757 cap_gain16 = cap_gain16_shutter / cap_shutter;
1758 if (cap_gain16 < 16)
1761 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1762 /* exposure reach max */
1763 cap_shutter = cap_bandfilt * cap_maxband;
1767 cap_gain16 = cap_gain16_shutter / cap_shutter;
1769 /* 1/100 < (cap_shutter = n/100) =< max */
1771 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1776 cap_gain16 = cap_gain16_shutter / cap_shutter;
1780 /* set capture gain */
1781 ret = ov5640_set_gain(sensor, cap_gain16);
1785 /* write capture shutter */
1786 if (cap_shutter > (cap_vts - 4)) {
1787 cap_vts = cap_shutter + 4;
1788 ret = ov5640_set_vts(sensor, cap_vts);
1794 return ov5640_set_exposure(sensor, cap_shutter);
1798 * if sensor changes inside scaling or subsampling
1799 * change mode directly
1801 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1802 const struct ov5640_mode_info *mode)
1804 if (!mode->reg_data)
1807 /* Write capture setting */
1808 return ov5640_load_regs(sensor, mode);
1811 static int ov5640_set_mode(struct ov5640_dev *sensor)
1813 const struct ov5640_mode_info *mode = sensor->current_mode;
1814 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1815 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1816 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1817 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1821 dn_mode = mode->dn_mode;
1822 orig_dn_mode = orig_mode->dn_mode;
1824 /* auto gain and exposure must be turned off when changing modes */
1826 ret = ov5640_set_autogain(sensor, false);
1832 ret = ov5640_set_autoexposure(sensor, false);
1834 goto restore_auto_gain;
1838 * All the formats we support have 16 bits per pixel, seems to require
1839 * the same rate than YUV, so we can just use 16 bpp all the time.
1841 rate = ov5640_calc_pixel_rate(sensor) * 16;
1842 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1843 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1844 ret = ov5640_set_mipi_pclk(sensor, rate);
1846 rate = rate / sensor->ep.bus.parallel.bus_width;
1847 ret = ov5640_set_dvp_pclk(sensor, rate);
1853 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1854 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1856 * change between subsampling and scaling
1857 * go through exposure calculation
1859 ret = ov5640_set_mode_exposure_calc(sensor, mode);
1862 * change inside subsampling or scaling
1863 * download firmware directly
1865 ret = ov5640_set_mode_direct(sensor, mode);
1868 goto restore_auto_exp_gain;
1870 /* restore auto gain and exposure */
1872 ov5640_set_autogain(sensor, true);
1874 ov5640_set_autoexposure(sensor, true);
1876 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1879 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1882 ret = ov5640_get_light_freq(sensor);
1885 ret = ov5640_set_bandingfilter(sensor);
1888 ret = ov5640_set_virtual_channel(sensor);
1892 sensor->pending_mode_change = false;
1893 sensor->last_mode = mode;
1897 restore_auto_exp_gain:
1899 ov5640_set_autoexposure(sensor, true);
1902 ov5640_set_autogain(sensor, true);
1907 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1908 struct v4l2_mbus_framefmt *format);
1910 /* restore the last set video mode after chip power-on */
1911 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1915 /* first load the initial register values */
1916 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1919 sensor->last_mode = &ov5640_mode_init_data;
1921 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1922 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1923 ilog2(OV5640_SCLK_ROOT_DIV));
1927 /* now restore the last capture mode */
1928 ret = ov5640_set_mode(sensor);
1932 return ov5640_set_framefmt(sensor, &sensor->fmt);
1935 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1937 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1940 static void ov5640_reset(struct ov5640_dev *sensor)
1942 if (!sensor->reset_gpio)
1945 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1947 /* camera power cycle */
1948 ov5640_power(sensor, false);
1949 usleep_range(5000, 10000);
1950 ov5640_power(sensor, true);
1951 usleep_range(5000, 10000);
1953 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1954 usleep_range(1000, 2000);
1956 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1957 usleep_range(20000, 25000);
1960 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1962 struct i2c_client *client = sensor->i2c_client;
1965 ret = clk_prepare_enable(sensor->xclk);
1967 dev_err(&client->dev, "%s: failed to enable clock\n",
1972 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1975 dev_err(&client->dev, "%s: failed to enable regulators\n",
1980 ov5640_reset(sensor);
1981 ov5640_power(sensor, true);
1983 ret = ov5640_init_slave_id(sensor);
1990 ov5640_power(sensor, false);
1991 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1993 clk_disable_unprepare(sensor->xclk);
1997 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1999 ov5640_power(sensor, false);
2000 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2001 clk_disable_unprepare(sensor->xclk);
2004 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2009 ret = ov5640_set_power_on(sensor);
2013 ret = ov5640_restore_mode(sensor);
2017 /* We're done here for DVP bus, while CSI-2 needs setup. */
2018 if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
2022 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2025 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2026 * "ov5640_set_stream_mipi()")
2027 * [4] = 0 : Power up MIPI HS Tx
2028 * [3] = 0 : Power up MIPI LS Rx
2029 * [2] = 0 : MIPI interface disabled
2031 ret = ov5640_write_reg(sensor,
2032 OV5640_REG_IO_MIPI_CTRL00, 0x40);
2037 * Gate clock and set LP11 in 'no packets mode' (idle)
2040 * [5] = 1 : Gate clock when 'no packets'
2041 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2043 ret = ov5640_write_reg(sensor,
2044 OV5640_REG_MIPI_CTRL00, 0x24);
2049 * Set data lanes and clock in LP11 when 'sleeping'
2052 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2053 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2054 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2056 ret = ov5640_write_reg(sensor,
2057 OV5640_REG_PAD_OUTPUT00, 0x70);
2061 /* Give lanes some time to coax into LP11 state. */
2062 usleep_range(500, 1000);
2065 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
2066 /* Reset MIPI bus settings to their default values. */
2067 ov5640_write_reg(sensor,
2068 OV5640_REG_IO_MIPI_CTRL00, 0x58);
2069 ov5640_write_reg(sensor,
2070 OV5640_REG_MIPI_CTRL00, 0x04);
2071 ov5640_write_reg(sensor,
2072 OV5640_REG_PAD_OUTPUT00, 0x00);
2075 ov5640_set_power_off(sensor);
2081 ov5640_set_power_off(sensor);
2085 /* --------------- Subdev Operations --------------- */
2087 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2089 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2092 mutex_lock(&sensor->lock);
2095 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2096 * update the power state.
2098 if (sensor->power_count == !on) {
2099 ret = ov5640_set_power(sensor, !!on);
2104 /* Update the power count. */
2105 sensor->power_count += on ? 1 : -1;
2106 WARN_ON(sensor->power_count < 0);
2108 mutex_unlock(&sensor->lock);
2110 if (on && !ret && sensor->power_count == 1) {
2111 /* restore controls */
2112 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2118 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2119 struct v4l2_fract *fi,
2120 u32 width, u32 height)
2122 const struct ov5640_mode_info *mode;
2123 enum ov5640_frame_rate rate = OV5640_15_FPS;
2124 int minfps, maxfps, best_fps, fps;
2127 minfps = ov5640_framerates[OV5640_15_FPS];
2128 maxfps = ov5640_framerates[OV5640_60_FPS];
2130 if (fi->numerator == 0) {
2131 fi->denominator = maxfps;
2133 rate = OV5640_60_FPS;
2137 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2141 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2142 int curr_fps = ov5640_framerates[i];
2144 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2145 best_fps = curr_fps;
2151 fi->denominator = best_fps;
2154 mode = ov5640_find_mode(sensor, rate, width, height, false);
2155 return mode ? rate : -EINVAL;
2158 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2159 struct v4l2_subdev_pad_config *cfg,
2160 struct v4l2_subdev_format *format)
2162 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2163 struct v4l2_mbus_framefmt *fmt;
2165 if (format->pad != 0)
2168 mutex_lock(&sensor->lock);
2170 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2171 fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2176 format->format = *fmt;
2178 mutex_unlock(&sensor->lock);
2183 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2184 struct v4l2_mbus_framefmt *fmt,
2185 enum ov5640_frame_rate fr,
2186 const struct ov5640_mode_info **new_mode)
2188 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2189 const struct ov5640_mode_info *mode;
2192 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2195 fmt->width = mode->hact;
2196 fmt->height = mode->vact;
2201 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2202 if (ov5640_formats[i].code == fmt->code)
2204 if (i >= ARRAY_SIZE(ov5640_formats))
2207 fmt->code = ov5640_formats[i].code;
2208 fmt->colorspace = ov5640_formats[i].colorspace;
2209 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2210 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2211 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2216 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2217 struct v4l2_subdev_pad_config *cfg,
2218 struct v4l2_subdev_format *format)
2220 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2221 const struct ov5640_mode_info *new_mode;
2222 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2223 struct v4l2_mbus_framefmt *fmt;
2226 if (format->pad != 0)
2229 mutex_lock(&sensor->lock);
2231 if (sensor->streaming) {
2236 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2237 sensor->current_fr, &new_mode);
2241 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2242 fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2248 if (new_mode != sensor->current_mode) {
2249 sensor->current_mode = new_mode;
2250 sensor->pending_mode_change = true;
2252 if (mbus_fmt->code != sensor->fmt.code)
2253 sensor->pending_fmt_change = true;
2255 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2256 ov5640_calc_pixel_rate(sensor));
2258 mutex_unlock(&sensor->lock);
2262 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2263 struct v4l2_mbus_framefmt *format)
2266 bool is_jpeg = false;
2269 switch (format->code) {
2270 case MEDIA_BUS_FMT_UYVY8_2X8:
2273 mux = OV5640_FMT_MUX_YUV422;
2275 case MEDIA_BUS_FMT_YUYV8_2X8:
2278 mux = OV5640_FMT_MUX_YUV422;
2280 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2281 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2283 mux = OV5640_FMT_MUX_RGB;
2285 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2286 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2288 mux = OV5640_FMT_MUX_RGB;
2290 case MEDIA_BUS_FMT_JPEG_1X8:
2293 mux = OV5640_FMT_MUX_YUV422;
2296 case MEDIA_BUS_FMT_SBGGR8_1X8:
2297 /* Raw, BGBG... / GRGR... */
2299 mux = OV5640_FMT_MUX_RAW_DPC;
2301 case MEDIA_BUS_FMT_SGBRG8_1X8:
2302 /* Raw bayer, GBGB... / RGRG... */
2304 mux = OV5640_FMT_MUX_RAW_DPC;
2306 case MEDIA_BUS_FMT_SGRBG8_1X8:
2307 /* Raw bayer, GRGR... / BGBG... */
2309 mux = OV5640_FMT_MUX_RAW_DPC;
2311 case MEDIA_BUS_FMT_SRGGB8_1X8:
2312 /* Raw bayer, RGRG... / GBGB... */
2314 mux = OV5640_FMT_MUX_RAW_DPC;
2320 /* FORMAT CONTROL00: YUV and RGB formatting */
2321 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2325 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2326 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2332 * - [5]: JPEG enable
2334 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2335 BIT(5), is_jpeg ? BIT(5) : 0);
2341 * - [4]: Reset JFIFO
2342 * - [3]: Reset SFIFO
2345 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2346 BIT(4) | BIT(3) | BIT(2),
2347 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2353 * - [5]: Enable JPEG 2x clock
2354 * - [3]: Enable JPEG clock
2356 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2358 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2365 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2370 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2374 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2376 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2382 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2387 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2391 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2394 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2400 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2405 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2409 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2413 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2416 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2422 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2426 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2427 BIT(0), awb ? 0 : 1);
2432 u16 red = (u16)sensor->ctrls.red_balance->val;
2433 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2435 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2438 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2444 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2445 enum v4l2_exposure_auto_type auto_exposure)
2447 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2448 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2451 if (ctrls->auto_exp->is_new) {
2452 ret = ov5640_set_autoexposure(sensor, auto_exp);
2457 if (!auto_exp && ctrls->exposure->is_new) {
2460 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2464 ret = ov5640_get_vts(sensor);
2470 if (ctrls->exposure->val < max_exp)
2471 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2477 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2479 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2482 if (ctrls->auto_gain->is_new) {
2483 ret = ov5640_set_autogain(sensor, auto_gain);
2488 if (!auto_gain && ctrls->gain->is_new)
2489 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2494 static const char * const test_pattern_menu[] = {
2497 "Color bars w/ rolling bar",
2499 "Color squares w/ rolling bar",
2502 #define OV5640_TEST_ENABLE BIT(7)
2503 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2504 #define OV5640_TEST_TRANSPARENT BIT(5)
2505 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2506 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2507 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2508 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2509 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2510 #define OV5640_TEST_BAR (0 << 0)
2511 #define OV5640_TEST_RANDOM (1 << 0)
2512 #define OV5640_TEST_SQUARE (2 << 0)
2513 #define OV5640_TEST_BLACK (3 << 0)
2515 static const u8 test_pattern_val[] = {
2517 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2519 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2520 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2521 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2522 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2525 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2527 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2528 test_pattern_val[value]);
2531 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2535 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2536 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2541 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2542 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2546 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2549 * If sensor is mounted upside down, mirror logic is inversed.
2551 * Sensor is a BSI (Back Side Illuminated) one,
2552 * so image captured is physically mirrored.
2553 * This is why mirror logic is inversed in
2554 * order to cancel this mirror effect.
2560 * - [1]: Sensor mirror
2562 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2564 (!(value ^ sensor->upside_down)) ?
2565 (BIT(2) | BIT(1)) : 0);
2568 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2570 /* If sensor is mounted upside down, flip logic is inversed */
2575 * - [1]: Sensor vflip
2577 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2579 (value ^ sensor->upside_down) ?
2580 (BIT(2) | BIT(1)) : 0);
2583 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2585 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2586 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2589 /* v4l2_ctrl_lock() locks our own mutex */
2592 case V4L2_CID_AUTOGAIN:
2593 val = ov5640_get_gain(sensor);
2596 sensor->ctrls.gain->val = val;
2598 case V4L2_CID_EXPOSURE_AUTO:
2599 val = ov5640_get_exposure(sensor);
2602 sensor->ctrls.exposure->val = val;
2609 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2611 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2612 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2615 /* v4l2_ctrl_lock() locks our own mutex */
2618 * If the device is not powered up by the host driver do
2619 * not apply any controls to H/W at this time. Instead
2620 * the controls will be restored right after power-up.
2622 if (sensor->power_count == 0)
2626 case V4L2_CID_AUTOGAIN:
2627 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2629 case V4L2_CID_EXPOSURE_AUTO:
2630 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2632 case V4L2_CID_AUTO_WHITE_BALANCE:
2633 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2636 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2638 case V4L2_CID_CONTRAST:
2639 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2641 case V4L2_CID_SATURATION:
2642 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2644 case V4L2_CID_TEST_PATTERN:
2645 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2647 case V4L2_CID_POWER_LINE_FREQUENCY:
2648 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2650 case V4L2_CID_HFLIP:
2651 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2653 case V4L2_CID_VFLIP:
2654 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2664 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2665 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
2666 .s_ctrl = ov5640_s_ctrl,
2669 static int ov5640_init_controls(struct ov5640_dev *sensor)
2671 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2672 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2673 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2676 v4l2_ctrl_handler_init(hdl, 32);
2678 /* we can use our own mutex for the ctrl lock */
2679 hdl->lock = &sensor->lock;
2681 /* Clock related controls */
2682 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
2684 ov5640_calc_pixel_rate(sensor));
2686 /* Auto/manual white balance */
2687 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2688 V4L2_CID_AUTO_WHITE_BALANCE,
2690 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2692 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2694 /* Auto/manual exposure */
2695 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2696 V4L2_CID_EXPOSURE_AUTO,
2697 V4L2_EXPOSURE_MANUAL, 0,
2698 V4L2_EXPOSURE_AUTO);
2699 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2701 /* Auto/manual gain */
2702 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2704 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2707 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2709 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2711 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2713 ctrls->test_pattern =
2714 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2715 ARRAY_SIZE(test_pattern_menu) - 1,
2716 0, 0, test_pattern_menu);
2717 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2719 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2723 v4l2_ctrl_new_std_menu(hdl, ops,
2724 V4L2_CID_POWER_LINE_FREQUENCY,
2725 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2726 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2733 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2734 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2735 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2737 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2738 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2739 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2741 sensor->sd.ctrl_handler = hdl;
2745 v4l2_ctrl_handler_free(hdl);
2749 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2750 struct v4l2_subdev_pad_config *cfg,
2751 struct v4l2_subdev_frame_size_enum *fse)
2755 if (fse->index >= OV5640_NUM_MODES)
2759 ov5640_mode_data[fse->index].hact;
2760 fse->max_width = fse->min_width;
2762 ov5640_mode_data[fse->index].vact;
2763 fse->max_height = fse->min_height;
2768 static int ov5640_enum_frame_interval(
2769 struct v4l2_subdev *sd,
2770 struct v4l2_subdev_pad_config *cfg,
2771 struct v4l2_subdev_frame_interval_enum *fie)
2773 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2774 struct v4l2_fract tpf;
2779 if (fie->index >= OV5640_NUM_FRAMERATES)
2783 tpf.denominator = ov5640_framerates[fie->index];
2785 ret = ov5640_try_frame_interval(sensor, &tpf,
2786 fie->width, fie->height);
2790 fie->interval = tpf;
2794 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2795 struct v4l2_subdev_frame_interval *fi)
2797 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2799 mutex_lock(&sensor->lock);
2800 fi->interval = sensor->frame_interval;
2801 mutex_unlock(&sensor->lock);
2806 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2807 struct v4l2_subdev_frame_interval *fi)
2809 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2810 const struct ov5640_mode_info *mode;
2811 int frame_rate, ret = 0;
2816 mutex_lock(&sensor->lock);
2818 if (sensor->streaming) {
2823 mode = sensor->current_mode;
2825 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2826 mode->hact, mode->vact);
2827 if (frame_rate < 0) {
2828 /* Always return a valid frame interval value */
2829 fi->interval = sensor->frame_interval;
2833 mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2840 if (mode != sensor->current_mode ||
2841 frame_rate != sensor->current_fr) {
2842 sensor->current_fr = frame_rate;
2843 sensor->frame_interval = fi->interval;
2844 sensor->current_mode = mode;
2845 sensor->pending_mode_change = true;
2847 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2848 ov5640_calc_pixel_rate(sensor));
2851 mutex_unlock(&sensor->lock);
2855 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2856 struct v4l2_subdev_pad_config *cfg,
2857 struct v4l2_subdev_mbus_code_enum *code)
2861 if (code->index >= ARRAY_SIZE(ov5640_formats))
2864 code->code = ov5640_formats[code->index].code;
2868 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2870 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2873 mutex_lock(&sensor->lock);
2875 if (sensor->streaming == !enable) {
2876 if (enable && sensor->pending_mode_change) {
2877 ret = ov5640_set_mode(sensor);
2882 if (enable && sensor->pending_fmt_change) {
2883 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2886 sensor->pending_fmt_change = false;
2889 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2890 ret = ov5640_set_stream_mipi(sensor, enable);
2892 ret = ov5640_set_stream_dvp(sensor, enable);
2895 sensor->streaming = enable;
2898 mutex_unlock(&sensor->lock);
2902 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2903 .s_power = ov5640_s_power,
2904 .log_status = v4l2_ctrl_subdev_log_status,
2905 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2906 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2909 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2910 .g_frame_interval = ov5640_g_frame_interval,
2911 .s_frame_interval = ov5640_s_frame_interval,
2912 .s_stream = ov5640_s_stream,
2915 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2916 .enum_mbus_code = ov5640_enum_mbus_code,
2917 .get_fmt = ov5640_get_fmt,
2918 .set_fmt = ov5640_set_fmt,
2919 .enum_frame_size = ov5640_enum_frame_size,
2920 .enum_frame_interval = ov5640_enum_frame_interval,
2923 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2924 .core = &ov5640_core_ops,
2925 .video = &ov5640_video_ops,
2926 .pad = &ov5640_pad_ops,
2929 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2933 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2934 sensor->supplies[i].supply = ov5640_supply_name[i];
2936 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2937 OV5640_NUM_SUPPLIES,
2941 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2943 struct i2c_client *client = sensor->i2c_client;
2947 ret = ov5640_set_power_on(sensor);
2951 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
2953 dev_err(&client->dev, "%s: failed to read chip identifier\n",
2958 if (chip_id != 0x5640) {
2959 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
2965 ov5640_set_power_off(sensor);
2969 static int ov5640_probe(struct i2c_client *client)
2971 struct device *dev = &client->dev;
2972 struct fwnode_handle *endpoint;
2973 struct ov5640_dev *sensor;
2974 struct v4l2_mbus_framefmt *fmt;
2978 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
2982 sensor->i2c_client = client;
2985 * default init sequence initialize sensor to
2986 * YUV422 UYVY VGA@30fps
2989 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
2990 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2991 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2992 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2993 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2996 fmt->field = V4L2_FIELD_NONE;
2997 sensor->frame_interval.numerator = 1;
2998 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
2999 sensor->current_fr = OV5640_30_FPS;
3000 sensor->current_mode =
3001 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
3002 sensor->last_mode = sensor->current_mode;
3004 sensor->ae_target = 52;
3006 /* optional indication of physical rotation of sensor */
3007 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3012 sensor->upside_down = true;
3017 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3022 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3025 dev_err(dev, "endpoint node not found\n");
3029 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3030 fwnode_handle_put(endpoint);
3032 dev_err(dev, "Could not parse endpoint\n");
3036 /* get system clock (xclk) */
3037 sensor->xclk = devm_clk_get(dev, "xclk");
3038 if (IS_ERR(sensor->xclk)) {
3039 dev_err(dev, "failed to get xclk\n");
3040 return PTR_ERR(sensor->xclk);
3043 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3044 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3045 sensor->xclk_freq > OV5640_XCLK_MAX) {
3046 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3051 /* request optional power down pin */
3052 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3054 if (IS_ERR(sensor->pwdn_gpio))
3055 return PTR_ERR(sensor->pwdn_gpio);
3057 /* request optional reset pin */
3058 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3060 if (IS_ERR(sensor->reset_gpio))
3061 return PTR_ERR(sensor->reset_gpio);
3063 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3065 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3066 V4L2_SUBDEV_FL_HAS_EVENTS;
3067 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3068 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3069 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3073 ret = ov5640_get_regulators(sensor);
3077 mutex_init(&sensor->lock);
3079 ret = ov5640_check_chip_id(sensor);
3081 goto entity_cleanup;
3083 ret = ov5640_init_controls(sensor);
3085 goto entity_cleanup;
3087 ret = v4l2_async_register_subdev_sensor_common(&sensor->sd);
3094 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3096 mutex_destroy(&sensor->lock);
3097 media_entity_cleanup(&sensor->sd.entity);
3101 static int ov5640_remove(struct i2c_client *client)
3103 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3104 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3106 v4l2_async_unregister_subdev(&sensor->sd);
3107 mutex_destroy(&sensor->lock);
3108 media_entity_cleanup(&sensor->sd.entity);
3109 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3114 static const struct i2c_device_id ov5640_id[] = {
3118 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3120 static const struct of_device_id ov5640_dt_ids[] = {
3121 { .compatible = "ovti,ov5640" },
3124 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3126 static struct i2c_driver ov5640_i2c_driver = {
3129 .of_match_table = ov5640_dt_ids,
3131 .id_table = ov5640_id,
3132 .probe_new = ov5640_probe,
3133 .remove = ov5640_remove,
3136 module_i2c_driver(ov5640_i2c_driver);
3138 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3139 MODULE_LICENSE("GPL");