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Merge tag 'v5.3-rc4' into patchwork
[linux.git] / drivers / media / pci / cx23885 / cx23885.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  Driver for the Conexant CX23885 PCIe bridge
4  *
5  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6  */
7
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10 #include <linux/pci.h>
11 #include <linux/i2c.h>
12 #include <linux/kdev_t.h>
13 #include <linux/slab.h>
14
15 #include <media/v4l2-device.h>
16 #include <media/v4l2-fh.h>
17 #include <media/v4l2-ctrls.h>
18 #include <media/tuner.h>
19 #include <media/tveeprom.h>
20 #include <media/videobuf2-dma-sg.h>
21 #include <media/videobuf2-dvb.h>
22 #include <media/rc-core.h>
23
24 #include "cx23885-reg.h"
25 #include "media/drv-intf/cx2341x.h"
26
27 #include <linux/mutex.h>
28
29 #define CX23885_VERSION "0.0.4"
30
31 #define UNSET (-1U)
32
33 #define CX23885_MAXBOARDS 8
34
35 /* Max number of inputs by card */
36 #define MAX_CX23885_INPUT 8
37 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
38
39 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
40
41 #define CX23885_BOARD_NOAUTO               UNSET
42 #define CX23885_BOARD_UNKNOWN                  0
43 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
44 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
45 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
46 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
47 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
48 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
49 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
50 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
51 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
52 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
53 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
54 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
55 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
56 #define CX23885_BOARD_TBS_6920                 14
57 #define CX23885_BOARD_TEVII_S470               15
58 #define CX23885_BOARD_DVBWORLD_2005            16
59 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
60 #define CX23885_BOARD_HAUPPAUGE_HVR1270        18
61 #define CX23885_BOARD_HAUPPAUGE_HVR1275        19
62 #define CX23885_BOARD_HAUPPAUGE_HVR1255        20
63 #define CX23885_BOARD_HAUPPAUGE_HVR1210        21
64 #define CX23885_BOARD_MYGICA_X8506             22
65 #define CX23885_BOARD_MAGICPRO_PROHDTVE2       23
66 #define CX23885_BOARD_HAUPPAUGE_HVR1850        24
67 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800    25
68 #define CX23885_BOARD_HAUPPAUGE_HVR1290        26
69 #define CX23885_BOARD_MYGICA_X8558PRO          27
70 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
71 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID     29
72 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
73 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
74 #define CX23885_BOARD_MPX885                   32
75 #define CX23885_BOARD_MYGICA_X8507             33
76 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
77 #define CX23885_BOARD_TEVII_S471               35
78 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111  36
79 #define CX23885_BOARD_PROF_8000                37
80 #define CX23885_BOARD_HAUPPAUGE_HVR4400        38
81 #define CX23885_BOARD_AVERMEDIA_HC81R          39
82 #define CX23885_BOARD_TBS_6981                 40
83 #define CX23885_BOARD_TBS_6980                 41
84 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
85 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE     43
86 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
87 #define CX23885_BOARD_DVBSKY_T9580             45
88 #define CX23885_BOARD_DVBSKY_T980C             46
89 #define CX23885_BOARD_DVBSKY_S950C             47
90 #define CX23885_BOARD_TT_CT2_4500_CI           48
91 #define CX23885_BOARD_DVBSKY_S950              49
92 #define CX23885_BOARD_DVBSKY_S952              50
93 #define CX23885_BOARD_DVBSKY_T982              51
94 #define CX23885_BOARD_HAUPPAUGE_HVR5525        52
95 #define CX23885_BOARD_HAUPPAUGE_STARBURST      53
96 #define CX23885_BOARD_VIEWCAST_260E            54
97 #define CX23885_BOARD_VIEWCAST_460E            55
98 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB     56
99 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC    57
100 #define CX23885_BOARD_HAUPPAUGE_HVR1265_K4     58
101 #define CX23885_BOARD_HAUPPAUGE_STARBURST2     59
102 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60
103 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61
104
105 #define GPIO_0 0x00000001
106 #define GPIO_1 0x00000002
107 #define GPIO_2 0x00000004
108 #define GPIO_3 0x00000008
109 #define GPIO_4 0x00000010
110 #define GPIO_5 0x00000020
111 #define GPIO_6 0x00000040
112 #define GPIO_7 0x00000080
113 #define GPIO_8 0x00000100
114 #define GPIO_9 0x00000200
115 #define GPIO_10 0x00000400
116 #define GPIO_11 0x00000800
117 #define GPIO_12 0x00001000
118 #define GPIO_13 0x00002000
119 #define GPIO_14 0x00004000
120 #define GPIO_15 0x00008000
121
122 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
123 #define CX23885_NORMS (\
124         V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
125         V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
126         V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
127         V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
128
129 struct cx23885_fmt {
130         u32   fourcc;          /* v4l2 format id */
131         int   depth;
132         int   flags;
133         u32   cxformat;
134 };
135
136 struct cx23885_tvnorm {
137         char            *name;
138         v4l2_std_id     id;
139         u32             cxiformat;
140         u32             cxoformat;
141 };
142
143 enum cx23885_itype {
144         CX23885_VMUX_COMPOSITE1 = 1,
145         CX23885_VMUX_COMPOSITE2,
146         CX23885_VMUX_COMPOSITE3,
147         CX23885_VMUX_COMPOSITE4,
148         CX23885_VMUX_SVIDEO,
149         CX23885_VMUX_COMPONENT,
150         CX23885_VMUX_TELEVISION,
151         CX23885_VMUX_CABLE,
152         CX23885_VMUX_DVB,
153         CX23885_VMUX_DEBUG,
154         CX23885_RADIO,
155 };
156
157 enum cx23885_src_sel_type {
158         CX23885_SRC_SEL_EXT_656_VIDEO = 0,
159         CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
160 };
161
162 struct cx23885_riscmem {
163         unsigned int   size;
164         __le32         *cpu;
165         __le32         *jmp;
166         dma_addr_t     dma;
167 };
168
169 /* buffer for one video frame */
170 struct cx23885_buffer {
171         /* common v4l buffer stuff -- must be first */
172         struct vb2_v4l2_buffer vb;
173         struct list_head queue;
174
175         /* cx23885 specific */
176         unsigned int           bpl;
177         struct cx23885_riscmem risc;
178         struct cx23885_fmt     *fmt;
179         u32                    count;
180 };
181
182 struct cx23885_input {
183         enum cx23885_itype type;
184         unsigned int    vmux;
185         unsigned int    amux;
186         u32             gpio0, gpio1, gpio2, gpio3;
187 };
188
189 typedef enum {
190         CX23885_MPEG_UNDEFINED = 0,
191         CX23885_MPEG_DVB,
192         CX23885_ANALOG_VIDEO,
193         CX23885_MPEG_ENCODER,
194 } port_t;
195
196 struct cx23885_board {
197         char                    *name;
198         port_t                  porta, portb, portc;
199         int             num_fds_portb, num_fds_portc;
200         unsigned int            tuner_type;
201         unsigned int            radio_type;
202         unsigned char           tuner_addr;
203         unsigned char           radio_addr;
204         unsigned int            tuner_bus;
205
206         /* Vendors can and do run the PCIe bridge at different
207          * clock rates, driven physically by crystals on the PCBs.
208          * The core has to accommodate this. This allows the user
209          * to add new boards with new frequencys. The value is
210          * expressed in Hz.
211          *
212          * The core framework will default this value based on
213          * current designs, but it can vary.
214          */
215         u32                     clk_freq;
216         struct cx23885_input    input[MAX_CX23885_INPUT];
217         int                     ci_type; /* for NetUP */
218         /* Force bottom field first during DMA (888 workaround) */
219         u32                     force_bff;
220 };
221
222 struct cx23885_subid {
223         u16     subvendor;
224         u16     subdevice;
225         u32     card;
226 };
227
228 struct cx23885_i2c {
229         struct cx23885_dev *dev;
230
231         int                        nr;
232
233         /* i2c i/o */
234         struct i2c_adapter         i2c_adap;
235         struct i2c_client          i2c_client;
236         u32                        i2c_rc;
237
238         /* 885 registers used for raw address */
239         u32                        i2c_period;
240         u32                        reg_ctrl;
241         u32                        reg_stat;
242         u32                        reg_addr;
243         u32                        reg_rdata;
244         u32                        reg_wdata;
245 };
246
247 struct cx23885_dmaqueue {
248         struct list_head       active;
249         u32                    count;
250 };
251
252 struct cx23885_tsport {
253         struct cx23885_dev *dev;
254
255         unsigned                   nr;
256         int                        sram_chno;
257
258         struct vb2_dvb_frontends   frontends;
259
260         /* dma queues */
261         struct cx23885_dmaqueue    mpegq;
262         u32                        ts_packet_size;
263         u32                        ts_packet_count;
264
265         int                        width;
266         int                        height;
267
268         spinlock_t                 slock;
269
270         /* registers */
271         u32                        reg_gpcnt;
272         u32                        reg_gpcnt_ctl;
273         u32                        reg_dma_ctl;
274         u32                        reg_lngth;
275         u32                        reg_hw_sop_ctrl;
276         u32                        reg_gen_ctrl;
277         u32                        reg_bd_pkt_status;
278         u32                        reg_sop_status;
279         u32                        reg_fifo_ovfl_stat;
280         u32                        reg_vld_misc;
281         u32                        reg_ts_clk_en;
282         u32                        reg_ts_int_msk;
283         u32                        reg_ts_int_stat;
284         u32                        reg_src_sel;
285
286         /* Default register vals */
287         int                        pci_irqmask;
288         u32                        dma_ctl_val;
289         u32                        ts_int_msk_val;
290         u32                        gen_ctrl_val;
291         u32                        ts_clk_en_val;
292         u32                        src_sel_val;
293         u32                        vld_misc_val;
294         u32                        hw_sop_ctrl_val;
295
296         /* Allow a single tsport to have multiple frontends */
297         u32                        num_frontends;
298         void                (*gate_ctrl)(struct cx23885_tsport *port, int open);
299         void                       *port_priv;
300
301         /* Workaround for a temp dvb_frontend that the tuner can attached to */
302         struct dvb_frontend analog_fe;
303
304         struct i2c_client *i2c_client_demod;
305         struct i2c_client *i2c_client_tuner;
306         struct i2c_client *i2c_client_sec;
307         struct i2c_client *i2c_client_ci;
308
309         int (*set_frontend)(struct dvb_frontend *fe);
310         int (*fe_set_voltage)(struct dvb_frontend *fe,
311                               enum fe_sec_voltage voltage);
312 };
313
314 struct cx23885_kernel_ir {
315         struct cx23885_dev      *cx;
316         char                    *name;
317         char                    *phys;
318
319         struct rc_dev           *rc;
320 };
321
322 struct cx23885_audio_buffer {
323         unsigned int            bpl;
324         struct cx23885_riscmem  risc;
325         void                    *vaddr;
326         struct scatterlist      *sglist;
327         int                     sglen;
328         int                     nr_pages;
329 };
330
331 struct cx23885_audio_dev {
332         struct cx23885_dev      *dev;
333
334         struct pci_dev          *pci;
335
336         struct snd_card         *card;
337
338         spinlock_t              lock;
339
340         atomic_t                count;
341
342         unsigned int            dma_size;
343         unsigned int            period_size;
344         unsigned int            num_periods;
345
346         struct cx23885_audio_buffer   *buf;
347
348         struct snd_pcm_substream *substream;
349 };
350
351 struct cx23885_dev {
352         atomic_t                   refcount;
353         struct v4l2_device         v4l2_dev;
354         struct v4l2_ctrl_handler   ctrl_handler;
355
356         /* pci stuff */
357         struct pci_dev             *pci;
358         unsigned char              pci_rev, pci_lat;
359         int                        pci_bus, pci_slot;
360         u32                        __iomem *lmmio;
361         u8                         __iomem *bmmio;
362         int                        pci_irqmask;
363         spinlock_t                 pci_irqmask_lock; /* protects mask reg too */
364         int                        hwrevision;
365
366         /* This valud is board specific and is used to configure the
367          * AV core so we see nice clean and stable video and audio. */
368         u32                        clk_freq;
369
370         /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
371         struct cx23885_i2c         i2c_bus[3];
372
373         int                        nr;
374         struct mutex               lock;
375         struct mutex               gpio_lock;
376
377         /* board details */
378         unsigned int               board;
379         char                       name[32];
380
381         struct cx23885_tsport      ts1, ts2;
382
383         /* sram configuration */
384         struct sram_channel        *sram_channels;
385
386         enum {
387                 CX23885_BRIDGE_UNDEFINED = 0,
388                 CX23885_BRIDGE_885 = 885,
389                 CX23885_BRIDGE_887 = 887,
390                 CX23885_BRIDGE_888 = 888,
391         } bridge;
392
393         /* Analog video */
394         unsigned int               input;
395         unsigned int               audinput; /* Selectable audio input */
396         u32                        tvaudio;
397         v4l2_std_id                tvnorm;
398         unsigned int               tuner_type;
399         unsigned char              tuner_addr;
400         unsigned int               tuner_bus;
401         unsigned int               radio_type;
402         unsigned char              radio_addr;
403         struct v4l2_subdev         *sd_cx25840;
404         struct work_struct         cx25840_work;
405
406         /* Infrared */
407         struct v4l2_subdev         *sd_ir;
408         struct work_struct         ir_rx_work;
409         unsigned long              ir_rx_notifications;
410         struct work_struct         ir_tx_work;
411         unsigned long              ir_tx_notifications;
412
413         struct cx23885_kernel_ir   *kernel_ir;
414         atomic_t                   ir_input_stopping;
415
416         /* V4l */
417         u32                        freq;
418         struct video_device        *video_dev;
419         struct video_device        *vbi_dev;
420
421         /* video capture */
422         struct cx23885_fmt         *fmt;
423         unsigned int               width, height;
424         unsigned                   field;
425
426         struct cx23885_dmaqueue    vidq;
427         struct vb2_queue           vb2_vidq;
428         struct cx23885_dmaqueue    vbiq;
429         struct vb2_queue           vb2_vbiq;
430
431         spinlock_t                 slock;
432
433         /* MPEG Encoder ONLY settings */
434         u32                        cx23417_mailbox;
435         struct cx2341x_handler     cxhdl;
436         struct video_device        *v4l_device;
437         struct vb2_queue           vb2_mpegq;
438         struct cx23885_tvnorm      encodernorm;
439
440         /* Analog raw audio */
441         struct cx23885_audio_dev   *audio_dev;
442
443         /* Does the system require periodic DMA resets? */
444         unsigned int            need_dma_reset:1;
445 };
446
447 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
448 {
449         return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
450 }
451
452 #define call_all(dev, o, f, args...) \
453         v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
454
455 #define CX23885_HW_888_IR  (1 << 0)
456 #define CX23885_HW_AV_CORE (1 << 1)
457
458 #define call_hw(dev, grpid, o, f, args...) \
459         v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
460
461 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
462
463 #define SRAM_CH01  0 /* Video A */
464 #define SRAM_CH02  1 /* VBI A */
465 #define SRAM_CH03  2 /* Video B */
466 #define SRAM_CH04  3 /* Transport via B */
467 #define SRAM_CH05  4 /* VBI B */
468 #define SRAM_CH06  5 /* Video C */
469 #define SRAM_CH07  6 /* Transport via C */
470 #define SRAM_CH08  7 /* Audio Internal A */
471 #define SRAM_CH09  8 /* Audio Internal B */
472 #define SRAM_CH10  9 /* Audio External */
473 #define SRAM_CH11 10 /* COMB_3D_N */
474 #define SRAM_CH12 11 /* Comb 3D N1 */
475 #define SRAM_CH13 12 /* Comb 3D N2 */
476 #define SRAM_CH14 13 /* MOE Vid */
477 #define SRAM_CH15 14 /* MOE RSLT */
478
479 struct sram_channel {
480         char *name;
481         u32  cmds_start;
482         u32  ctrl_start;
483         u32  cdt;
484         u32  fifo_start;
485         u32  fifo_size;
486         u32  ptr1_reg;
487         u32  ptr2_reg;
488         u32  cnt1_reg;
489         u32  cnt2_reg;
490         u32  jumponly;
491 };
492
493 /* ----------------------------------------------------------- */
494
495 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
496 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
497
498 #define cx_andor(reg, mask, value) \
499   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
500   ((value) & (mask)), dev->lmmio+((reg)>>2))
501
502 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
503 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
504
505 /* ----------------------------------------------------------- */
506 /* cx23885-core.c                                              */
507
508 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
509         struct sram_channel *ch,
510         unsigned int bpl, u32 risc);
511
512 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
513         struct sram_channel *ch);
514
515 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
516         struct scatterlist *sglist,
517         unsigned int top_offset, unsigned int bottom_offset,
518         unsigned int bpl, unsigned int padding, unsigned int lines);
519
520 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
521         struct cx23885_riscmem *risc, struct scatterlist *sglist,
522         unsigned int top_offset, unsigned int bottom_offset,
523         unsigned int bpl, unsigned int padding, unsigned int lines);
524
525 int cx23885_start_dma(struct cx23885_tsport *port,
526                              struct cx23885_dmaqueue *q,
527                              struct cx23885_buffer   *buf);
528 void cx23885_cancel_buffers(struct cx23885_tsport *port);
529
530
531 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
532 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
533 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
534 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
535         int asoutput);
536
537 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
538 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
539 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
540 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
541
542 /* ----------------------------------------------------------- */
543 /* cx23885-cards.c                                             */
544 extern struct cx23885_board cx23885_boards[];
545 extern const unsigned int cx23885_bcount;
546
547 extern struct cx23885_subid cx23885_subids[];
548 extern const unsigned int cx23885_idcount;
549
550 extern int cx23885_tuner_callback(void *priv, int component,
551         int command, int arg);
552 extern void cx23885_card_list(struct cx23885_dev *dev);
553 extern int  cx23885_ir_init(struct cx23885_dev *dev);
554 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
555 extern void cx23885_ir_fini(struct cx23885_dev *dev);
556 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
557 extern void cx23885_card_setup(struct cx23885_dev *dev);
558 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
559
560 extern int cx23885_dvb_register(struct cx23885_tsport *port);
561 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
562
563 extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
564                                struct cx23885_tsport *port);
565 extern void cx23885_buf_queue(struct cx23885_tsport *port,
566                               struct cx23885_buffer *buf);
567 extern void cx23885_free_buffer(struct cx23885_dev *dev,
568                                 struct cx23885_buffer *buf);
569
570 /* ----------------------------------------------------------- */
571 /* cx23885-video.c                                             */
572 /* Video */
573 extern int cx23885_video_register(struct cx23885_dev *dev);
574 extern void cx23885_video_unregister(struct cx23885_dev *dev);
575 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
576 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
577         struct cx23885_dmaqueue *q, u32 count);
578 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
579 int cx23885_set_input(struct file *file, void *priv, unsigned int i);
580 int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
581 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
582 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
583
584 /* ----------------------------------------------------------- */
585 /* cx23885-vbi.c                                               */
586 extern int cx23885_vbi_fmt(struct file *file, void *priv,
587         struct v4l2_format *f);
588 extern void cx23885_vbi_timeout(unsigned long data);
589 extern const struct vb2_ops cx23885_vbi_qops;
590 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
591
592 /* cx23885-i2c.c                                                */
593 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
594 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
595 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
596
597 /* ----------------------------------------------------------- */
598 /* cx23885-417.c                                               */
599 extern int cx23885_417_register(struct cx23885_dev *dev);
600 extern void cx23885_417_unregister(struct cx23885_dev *dev);
601 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
602 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
603 extern void cx23885_mc417_init(struct cx23885_dev *dev);
604 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
605 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
606 extern int mc417_register_read(struct cx23885_dev *dev,
607                                 u16 address, u32 *value);
608 extern int mc417_register_write(struct cx23885_dev *dev,
609                                 u16 address, u32 value);
610 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
611 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
612 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
613
614 /* ----------------------------------------------------------- */
615 /* cx23885-alsa.c                                             */
616 extern struct cx23885_audio_dev *cx23885_audio_register(
617                                         struct cx23885_dev *dev);
618 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
619 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
620 extern int cx23885_risc_databuffer(struct pci_dev *pci,
621                                    struct cx23885_riscmem *risc,
622                                    struct scatterlist *sglist,
623                                    unsigned int bpl,
624                                    unsigned int lines,
625                                    unsigned int lpi);
626
627 /* ----------------------------------------------------------- */
628 /* tv norms                                                    */
629
630 static inline unsigned int norm_maxh(v4l2_std_id norm)
631 {
632         return (norm & V4L2_STD_525_60) ? 480 : 576;
633 }