2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/kernel.h>
21 #include <linux/sched/signal.h>
22 #include <linux/module.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/pci.h>
26 #include <linux/kthread.h>
27 #include <linux/freezer.h>
28 #include <linux/ratelimit.h>
30 #include <media/dvbdev.h>
31 #include <media/dvb_demux.h>
32 #include <media/dmxdev.h>
33 #include <media/dvb_net.h>
34 #include <media/dvb_frontend.h>
36 #include "va1j5jf8007t.h"
37 #include "va1j5jf8007s.h"
39 #define DRIVER_NAME "earth-pt1"
41 #define PT1_PAGE_SHIFT 12
42 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
43 #define PT1_NR_UPACKETS 1024
44 #define PT1_NR_BUFS 511
46 struct pt1_buffer_page {
47 __le32 upackets[PT1_NR_UPACKETS];
50 struct pt1_table_page {
52 __le32 buf_pfns[PT1_NR_BUFS];
56 struct pt1_buffer_page *page;
61 struct pt1_table_page *page;
63 struct pt1_buffer bufs[PT1_NR_BUFS];
66 #define PT1_NR_ADAPS 4
73 struct i2c_adapter i2c_adap;
75 struct pt1_adapter *adaps[PT1_NR_ADAPS];
76 struct pt1_table *tables;
77 struct task_struct *kthread;
95 struct dvb_adapter adap;
96 struct dvb_demux demux;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 enum fe_sec_voltage voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
105 enum fe_sec_voltage voltage;
109 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
111 writel(data, pt1->regs + reg * 4);
114 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
116 return readl(pt1->regs + reg * 4);
119 static unsigned int pt1_nr_tables = 8;
120 module_param_named(nr_tables, pt1_nr_tables, uint, 0);
122 static void pt1_increment_table_count(struct pt1 *pt1)
124 pt1_write_reg(pt1, 0, 0x00000020);
127 static void pt1_init_table_count(struct pt1 *pt1)
129 pt1_write_reg(pt1, 0, 0x00000010);
132 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
134 pt1_write_reg(pt1, 5, first_pfn);
135 pt1_write_reg(pt1, 0, 0x0c000040);
138 static void pt1_unregister_tables(struct pt1 *pt1)
140 pt1_write_reg(pt1, 0, 0x08080000);
143 static int pt1_sync(struct pt1 *pt1)
146 for (i = 0; i < 57; i++) {
147 if (pt1_read_reg(pt1, 0) & 0x20000000)
149 pt1_write_reg(pt1, 0, 0x00000008);
151 dev_err(&pt1->pdev->dev, "could not sync\n");
155 static u64 pt1_identify(struct pt1 *pt1)
160 for (i = 0; i < 57; i++) {
161 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
162 pt1_write_reg(pt1, 0, 0x00000008);
167 static int pt1_unlock(struct pt1 *pt1)
170 pt1_write_reg(pt1, 0, 0x00000008);
171 for (i = 0; i < 3; i++) {
172 if (pt1_read_reg(pt1, 0) & 0x80000000)
174 schedule_timeout_uninterruptible((HZ + 999) / 1000);
176 dev_err(&pt1->pdev->dev, "could not unlock\n");
180 static int pt1_reset_pci(struct pt1 *pt1)
183 pt1_write_reg(pt1, 0, 0x01010000);
184 pt1_write_reg(pt1, 0, 0x01000000);
185 for (i = 0; i < 10; i++) {
186 if (pt1_read_reg(pt1, 0) & 0x00000001)
188 schedule_timeout_uninterruptible((HZ + 999) / 1000);
190 dev_err(&pt1->pdev->dev, "could not reset PCI\n");
194 static int pt1_reset_ram(struct pt1 *pt1)
197 pt1_write_reg(pt1, 0, 0x02020000);
198 pt1_write_reg(pt1, 0, 0x02000000);
199 for (i = 0; i < 10; i++) {
200 if (pt1_read_reg(pt1, 0) & 0x00000002)
202 schedule_timeout_uninterruptible((HZ + 999) / 1000);
204 dev_err(&pt1->pdev->dev, "could not reset RAM\n");
208 static int pt1_do_enable_ram(struct pt1 *pt1)
212 status = pt1_read_reg(pt1, 0) & 0x00000004;
213 pt1_write_reg(pt1, 0, 0x00000002);
214 for (i = 0; i < 10; i++) {
215 for (j = 0; j < 1024; j++) {
216 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
219 schedule_timeout_uninterruptible((HZ + 999) / 1000);
221 dev_err(&pt1->pdev->dev, "could not enable RAM\n");
225 static int pt1_enable_ram(struct pt1 *pt1)
229 schedule_timeout_uninterruptible((HZ + 999) / 1000);
230 phase = pt1->pdev->device == 0x211a ? 128 : 166;
231 for (i = 0; i < phase; i++) {
232 ret = pt1_do_enable_ram(pt1);
239 static void pt1_disable_ram(struct pt1 *pt1)
241 pt1_write_reg(pt1, 0, 0x0b0b0000);
244 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
246 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
249 static void pt1_init_streams(struct pt1 *pt1)
252 for (i = 0; i < PT1_NR_ADAPS; i++)
253 pt1_set_stream(pt1, i, 0);
256 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
261 struct pt1_adapter *adap;
266 if (!page->upackets[PT1_NR_UPACKETS - 1])
269 for (i = 0; i < PT1_NR_UPACKETS; i++) {
270 upacket = le32_to_cpu(page->upackets[i]);
271 index = (upacket >> 29) - 1;
272 if (index < 0 || index >= PT1_NR_ADAPS)
275 adap = pt1->adaps[index];
276 if (upacket >> 25 & 1)
277 adap->upacket_count = 0;
278 else if (!adap->upacket_count)
281 if (upacket >> 24 & 1)
282 printk_ratelimited(KERN_INFO "earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
283 pt1->table_index, pt1->buf_index);
284 sc = upacket >> 26 & 0x7;
285 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
286 printk_ratelimited(KERN_INFO "earth-pt1: data loss in streamID(adapter)[%d]\n",
291 offset = adap->packet_count * 188 + adap->upacket_count * 3;
292 buf[offset] = upacket >> 16;
293 buf[offset + 1] = upacket >> 8;
294 if (adap->upacket_count != 62)
295 buf[offset + 2] = upacket;
297 if (++adap->upacket_count >= 63) {
298 adap->upacket_count = 0;
299 if (++adap->packet_count >= 21) {
300 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
301 adap->packet_count = 0;
306 page->upackets[PT1_NR_UPACKETS - 1] = 0;
310 static int pt1_thread(void *data)
313 struct pt1_buffer_page *page;
318 while (!kthread_should_stop()) {
321 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
322 if (!pt1_filter(pt1, page)) {
323 schedule_timeout_interruptible((HZ + 999) / 1000);
327 if (++pt1->buf_index >= PT1_NR_BUFS) {
328 pt1_increment_table_count(pt1);
330 if (++pt1->table_index >= pt1_nr_tables)
331 pt1->table_index = 0;
338 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
340 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
343 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
348 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
353 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
354 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
357 *pfnp = addr >> PT1_PAGE_SHIFT;
361 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
363 pt1_free_page(pt1, buf->page, buf->addr);
367 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
369 struct pt1_buffer_page *page;
372 page = pt1_alloc_page(pt1, &addr, pfnp);
376 page->upackets[PT1_NR_UPACKETS - 1] = 0;
383 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
387 for (i = 0; i < PT1_NR_BUFS; i++)
388 pt1_cleanup_buffer(pt1, &table->bufs[i]);
390 pt1_free_page(pt1, table->page, table->addr);
394 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
396 struct pt1_table_page *page;
401 page = pt1_alloc_page(pt1, &addr, pfnp);
405 for (i = 0; i < PT1_NR_BUFS; i++) {
406 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
410 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
413 pt1_increment_table_count(pt1);
420 pt1_cleanup_buffer(pt1, &table->bufs[i]);
422 pt1_free_page(pt1, page, addr);
426 static void pt1_cleanup_tables(struct pt1 *pt1)
428 struct pt1_table *tables;
431 tables = pt1->tables;
432 pt1_unregister_tables(pt1);
434 for (i = 0; i < pt1_nr_tables; i++)
435 pt1_cleanup_table(pt1, &tables[i]);
440 static int pt1_init_tables(struct pt1 *pt1)
442 struct pt1_table *tables;
449 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
453 pt1_init_table_count(pt1);
456 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
461 while (i < pt1_nr_tables) {
462 ret = pt1_init_table(pt1, &tables[i], &pfn);
465 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
469 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
471 pt1_register_tables(pt1, first_pfn);
472 pt1->tables = tables;
477 pt1_cleanup_table(pt1, &tables[i]);
483 static int pt1_start_polling(struct pt1 *pt1)
487 mutex_lock(&pt1->lock);
489 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
490 if (IS_ERR(pt1->kthread)) {
491 ret = PTR_ERR(pt1->kthread);
495 mutex_unlock(&pt1->lock);
499 static int pt1_start_feed(struct dvb_demux_feed *feed)
501 struct pt1_adapter *adap;
502 adap = container_of(feed->demux, struct pt1_adapter, demux);
503 if (!adap->users++) {
506 ret = pt1_start_polling(adap->pt1);
509 pt1_set_stream(adap->pt1, adap->index, 1);
514 static void pt1_stop_polling(struct pt1 *pt1)
518 mutex_lock(&pt1->lock);
519 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
520 count += pt1->adaps[i]->users;
522 if (count == 0 && pt1->kthread) {
523 kthread_stop(pt1->kthread);
526 mutex_unlock(&pt1->lock);
529 static int pt1_stop_feed(struct dvb_demux_feed *feed)
531 struct pt1_adapter *adap;
532 adap = container_of(feed->demux, struct pt1_adapter, demux);
533 if (!--adap->users) {
534 pt1_set_stream(adap->pt1, adap->index, 0);
535 pt1_stop_polling(adap->pt1);
541 pt1_update_power(struct pt1 *pt1)
545 struct pt1_adapter *adap;
546 static const int sleep_bits[] = {
553 bits = pt1->power | !pt1->reset << 3;
554 mutex_lock(&pt1->lock);
555 for (i = 0; i < PT1_NR_ADAPS; i++) {
556 adap = pt1->adaps[i];
557 switch (adap->voltage) {
558 case SEC_VOLTAGE_13: /* actually 11V */
561 case SEC_VOLTAGE_18: /* actually 15V */
562 bits |= 1 << 1 | 1 << 2;
568 /* XXX: The bits should be changed depending on adap->sleep. */
569 bits |= sleep_bits[i];
571 pt1_write_reg(pt1, 1, bits);
572 mutex_unlock(&pt1->lock);
575 static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
577 struct pt1_adapter *adap;
579 adap = container_of(fe->dvb, struct pt1_adapter, adap);
580 adap->voltage = voltage;
581 pt1_update_power(adap->pt1);
583 if (adap->orig_set_voltage)
584 return adap->orig_set_voltage(fe, voltage);
589 static int pt1_sleep(struct dvb_frontend *fe)
591 struct pt1_adapter *adap;
593 adap = container_of(fe->dvb, struct pt1_adapter, adap);
595 pt1_update_power(adap->pt1);
597 if (adap->orig_sleep)
598 return adap->orig_sleep(fe);
603 static int pt1_wakeup(struct dvb_frontend *fe)
605 struct pt1_adapter *adap;
607 adap = container_of(fe->dvb, struct pt1_adapter, adap);
609 pt1_update_power(adap->pt1);
610 schedule_timeout_uninterruptible((HZ + 999) / 1000);
613 return adap->orig_init(fe);
618 static void pt1_free_adapter(struct pt1_adapter *adap)
620 adap->demux.dmx.close(&adap->demux.dmx);
621 dvb_dmxdev_release(&adap->dmxdev);
622 dvb_dmx_release(&adap->demux);
623 dvb_unregister_adapter(&adap->adap);
624 free_page((unsigned long)adap->buf);
628 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
630 static struct pt1_adapter *
631 pt1_alloc_adapter(struct pt1 *pt1)
633 struct pt1_adapter *adap;
635 struct dvb_adapter *dvb_adap;
636 struct dvb_demux *demux;
637 struct dmxdev *dmxdev;
640 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
648 adap->voltage = SEC_VOLTAGE_OFF;
651 buf = (u8 *)__get_free_page(GFP_KERNEL);
658 adap->upacket_count = 0;
659 adap->packet_count = 0;
662 dvb_adap = &adap->adap;
663 dvb_adap->priv = adap;
664 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
665 &pt1->pdev->dev, adapter_nr);
669 demux = &adap->demux;
670 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
672 demux->feednum = 256;
673 demux->filternum = 256;
674 demux->start_feed = pt1_start_feed;
675 demux->stop_feed = pt1_stop_feed;
676 demux->write_to_decoder = NULL;
677 ret = dvb_dmx_init(demux);
679 goto err_unregister_adapter;
681 dmxdev = &adap->dmxdev;
682 dmxdev->filternum = 256;
683 dmxdev->demux = &demux->dmx;
684 dmxdev->capabilities = 0;
685 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
687 goto err_dmx_release;
692 dvb_dmx_release(demux);
693 err_unregister_adapter:
694 dvb_unregister_adapter(dvb_adap);
696 free_page((unsigned long)buf);
703 static void pt1_cleanup_adapters(struct pt1 *pt1)
706 for (i = 0; i < PT1_NR_ADAPS; i++)
707 pt1_free_adapter(pt1->adaps[i]);
710 static int pt1_init_adapters(struct pt1 *pt1)
713 struct pt1_adapter *adap;
716 for (i = 0; i < PT1_NR_ADAPS; i++) {
717 adap = pt1_alloc_adapter(pt1);
724 pt1->adaps[i] = adap;
730 pt1_free_adapter(pt1->adaps[i]);
735 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
737 dvb_unregister_frontend(adap->fe);
740 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
744 adap->orig_set_voltage = fe->ops.set_voltage;
745 adap->orig_sleep = fe->ops.sleep;
746 adap->orig_init = fe->ops.init;
747 fe->ops.set_voltage = pt1_set_voltage;
748 fe->ops.sleep = pt1_sleep;
749 fe->ops.init = pt1_wakeup;
751 ret = dvb_register_frontend(&adap->adap, fe);
759 static void pt1_cleanup_frontends(struct pt1 *pt1)
762 for (i = 0; i < PT1_NR_ADAPS; i++)
763 pt1_cleanup_frontend(pt1->adaps[i]);
767 struct va1j5jf8007s_config va1j5jf8007s_config;
768 struct va1j5jf8007t_config va1j5jf8007t_config;
771 static const struct pt1_config pt1_configs[2] = {
774 .demod_address = 0x1b,
775 .frequency = VA1J5JF8007S_20MHZ,
778 .demod_address = 0x1a,
779 .frequency = VA1J5JF8007T_20MHZ,
783 .demod_address = 0x19,
784 .frequency = VA1J5JF8007S_20MHZ,
787 .demod_address = 0x18,
788 .frequency = VA1J5JF8007T_20MHZ,
793 static const struct pt1_config pt2_configs[2] = {
796 .demod_address = 0x1b,
797 .frequency = VA1J5JF8007S_25MHZ,
800 .demod_address = 0x1a,
801 .frequency = VA1J5JF8007T_25MHZ,
805 .demod_address = 0x19,
806 .frequency = VA1J5JF8007S_25MHZ,
809 .demod_address = 0x18,
810 .frequency = VA1J5JF8007T_25MHZ,
815 static int pt1_init_frontends(struct pt1 *pt1)
818 struct i2c_adapter *i2c_adap;
819 const struct pt1_config *configs, *config;
820 struct dvb_frontend *fe[4];
826 i2c_adap = &pt1->i2c_adap;
827 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
829 config = &configs[i / 2];
831 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
834 ret = -ENODEV; /* This does not sound nice... */
839 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
847 ret = va1j5jf8007s_prepare(fe[i - 2]);
851 ret = va1j5jf8007t_prepare(fe[i - 1]);
858 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
867 fe[i]->ops.release(fe[i]);
870 dvb_unregister_frontend(fe[j]);
875 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
876 int clock, int data, int next_addr)
878 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
879 !clock << 11 | !data << 10 | next_addr);
882 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
884 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
885 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
886 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
890 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
892 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
893 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
894 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
895 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
899 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
902 for (i = 0; i < 8; i++)
903 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
904 pt1_i2c_write_bit(pt1, addr, &addr, 1);
908 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
911 for (i = 0; i < 8; i++)
912 pt1_i2c_read_bit(pt1, addr, &addr);
913 pt1_i2c_write_bit(pt1, addr, &addr, last);
917 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
919 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
920 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
921 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
926 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
929 pt1_i2c_prepare(pt1, addr, &addr);
930 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
931 for (i = 0; i < msg->len; i++)
932 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
937 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
940 pt1_i2c_prepare(pt1, addr, &addr);
941 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
942 for (i = 0; i < msg->len; i++)
943 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
947 static int pt1_i2c_end(struct pt1 *pt1, int addr)
949 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
950 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
951 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
953 pt1_write_reg(pt1, 0, 0x00000004);
955 if (signal_pending(current))
957 schedule_timeout_interruptible((HZ + 999) / 1000);
958 } while (pt1_read_reg(pt1, 0) & 0x00000080);
962 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
967 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
970 if (!pt1->i2c_running) {
971 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
972 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
974 pt1->i2c_running = 1;
979 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
983 struct i2c_msg *msg, *next_msg;
988 pt1 = i2c_get_adapdata(adap);
990 for (i = 0; i < num; i++) {
992 if (msg->flags & I2C_M_RD)
996 next_msg = &msgs[i + 1];
1000 if (next_msg && next_msg->flags & I2C_M_RD) {
1003 len = next_msg->len;
1007 pt1_i2c_begin(pt1, &addr);
1008 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1009 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1010 ret = pt1_i2c_end(pt1, addr);
1014 word = pt1_read_reg(pt1, 2);
1016 next_msg->buf[len] = word;
1020 pt1_i2c_begin(pt1, &addr);
1021 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1022 ret = pt1_i2c_end(pt1, addr);
1031 static u32 pt1_i2c_func(struct i2c_adapter *adap)
1033 return I2C_FUNC_I2C;
1036 static const struct i2c_algorithm pt1_i2c_algo = {
1037 .master_xfer = pt1_i2c_xfer,
1038 .functionality = pt1_i2c_func,
1041 static void pt1_i2c_wait(struct pt1 *pt1)
1044 for (i = 0; i < 128; i++)
1045 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1048 static void pt1_i2c_init(struct pt1 *pt1)
1051 for (i = 0; i < 1024; i++)
1052 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1055 static void pt1_remove(struct pci_dev *pdev)
1060 pt1 = pci_get_drvdata(pdev);
1064 kthread_stop(pt1->kthread);
1065 pt1_cleanup_tables(pt1);
1066 pt1_cleanup_frontends(pt1);
1067 pt1_disable_ram(pt1);
1070 pt1_update_power(pt1);
1071 pt1_cleanup_adapters(pt1);
1072 i2c_del_adapter(&pt1->i2c_adap);
1074 pci_iounmap(pdev, regs);
1075 pci_release_regions(pdev);
1076 pci_disable_device(pdev);
1079 static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1084 struct i2c_adapter *i2c_adap;
1086 ret = pci_enable_device(pdev);
1090 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1092 goto err_pci_disable_device;
1094 pci_set_master(pdev);
1096 ret = pci_request_regions(pdev, DRIVER_NAME);
1098 goto err_pci_disable_device;
1100 regs = pci_iomap(pdev, 0, 0);
1103 goto err_pci_release_regions;
1106 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1109 goto err_pci_iounmap;
1112 mutex_init(&pt1->lock);
1115 pci_set_drvdata(pdev, pt1);
1117 ret = pt1_init_adapters(pt1);
1121 mutex_init(&pt1->lock);
1125 pt1_update_power(pt1);
1127 i2c_adap = &pt1->i2c_adap;
1128 i2c_adap->algo = &pt1_i2c_algo;
1129 i2c_adap->algo_data = NULL;
1130 i2c_adap->dev.parent = &pdev->dev;
1131 strcpy(i2c_adap->name, DRIVER_NAME);
1132 i2c_set_adapdata(i2c_adap, pt1);
1133 ret = i2c_add_adapter(i2c_adap);
1135 goto err_pt1_cleanup_adapters;
1140 ret = pt1_sync(pt1);
1142 goto err_i2c_del_adapter;
1146 ret = pt1_unlock(pt1);
1148 goto err_i2c_del_adapter;
1150 ret = pt1_reset_pci(pt1);
1152 goto err_i2c_del_adapter;
1154 ret = pt1_reset_ram(pt1);
1156 goto err_i2c_del_adapter;
1158 ret = pt1_enable_ram(pt1);
1160 goto err_i2c_del_adapter;
1162 pt1_init_streams(pt1);
1165 pt1_update_power(pt1);
1166 schedule_timeout_uninterruptible((HZ + 49) / 50);
1169 pt1_update_power(pt1);
1170 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1172 ret = pt1_init_frontends(pt1);
1174 goto err_pt1_disable_ram;
1176 ret = pt1_init_tables(pt1);
1178 goto err_pt1_cleanup_frontends;
1182 err_pt1_cleanup_frontends:
1183 pt1_cleanup_frontends(pt1);
1184 err_pt1_disable_ram:
1185 pt1_disable_ram(pt1);
1188 pt1_update_power(pt1);
1189 err_i2c_del_adapter:
1190 i2c_del_adapter(i2c_adap);
1191 err_pt1_cleanup_adapters:
1192 pt1_cleanup_adapters(pt1);
1196 pci_iounmap(pdev, regs);
1197 err_pci_release_regions:
1198 pci_release_regions(pdev);
1199 err_pci_disable_device:
1200 pci_disable_device(pdev);
1206 static const struct pci_device_id pt1_id_table[] = {
1207 { PCI_DEVICE(0x10ee, 0x211a) },
1208 { PCI_DEVICE(0x10ee, 0x222a) },
1211 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1213 static struct pci_driver pt1_driver = {
1214 .name = DRIVER_NAME,
1216 .remove = pt1_remove,
1217 .id_table = pt1_id_table,
1220 module_pci_driver(pt1_driver);
1222 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1223 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1224 MODULE_LICENSE("GPL");