1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
5 * Author: Yong Deng <yong.deng@magewell.com>
9 #include <linux/delay.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/err.h>
13 #include <linux/interrupt.h>
15 #include <linux/ioctl.h>
16 #include <linux/module.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/reset.h>
23 #include <linux/sched.h>
24 #include <linux/sizes.h>
25 #include <linux/slab.h>
27 #include "sun6i_csi.h"
28 #include "sun6i_csi_reg.h"
30 #define MODULE_NAME "sun6i-csi"
32 struct sun6i_csi_dev {
36 struct regmap *regmap;
39 struct reset_control *rstc_bus;
44 static inline struct sun6i_csi_dev *sun6i_csi_to_dev(struct sun6i_csi *csi)
46 return container_of(csi, struct sun6i_csi_dev, csi);
49 /* TODO add 10&12 bit YUV, RGB support */
50 bool sun6i_csi_is_format_supported(struct sun6i_csi *csi,
51 u32 pixformat, u32 mbus_code)
53 struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
56 * Some video receivers have the ability to be compatible with
57 * 8bit and 16bit bus width.
58 * Identify the media bus format from device tree.
60 if ((sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_PARALLEL
61 || sdev->csi.v4l2_ep.bus_type == V4L2_MBUS_BT656)
62 && sdev->csi.v4l2_ep.bus.parallel.bus_width == 16) {
64 case V4L2_PIX_FMT_HM12:
65 case V4L2_PIX_FMT_NV12:
66 case V4L2_PIX_FMT_NV21:
67 case V4L2_PIX_FMT_NV16:
68 case V4L2_PIX_FMT_NV61:
69 case V4L2_PIX_FMT_YUV420:
70 case V4L2_PIX_FMT_YVU420:
71 case V4L2_PIX_FMT_YUV422P:
73 case MEDIA_BUS_FMT_UYVY8_1X16:
74 case MEDIA_BUS_FMT_VYUY8_1X16:
75 case MEDIA_BUS_FMT_YUYV8_1X16:
76 case MEDIA_BUS_FMT_YVYU8_1X16:
79 dev_dbg(sdev->dev, "Unsupported mbus code: 0x%x\n",
85 dev_dbg(sdev->dev, "Unsupported pixformat: 0x%x\n",
93 case V4L2_PIX_FMT_SBGGR8:
94 return (mbus_code == MEDIA_BUS_FMT_SBGGR8_1X8);
95 case V4L2_PIX_FMT_SGBRG8:
96 return (mbus_code == MEDIA_BUS_FMT_SGBRG8_1X8);
97 case V4L2_PIX_FMT_SGRBG8:
98 return (mbus_code == MEDIA_BUS_FMT_SGRBG8_1X8);
99 case V4L2_PIX_FMT_SRGGB8:
100 return (mbus_code == MEDIA_BUS_FMT_SRGGB8_1X8);
101 case V4L2_PIX_FMT_SBGGR10:
102 return (mbus_code == MEDIA_BUS_FMT_SBGGR10_1X10);
103 case V4L2_PIX_FMT_SGBRG10:
104 return (mbus_code == MEDIA_BUS_FMT_SGBRG10_1X10);
105 case V4L2_PIX_FMT_SGRBG10:
106 return (mbus_code == MEDIA_BUS_FMT_SGRBG10_1X10);
107 case V4L2_PIX_FMT_SRGGB10:
108 return (mbus_code == MEDIA_BUS_FMT_SRGGB10_1X10);
109 case V4L2_PIX_FMT_SBGGR12:
110 return (mbus_code == MEDIA_BUS_FMT_SBGGR12_1X12);
111 case V4L2_PIX_FMT_SGBRG12:
112 return (mbus_code == MEDIA_BUS_FMT_SGBRG12_1X12);
113 case V4L2_PIX_FMT_SGRBG12:
114 return (mbus_code == MEDIA_BUS_FMT_SGRBG12_1X12);
115 case V4L2_PIX_FMT_SRGGB12:
116 return (mbus_code == MEDIA_BUS_FMT_SRGGB12_1X12);
118 case V4L2_PIX_FMT_YUYV:
119 return (mbus_code == MEDIA_BUS_FMT_YUYV8_2X8);
120 case V4L2_PIX_FMT_YVYU:
121 return (mbus_code == MEDIA_BUS_FMT_YVYU8_2X8);
122 case V4L2_PIX_FMT_UYVY:
123 return (mbus_code == MEDIA_BUS_FMT_UYVY8_2X8);
124 case V4L2_PIX_FMT_VYUY:
125 return (mbus_code == MEDIA_BUS_FMT_VYUY8_2X8);
127 case V4L2_PIX_FMT_HM12:
128 case V4L2_PIX_FMT_NV12:
129 case V4L2_PIX_FMT_NV21:
130 case V4L2_PIX_FMT_NV16:
131 case V4L2_PIX_FMT_NV61:
132 case V4L2_PIX_FMT_YUV420:
133 case V4L2_PIX_FMT_YVU420:
134 case V4L2_PIX_FMT_YUV422P:
136 case MEDIA_BUS_FMT_UYVY8_2X8:
137 case MEDIA_BUS_FMT_VYUY8_2X8:
138 case MEDIA_BUS_FMT_YUYV8_2X8:
139 case MEDIA_BUS_FMT_YVYU8_2X8:
142 dev_dbg(sdev->dev, "Unsupported mbus code: 0x%x\n",
148 case V4L2_PIX_FMT_RGB565:
149 return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_LE);
150 case V4L2_PIX_FMT_RGB565X:
151 return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_BE);
154 dev_dbg(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat);
161 int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable)
163 struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
164 struct device *dev = sdev->dev;
165 struct regmap *regmap = sdev->regmap;
169 regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
171 clk_disable_unprepare(sdev->clk_ram);
172 if (of_device_is_compatible(dev->of_node,
173 "allwinner,sun50i-a64-csi"))
174 clk_rate_exclusive_put(sdev->clk_mod);
175 clk_disable_unprepare(sdev->clk_mod);
176 reset_control_assert(sdev->rstc_bus);
180 ret = clk_prepare_enable(sdev->clk_mod);
182 dev_err(sdev->dev, "Enable csi clk err %d\n", ret);
186 if (of_device_is_compatible(dev->of_node, "allwinner,sun50i-a64-csi"))
187 clk_set_rate_exclusive(sdev->clk_mod, 300000000);
189 ret = clk_prepare_enable(sdev->clk_ram);
191 dev_err(sdev->dev, "Enable clk_dram_csi clk err %d\n", ret);
192 goto clk_mod_disable;
195 ret = reset_control_deassert(sdev->rstc_bus);
197 dev_err(sdev->dev, "reset err %d\n", ret);
198 goto clk_ram_disable;
201 regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, CSI_EN_CSI_EN);
206 clk_disable_unprepare(sdev->clk_ram);
208 if (of_device_is_compatible(dev->of_node, "allwinner,sun50i-a64-csi"))
209 clk_rate_exclusive_put(sdev->clk_mod);
210 clk_disable_unprepare(sdev->clk_mod);
214 static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_dev *sdev,
215 u32 mbus_code, u32 pixformat)
218 if ((mbus_code & 0xF000) != 0x2000)
219 return CSI_INPUT_FORMAT_RAW;
222 case V4L2_PIX_FMT_YUYV:
223 case V4L2_PIX_FMT_YVYU:
224 case V4L2_PIX_FMT_UYVY:
225 case V4L2_PIX_FMT_VYUY:
226 return CSI_INPUT_FORMAT_RAW;
231 /* not support YUV420 input format yet */
232 dev_dbg(sdev->dev, "Select YUV422 as default input format of CSI.\n");
233 return CSI_INPUT_FORMAT_YUV422;
236 static enum csi_output_fmt get_csi_output_format(struct sun6i_csi_dev *sdev,
237 u32 pixformat, u32 field)
239 bool buf_interlaced = false;
241 if (field == V4L2_FIELD_INTERLACED
242 || field == V4L2_FIELD_INTERLACED_TB
243 || field == V4L2_FIELD_INTERLACED_BT)
244 buf_interlaced = true;
247 case V4L2_PIX_FMT_SBGGR8:
248 case V4L2_PIX_FMT_SGBRG8:
249 case V4L2_PIX_FMT_SGRBG8:
250 case V4L2_PIX_FMT_SRGGB8:
251 return buf_interlaced ? CSI_FRAME_RAW_8 : CSI_FIELD_RAW_8;
252 case V4L2_PIX_FMT_SBGGR10:
253 case V4L2_PIX_FMT_SGBRG10:
254 case V4L2_PIX_FMT_SGRBG10:
255 case V4L2_PIX_FMT_SRGGB10:
256 return buf_interlaced ? CSI_FRAME_RAW_10 : CSI_FIELD_RAW_10;
257 case V4L2_PIX_FMT_SBGGR12:
258 case V4L2_PIX_FMT_SGBRG12:
259 case V4L2_PIX_FMT_SGRBG12:
260 case V4L2_PIX_FMT_SRGGB12:
261 return buf_interlaced ? CSI_FRAME_RAW_12 : CSI_FIELD_RAW_12;
263 case V4L2_PIX_FMT_YUYV:
264 case V4L2_PIX_FMT_YVYU:
265 case V4L2_PIX_FMT_UYVY:
266 case V4L2_PIX_FMT_VYUY:
267 return buf_interlaced ? CSI_FRAME_RAW_8 : CSI_FIELD_RAW_8;
269 case V4L2_PIX_FMT_HM12:
270 return buf_interlaced ? CSI_FRAME_MB_YUV420 :
272 case V4L2_PIX_FMT_NV12:
273 case V4L2_PIX_FMT_NV21:
274 return buf_interlaced ? CSI_FRAME_UV_CB_YUV420 :
275 CSI_FIELD_UV_CB_YUV420;
276 case V4L2_PIX_FMT_YUV420:
277 case V4L2_PIX_FMT_YVU420:
278 return buf_interlaced ? CSI_FRAME_PLANAR_YUV420 :
279 CSI_FIELD_PLANAR_YUV420;
280 case V4L2_PIX_FMT_NV16:
281 case V4L2_PIX_FMT_NV61:
282 return buf_interlaced ? CSI_FRAME_UV_CB_YUV422 :
283 CSI_FIELD_UV_CB_YUV422;
284 case V4L2_PIX_FMT_YUV422P:
285 return buf_interlaced ? CSI_FRAME_PLANAR_YUV422 :
286 CSI_FIELD_PLANAR_YUV422;
288 case V4L2_PIX_FMT_RGB565:
289 case V4L2_PIX_FMT_RGB565X:
290 return buf_interlaced ? CSI_FRAME_RGB565 : CSI_FIELD_RGB565;
293 dev_warn(sdev->dev, "Unsupported pixformat: 0x%x\n", pixformat);
297 return CSI_FIELD_RAW_8;
300 static enum csi_input_seq get_csi_input_seq(struct sun6i_csi_dev *sdev,
301 u32 mbus_code, u32 pixformat)
303 /* Input sequence does not apply to non-YUV formats */
304 if ((mbus_code & 0xF000) != 0x2000)
308 case V4L2_PIX_FMT_HM12:
309 case V4L2_PIX_FMT_NV12:
310 case V4L2_PIX_FMT_NV16:
311 case V4L2_PIX_FMT_YUV420:
312 case V4L2_PIX_FMT_YUV422P:
314 case MEDIA_BUS_FMT_UYVY8_2X8:
315 case MEDIA_BUS_FMT_UYVY8_1X16:
316 return CSI_INPUT_SEQ_UYVY;
317 case MEDIA_BUS_FMT_VYUY8_2X8:
318 case MEDIA_BUS_FMT_VYUY8_1X16:
319 return CSI_INPUT_SEQ_VYUY;
320 case MEDIA_BUS_FMT_YUYV8_2X8:
321 case MEDIA_BUS_FMT_YUYV8_1X16:
322 return CSI_INPUT_SEQ_YUYV;
323 case MEDIA_BUS_FMT_YVYU8_1X16:
324 case MEDIA_BUS_FMT_YVYU8_2X8:
325 return CSI_INPUT_SEQ_YVYU;
327 dev_warn(sdev->dev, "Unsupported mbus code: 0x%x\n",
332 case V4L2_PIX_FMT_NV21:
333 case V4L2_PIX_FMT_NV61:
334 case V4L2_PIX_FMT_YVU420:
336 case MEDIA_BUS_FMT_UYVY8_2X8:
337 case MEDIA_BUS_FMT_UYVY8_1X16:
338 return CSI_INPUT_SEQ_VYUY;
339 case MEDIA_BUS_FMT_VYUY8_2X8:
340 case MEDIA_BUS_FMT_VYUY8_1X16:
341 return CSI_INPUT_SEQ_UYVY;
342 case MEDIA_BUS_FMT_YUYV8_2X8:
343 case MEDIA_BUS_FMT_YUYV8_1X16:
344 return CSI_INPUT_SEQ_YVYU;
345 case MEDIA_BUS_FMT_YVYU8_1X16:
346 case MEDIA_BUS_FMT_YVYU8_2X8:
347 return CSI_INPUT_SEQ_YUYV;
349 dev_warn(sdev->dev, "Unsupported mbus code: 0x%x\n",
355 case V4L2_PIX_FMT_YUYV:
356 return CSI_INPUT_SEQ_YUYV;
359 dev_warn(sdev->dev, "Unsupported pixformat: 0x%x, defaulting to YUYV\n",
364 return CSI_INPUT_SEQ_YUYV;
367 static void sun6i_csi_setup_bus(struct sun6i_csi_dev *sdev)
369 struct v4l2_fwnode_endpoint *endpoint = &sdev->csi.v4l2_ep;
370 struct sun6i_csi *csi = &sdev->csi;
371 unsigned char bus_width;
374 bool input_interlaced = false;
376 if (csi->config.field == V4L2_FIELD_INTERLACED
377 || csi->config.field == V4L2_FIELD_INTERLACED_TB
378 || csi->config.field == V4L2_FIELD_INTERLACED_BT)
379 input_interlaced = true;
381 bus_width = endpoint->bus.parallel.bus_width;
383 regmap_read(sdev->regmap, CSI_IF_CFG_REG, &cfg);
385 cfg &= ~(CSI_IF_CFG_CSI_IF_MASK | CSI_IF_CFG_MIPI_IF_MASK |
386 CSI_IF_CFG_IF_DATA_WIDTH_MASK |
387 CSI_IF_CFG_CLK_POL_MASK | CSI_IF_CFG_VREF_POL_MASK |
388 CSI_IF_CFG_HREF_POL_MASK | CSI_IF_CFG_FIELD_MASK |
389 CSI_IF_CFG_SRC_TYPE_MASK);
391 if (input_interlaced)
392 cfg |= CSI_IF_CFG_SRC_TYPE_INTERLACED;
394 cfg |= CSI_IF_CFG_SRC_TYPE_PROGRESSED;
396 switch (endpoint->bus_type) {
397 case V4L2_MBUS_PARALLEL:
398 cfg |= CSI_IF_CFG_MIPI_IF_CSI;
400 flags = endpoint->bus.parallel.flags;
402 cfg |= (bus_width == 16) ? CSI_IF_CFG_CSI_IF_YUV422_16BIT :
403 CSI_IF_CFG_CSI_IF_YUV422_INTLV;
405 if (flags & V4L2_MBUS_FIELD_EVEN_LOW)
406 cfg |= CSI_IF_CFG_FIELD_POSITIVE;
408 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
409 cfg |= CSI_IF_CFG_VREF_POL_POSITIVE;
410 if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
411 cfg |= CSI_IF_CFG_HREF_POL_POSITIVE;
413 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
414 cfg |= CSI_IF_CFG_CLK_POL_FALLING_EDGE;
416 case V4L2_MBUS_BT656:
417 cfg |= CSI_IF_CFG_MIPI_IF_CSI;
419 flags = endpoint->bus.parallel.flags;
421 cfg |= (bus_width == 16) ? CSI_IF_CFG_CSI_IF_BT1120 :
422 CSI_IF_CFG_CSI_IF_BT656;
424 if (flags & V4L2_MBUS_FIELD_EVEN_LOW)
425 cfg |= CSI_IF_CFG_FIELD_POSITIVE;
427 if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
428 cfg |= CSI_IF_CFG_CLK_POL_FALLING_EDGE;
431 dev_warn(sdev->dev, "Unsupported bus type: %d\n",
438 cfg |= CSI_IF_CFG_IF_DATA_WIDTH_8BIT;
441 cfg |= CSI_IF_CFG_IF_DATA_WIDTH_10BIT;
444 cfg |= CSI_IF_CFG_IF_DATA_WIDTH_12BIT;
446 case 16: /* No need to configure DATA_WIDTH for 16bit */
449 dev_warn(sdev->dev, "Unsupported bus width: %u\n", bus_width);
453 regmap_write(sdev->regmap, CSI_IF_CFG_REG, cfg);
456 static void sun6i_csi_set_format(struct sun6i_csi_dev *sdev)
458 struct sun6i_csi *csi = &sdev->csi;
462 regmap_read(sdev->regmap, CSI_CH_CFG_REG, &cfg);
464 cfg &= ~(CSI_CH_CFG_INPUT_FMT_MASK |
465 CSI_CH_CFG_OUTPUT_FMT_MASK | CSI_CH_CFG_VFLIP_EN |
466 CSI_CH_CFG_HFLIP_EN | CSI_CH_CFG_FIELD_SEL_MASK |
467 CSI_CH_CFG_INPUT_SEQ_MASK);
469 val = get_csi_input_format(sdev, csi->config.code,
470 csi->config.pixelformat);
471 cfg |= CSI_CH_CFG_INPUT_FMT(val);
473 val = get_csi_output_format(sdev, csi->config.pixelformat,
475 cfg |= CSI_CH_CFG_OUTPUT_FMT(val);
477 val = get_csi_input_seq(sdev, csi->config.code,
478 csi->config.pixelformat);
479 cfg |= CSI_CH_CFG_INPUT_SEQ(val);
481 if (csi->config.field == V4L2_FIELD_TOP)
482 cfg |= CSI_CH_CFG_FIELD_SEL_FIELD0;
483 else if (csi->config.field == V4L2_FIELD_BOTTOM)
484 cfg |= CSI_CH_CFG_FIELD_SEL_FIELD1;
486 cfg |= CSI_CH_CFG_FIELD_SEL_BOTH;
488 regmap_write(sdev->regmap, CSI_CH_CFG_REG, cfg);
491 static void sun6i_csi_set_window(struct sun6i_csi_dev *sdev)
493 struct sun6i_csi_config *config = &sdev->csi.config;
496 int *planar_offset = sdev->planar_offset;
497 u32 width = config->width;
498 u32 height = config->height;
501 switch (config->pixelformat) {
502 case V4L2_PIX_FMT_YUYV:
503 case V4L2_PIX_FMT_YVYU:
504 case V4L2_PIX_FMT_UYVY:
505 case V4L2_PIX_FMT_VYUY:
507 "Horizontal length should be 2 times of width for packed YUV formats!\n");
514 regmap_write(sdev->regmap, CSI_CH_HSIZE_REG,
515 CSI_CH_HSIZE_HOR_LEN(hor_len) |
516 CSI_CH_HSIZE_HOR_START(0));
517 regmap_write(sdev->regmap, CSI_CH_VSIZE_REG,
518 CSI_CH_VSIZE_VER_LEN(height) |
519 CSI_CH_VSIZE_VER_START(0));
521 planar_offset[0] = 0;
522 switch (config->pixelformat) {
523 case V4L2_PIX_FMT_HM12:
524 case V4L2_PIX_FMT_NV12:
525 case V4L2_PIX_FMT_NV21:
526 case V4L2_PIX_FMT_NV16:
527 case V4L2_PIX_FMT_NV61:
528 bytesperline_y = width;
529 bytesperline_c = width;
530 planar_offset[1] = bytesperline_y * height;
531 planar_offset[2] = -1;
533 case V4L2_PIX_FMT_YUV420:
534 case V4L2_PIX_FMT_YVU420:
535 bytesperline_y = width;
536 bytesperline_c = width / 2;
537 planar_offset[1] = bytesperline_y * height;
538 planar_offset[2] = planar_offset[1] +
539 bytesperline_c * height / 2;
541 case V4L2_PIX_FMT_YUV422P:
542 bytesperline_y = width;
543 bytesperline_c = width / 2;
544 planar_offset[1] = bytesperline_y * height;
545 planar_offset[2] = planar_offset[1] +
546 bytesperline_c * height;
550 "Calculating pixelformat(0x%x)'s bytesperline as a packed format\n",
551 config->pixelformat);
552 bytesperline_y = (sun6i_csi_get_bpp(config->pixelformat) *
555 planar_offset[1] = -1;
556 planar_offset[2] = -1;
560 regmap_write(sdev->regmap, CSI_CH_BUF_LEN_REG,
561 CSI_CH_BUF_LEN_BUF_LEN_C(bytesperline_c) |
562 CSI_CH_BUF_LEN_BUF_LEN_Y(bytesperline_y));
565 int sun6i_csi_update_config(struct sun6i_csi *csi,
566 struct sun6i_csi_config *config)
568 struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
573 memcpy(&csi->config, config, sizeof(csi->config));
575 sun6i_csi_setup_bus(sdev);
576 sun6i_csi_set_format(sdev);
577 sun6i_csi_set_window(sdev);
582 void sun6i_csi_update_buf_addr(struct sun6i_csi *csi, dma_addr_t addr)
584 struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
586 regmap_write(sdev->regmap, CSI_CH_F0_BUFA_REG,
587 (addr + sdev->planar_offset[0]) >> 2);
588 if (sdev->planar_offset[1] != -1)
589 regmap_write(sdev->regmap, CSI_CH_F1_BUFA_REG,
590 (addr + sdev->planar_offset[1]) >> 2);
591 if (sdev->planar_offset[2] != -1)
592 regmap_write(sdev->regmap, CSI_CH_F2_BUFA_REG,
593 (addr + sdev->planar_offset[2]) >> 2);
596 void sun6i_csi_set_stream(struct sun6i_csi *csi, bool enable)
598 struct sun6i_csi_dev *sdev = sun6i_csi_to_dev(csi);
599 struct regmap *regmap = sdev->regmap;
602 regmap_update_bits(regmap, CSI_CAP_REG, CSI_CAP_CH0_VCAP_ON, 0);
603 regmap_write(regmap, CSI_CH_INT_EN_REG, 0);
607 regmap_write(regmap, CSI_CH_INT_STA_REG, 0xFF);
608 regmap_write(regmap, CSI_CH_INT_EN_REG,
609 CSI_CH_INT_EN_HB_OF_INT_EN |
610 CSI_CH_INT_EN_FIFO2_OF_INT_EN |
611 CSI_CH_INT_EN_FIFO1_OF_INT_EN |
612 CSI_CH_INT_EN_FIFO0_OF_INT_EN |
613 CSI_CH_INT_EN_FD_INT_EN |
614 CSI_CH_INT_EN_CD_INT_EN);
616 regmap_update_bits(regmap, CSI_CAP_REG, CSI_CAP_CH0_VCAP_ON,
617 CSI_CAP_CH0_VCAP_ON);
620 /* -----------------------------------------------------------------------------
621 * Media Controller and V4L2
623 static int sun6i_csi_link_entity(struct sun6i_csi *csi,
624 struct media_entity *entity,
625 struct fwnode_handle *fwnode)
627 struct media_entity *sink;
628 struct media_pad *sink_pad;
632 ret = media_entity_get_fwnode_pad(entity, fwnode, MEDIA_PAD_FL_SOURCE);
634 dev_err(csi->dev, "%s: no source pad in external entity %s\n",
635 __func__, entity->name);
641 sink = &csi->video.vdev.entity;
642 sink_pad = &csi->video.pad;
644 dev_dbg(csi->dev, "creating %s:%u -> %s:%u link\n",
645 entity->name, src_pad_index, sink->name, sink_pad->index);
646 ret = media_create_pad_link(entity, src_pad_index, sink,
648 MEDIA_LNK_FL_ENABLED |
649 MEDIA_LNK_FL_IMMUTABLE);
651 dev_err(csi->dev, "failed to create %s:%u -> %s:%u link\n",
652 entity->name, src_pad_index,
653 sink->name, sink_pad->index);
660 static int sun6i_subdev_notify_complete(struct v4l2_async_notifier *notifier)
662 struct sun6i_csi *csi = container_of(notifier, struct sun6i_csi,
664 struct v4l2_device *v4l2_dev = &csi->v4l2_dev;
665 struct v4l2_subdev *sd;
668 dev_dbg(csi->dev, "notify complete, all subdevs registered\n");
670 sd = list_first_entry(&v4l2_dev->subdevs, struct v4l2_subdev, list);
674 ret = sun6i_csi_link_entity(csi, &sd->entity, sd->fwnode);
678 ret = v4l2_device_register_subdev_nodes(&csi->v4l2_dev);
682 return media_device_register(&csi->media_dev);
685 static const struct v4l2_async_notifier_operations sun6i_csi_async_ops = {
686 .complete = sun6i_subdev_notify_complete,
689 static int sun6i_csi_fwnode_parse(struct device *dev,
690 struct v4l2_fwnode_endpoint *vep,
691 struct v4l2_async_subdev *asd)
693 struct sun6i_csi *csi = dev_get_drvdata(dev);
695 if (vep->base.port || vep->base.id) {
696 dev_warn(dev, "Only support a single port with one endpoint\n");
700 switch (vep->bus_type) {
701 case V4L2_MBUS_PARALLEL:
702 case V4L2_MBUS_BT656:
706 dev_err(dev, "Unsupported media bus type\n");
711 static void sun6i_csi_v4l2_cleanup(struct sun6i_csi *csi)
713 media_device_unregister(&csi->media_dev);
714 v4l2_async_notifier_unregister(&csi->notifier);
715 v4l2_async_notifier_cleanup(&csi->notifier);
716 sun6i_video_cleanup(&csi->video);
717 v4l2_device_unregister(&csi->v4l2_dev);
718 v4l2_ctrl_handler_free(&csi->ctrl_handler);
719 media_device_cleanup(&csi->media_dev);
722 static int sun6i_csi_v4l2_init(struct sun6i_csi *csi)
726 csi->media_dev.dev = csi->dev;
727 strscpy(csi->media_dev.model, "Allwinner Video Capture Device",
728 sizeof(csi->media_dev.model));
729 csi->media_dev.hw_revision = 0;
731 media_device_init(&csi->media_dev);
732 v4l2_async_notifier_init(&csi->notifier);
734 ret = v4l2_ctrl_handler_init(&csi->ctrl_handler, 0);
736 dev_err(csi->dev, "V4L2 controls handler init failed (%d)\n",
741 csi->v4l2_dev.mdev = &csi->media_dev;
742 csi->v4l2_dev.ctrl_handler = &csi->ctrl_handler;
743 ret = v4l2_device_register(csi->dev, &csi->v4l2_dev);
745 dev_err(csi->dev, "V4L2 device registration failed (%d)\n",
750 ret = sun6i_video_init(&csi->video, csi, "sun6i-csi");
754 ret = v4l2_async_notifier_parse_fwnode_endpoints(csi->dev,
756 sizeof(struct v4l2_async_subdev),
757 sun6i_csi_fwnode_parse);
761 csi->notifier.ops = &sun6i_csi_async_ops;
763 ret = v4l2_async_notifier_register(&csi->v4l2_dev, &csi->notifier);
765 dev_err(csi->dev, "notifier registration failed\n");
772 sun6i_video_cleanup(&csi->video);
774 v4l2_device_unregister(&csi->v4l2_dev);
776 v4l2_ctrl_handler_free(&csi->ctrl_handler);
778 v4l2_async_notifier_cleanup(&csi->notifier);
779 media_device_cleanup(&csi->media_dev);
784 /* -----------------------------------------------------------------------------
787 static irqreturn_t sun6i_csi_isr(int irq, void *dev_id)
789 struct sun6i_csi_dev *sdev = (struct sun6i_csi_dev *)dev_id;
790 struct regmap *regmap = sdev->regmap;
793 regmap_read(regmap, CSI_CH_INT_STA_REG, &status);
795 if (!(status & 0xFF))
798 if ((status & CSI_CH_INT_STA_FIFO0_OF_PD) ||
799 (status & CSI_CH_INT_STA_FIFO1_OF_PD) ||
800 (status & CSI_CH_INT_STA_FIFO2_OF_PD) ||
801 (status & CSI_CH_INT_STA_HB_OF_PD)) {
802 regmap_write(regmap, CSI_CH_INT_STA_REG, status);
803 regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
804 regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN,
809 if (status & CSI_CH_INT_STA_FD_PD)
810 sun6i_video_frame_done(&sdev->csi.video);
812 regmap_write(regmap, CSI_CH_INT_STA_REG, status);
817 static const struct regmap_config sun6i_csi_regmap_config = {
821 .max_register = 0x9c,
824 static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
825 struct platform_device *pdev)
827 struct resource *res;
828 void __iomem *io_base;
832 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
833 io_base = devm_ioremap_resource(&pdev->dev, res);
835 return PTR_ERR(io_base);
837 sdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "bus", io_base,
838 &sun6i_csi_regmap_config);
839 if (IS_ERR(sdev->regmap)) {
840 dev_err(&pdev->dev, "Failed to init register map\n");
841 return PTR_ERR(sdev->regmap);
844 sdev->clk_mod = devm_clk_get(&pdev->dev, "mod");
845 if (IS_ERR(sdev->clk_mod)) {
846 dev_err(&pdev->dev, "Unable to acquire csi clock\n");
847 return PTR_ERR(sdev->clk_mod);
850 sdev->clk_ram = devm_clk_get(&pdev->dev, "ram");
851 if (IS_ERR(sdev->clk_ram)) {
852 dev_err(&pdev->dev, "Unable to acquire dram-csi clock\n");
853 return PTR_ERR(sdev->clk_ram);
856 sdev->rstc_bus = devm_reset_control_get_shared(&pdev->dev, NULL);
857 if (IS_ERR(sdev->rstc_bus)) {
858 dev_err(&pdev->dev, "Cannot get reset controller\n");
859 return PTR_ERR(sdev->rstc_bus);
862 irq = platform_get_irq(pdev, 0);
864 dev_err(&pdev->dev, "No csi IRQ specified\n");
869 ret = devm_request_irq(&pdev->dev, irq, sun6i_csi_isr, 0, MODULE_NAME,
872 dev_err(&pdev->dev, "Cannot request csi IRQ\n");
880 * PHYS_OFFSET isn't available on all architectures. In order to
881 * accommodate for COMPILE_TEST, let's define it to something dumb.
883 #if defined(CONFIG_COMPILE_TEST) && !defined(PHYS_OFFSET)
884 #define PHYS_OFFSET 0
887 static int sun6i_csi_probe(struct platform_device *pdev)
889 struct sun6i_csi_dev *sdev;
892 sdev = devm_kzalloc(&pdev->dev, sizeof(*sdev), GFP_KERNEL);
896 sdev->dev = &pdev->dev;
897 /* The DMA bus has the memory mapped at 0 */
898 sdev->dev->dma_pfn_offset = PHYS_OFFSET >> PAGE_SHIFT;
900 ret = sun6i_csi_resource_request(sdev, pdev);
904 platform_set_drvdata(pdev, sdev);
906 sdev->csi.dev = &pdev->dev;
907 return sun6i_csi_v4l2_init(&sdev->csi);
910 static int sun6i_csi_remove(struct platform_device *pdev)
912 struct sun6i_csi_dev *sdev = platform_get_drvdata(pdev);
914 sun6i_csi_v4l2_cleanup(&sdev->csi);
919 static const struct of_device_id sun6i_csi_of_match[] = {
920 { .compatible = "allwinner,sun6i-a31-csi", },
921 { .compatible = "allwinner,sun8i-h3-csi", },
922 { .compatible = "allwinner,sun8i-v3s-csi", },
923 { .compatible = "allwinner,sun50i-a64-csi", },
926 MODULE_DEVICE_TABLE(of, sun6i_csi_of_match);
928 static struct platform_driver sun6i_csi_platform_driver = {
929 .probe = sun6i_csi_probe,
930 .remove = sun6i_csi_remove,
933 .of_match_table = of_match_ptr(sun6i_csi_of_match),
936 module_platform_driver(sun6i_csi_platform_driver);
938 MODULE_DESCRIPTION("Allwinner V3s Camera Sensor Interface driver");
939 MODULE_AUTHOR("Yong Deng <yong.deng@magewell.com>");
940 MODULE_LICENSE("GPL");