1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2015 Ideas on Board
6 * Copyright (C) 2013-2015 Xilinx, Inc.
8 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
9 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12 #ifndef __XILINX_VIP_H__
13 #define __XILINX_VIP_H__
16 #include <media/v4l2-subdev.h>
21 * Minimum and maximum width and height common to most video IP cores. IP
22 * cores with different requirements must define their own values.
24 #define XVIP_MIN_WIDTH 32
25 #define XVIP_MAX_WIDTH 7680
26 #define XVIP_MIN_HEIGHT 32
27 #define XVIP_MAX_HEIGHT 7680
30 * Pad IDs. IP cores with with multiple inputs or outputs should define
33 #define XVIP_PAD_SINK 0
34 #define XVIP_PAD_SOURCE 1
36 /* Xilinx Video IP Control Registers */
37 #define XVIP_CTRL_CONTROL 0x0000
38 #define XVIP_CTRL_CONTROL_SW_ENABLE (1 << 0)
39 #define XVIP_CTRL_CONTROL_REG_UPDATE (1 << 1)
40 #define XVIP_CTRL_CONTROL_BYPASS (1 << 4)
41 #define XVIP_CTRL_CONTROL_TEST_PATTERN (1 << 5)
42 #define XVIP_CTRL_CONTROL_FRAME_SYNC_RESET (1 << 30)
43 #define XVIP_CTRL_CONTROL_SW_RESET (1 << 31)
44 #define XVIP_CTRL_STATUS 0x0004
45 #define XVIP_CTRL_STATUS_PROC_STARTED (1 << 0)
46 #define XVIP_CTRL_STATUS_EOF (1 << 1)
47 #define XVIP_CTRL_ERROR 0x0008
48 #define XVIP_CTRL_ERROR_SLAVE_EOL_EARLY (1 << 0)
49 #define XVIP_CTRL_ERROR_SLAVE_EOL_LATE (1 << 1)
50 #define XVIP_CTRL_ERROR_SLAVE_SOF_EARLY (1 << 2)
51 #define XVIP_CTRL_ERROR_SLAVE_SOF_LATE (1 << 3)
52 #define XVIP_CTRL_IRQ_ENABLE 0x000c
53 #define XVIP_CTRL_IRQ_ENABLE_PROC_STARTED (1 << 0)
54 #define XVIP_CTRL_IRQ_EOF (1 << 1)
55 #define XVIP_CTRL_VERSION 0x0010
56 #define XVIP_CTRL_VERSION_MAJOR_MASK (0xff << 24)
57 #define XVIP_CTRL_VERSION_MAJOR_SHIFT 24
58 #define XVIP_CTRL_VERSION_MINOR_MASK (0xff << 16)
59 #define XVIP_CTRL_VERSION_MINOR_SHIFT 16
60 #define XVIP_CTRL_VERSION_REVISION_MASK (0xf << 12)
61 #define XVIP_CTRL_VERSION_REVISION_SHIFT 12
62 #define XVIP_CTRL_VERSION_PATCH_MASK (0xf << 8)
63 #define XVIP_CTRL_VERSION_PATCH_SHIFT 8
64 #define XVIP_CTRL_VERSION_INTERNAL_MASK (0xff << 0)
65 #define XVIP_CTRL_VERSION_INTERNAL_SHIFT 0
67 /* Xilinx Video IP Timing Registers */
68 #define XVIP_ACTIVE_SIZE 0x0020
69 #define XVIP_ACTIVE_VSIZE_MASK (0x7ff << 16)
70 #define XVIP_ACTIVE_VSIZE_SHIFT 16
71 #define XVIP_ACTIVE_HSIZE_MASK (0x7ff << 0)
72 #define XVIP_ACTIVE_HSIZE_SHIFT 0
73 #define XVIP_ENCODING 0x0028
74 #define XVIP_ENCODING_NBITS_8 (0 << 4)
75 #define XVIP_ENCODING_NBITS_10 (1 << 4)
76 #define XVIP_ENCODING_NBITS_12 (2 << 4)
77 #define XVIP_ENCODING_NBITS_16 (3 << 4)
78 #define XVIP_ENCODING_NBITS_MASK (3 << 4)
79 #define XVIP_ENCODING_NBITS_SHIFT 4
80 #define XVIP_ENCODING_VIDEO_FORMAT_YUV422 (0 << 0)
81 #define XVIP_ENCODING_VIDEO_FORMAT_YUV444 (1 << 0)
82 #define XVIP_ENCODING_VIDEO_FORMAT_RGB (2 << 0)
83 #define XVIP_ENCODING_VIDEO_FORMAT_YUV420 (3 << 0)
84 #define XVIP_ENCODING_VIDEO_FORMAT_MASK (3 << 0)
85 #define XVIP_ENCODING_VIDEO_FORMAT_SHIFT 0
88 * struct xvip_device - Xilinx Video IP device structure
89 * @subdev: V4L2 subdevice
91 * @iomem: device I/O register space remapped to kernel virtual memory
92 * @clk: video core clock
93 * @saved_ctrl: saved control register for resume / suspend
96 struct v4l2_subdev subdev;
104 * struct xvip_video_format - Xilinx Video IP video format description
105 * @vf_code: AXI4 video format code
106 * @width: AXI4 format width in bits per component
107 * @pattern: CFA pattern for Mono/Sensor formats
108 * @code: media bus format code
109 * @bpp: bytes per pixel (when stored in memory)
110 * @fourcc: V4L2 pixel format FCC identifier
111 * @description: format description, suitable for userspace
113 struct xvip_video_format {
114 unsigned int vf_code;
120 const char *description;
123 const struct xvip_video_format *xvip_get_format_by_code(unsigned int code);
124 const struct xvip_video_format *xvip_get_format_by_fourcc(u32 fourcc);
125 const struct xvip_video_format *xvip_of_get_format(struct device_node *node);
126 void xvip_set_format_size(struct v4l2_mbus_framefmt *format,
127 const struct v4l2_subdev_format *fmt);
128 int xvip_enum_mbus_code(struct v4l2_subdev *subdev,
129 struct v4l2_subdev_pad_config *cfg,
130 struct v4l2_subdev_mbus_code_enum *code);
131 int xvip_enum_frame_size(struct v4l2_subdev *subdev,
132 struct v4l2_subdev_pad_config *cfg,
133 struct v4l2_subdev_frame_size_enum *fse);
135 static inline u32 xvip_read(struct xvip_device *xvip, u32 addr)
137 return ioread32(xvip->iomem + addr);
140 static inline void xvip_write(struct xvip_device *xvip, u32 addr, u32 value)
142 iowrite32(value, xvip->iomem + addr);
145 static inline void xvip_clr(struct xvip_device *xvip, u32 addr, u32 clr)
147 xvip_write(xvip, addr, xvip_read(xvip, addr) & ~clr);
150 static inline void xvip_set(struct xvip_device *xvip, u32 addr, u32 set)
152 xvip_write(xvip, addr, xvip_read(xvip, addr) | set);
155 void xvip_clr_or_set(struct xvip_device *xvip, u32 addr, u32 mask, bool set);
156 void xvip_clr_and_set(struct xvip_device *xvip, u32 addr, u32 clr, u32 set);
158 int xvip_init_resources(struct xvip_device *xvip);
159 void xvip_cleanup_resources(struct xvip_device *xvip);
161 static inline void xvip_reset(struct xvip_device *xvip)
163 xvip_write(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_RESET);
166 static inline void xvip_start(struct xvip_device *xvip)
168 xvip_set(xvip, XVIP_CTRL_CONTROL,
169 XVIP_CTRL_CONTROL_SW_ENABLE | XVIP_CTRL_CONTROL_REG_UPDATE);
172 static inline void xvip_stop(struct xvip_device *xvip)
174 xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_SW_ENABLE);
177 static inline void xvip_resume(struct xvip_device *xvip)
179 xvip_write(xvip, XVIP_CTRL_CONTROL,
180 xvip->saved_ctrl | XVIP_CTRL_CONTROL_SW_ENABLE);
183 static inline void xvip_suspend(struct xvip_device *xvip)
185 xvip->saved_ctrl = xvip_read(xvip, XVIP_CTRL_CONTROL);
186 xvip_write(xvip, XVIP_CTRL_CONTROL,
187 xvip->saved_ctrl & ~XVIP_CTRL_CONTROL_SW_ENABLE);
190 static inline void xvip_set_frame_size(struct xvip_device *xvip,
191 const struct v4l2_mbus_framefmt *format)
193 xvip_write(xvip, XVIP_ACTIVE_SIZE,
194 (format->height << XVIP_ACTIVE_VSIZE_SHIFT) |
195 (format->width << XVIP_ACTIVE_HSIZE_SHIFT));
198 static inline void xvip_get_frame_size(struct xvip_device *xvip,
199 struct v4l2_mbus_framefmt *format)
203 reg = xvip_read(xvip, XVIP_ACTIVE_SIZE);
204 format->width = (reg & XVIP_ACTIVE_HSIZE_MASK) >>
205 XVIP_ACTIVE_HSIZE_SHIFT;
206 format->height = (reg & XVIP_ACTIVE_VSIZE_MASK) >>
207 XVIP_ACTIVE_VSIZE_SHIFT;
210 static inline void xvip_enable_reg_update(struct xvip_device *xvip)
212 xvip_set(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE);
215 static inline void xvip_disable_reg_update(struct xvip_device *xvip)
217 xvip_clr(xvip, XVIP_CTRL_CONTROL, XVIP_CTRL_CONTROL_REG_UPDATE);
220 static inline void xvip_print_version(struct xvip_device *xvip)
224 version = xvip_read(xvip, XVIP_CTRL_VERSION);
226 dev_info(xvip->dev, "device found, version %u.%02x%x\n",
227 ((version & XVIP_CTRL_VERSION_MAJOR_MASK) >>
228 XVIP_CTRL_VERSION_MAJOR_SHIFT),
229 ((version & XVIP_CTRL_VERSION_MINOR_MASK) >>
230 XVIP_CTRL_VERSION_MINOR_SHIFT),
231 ((version & XVIP_CTRL_VERSION_REVISION_MASK) >>
232 XVIP_CTRL_VERSION_REVISION_SHIFT));
235 #endif /* __XILINX_VIP_H__ */