1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Flora Fu, MediaTek
7 #include <linux/interrupt.h>
8 #include <linux/ioport.h>
9 #include <linux/module.h>
10 #include <linux/of_device.h>
11 #include <linux/of_irq.h>
12 #include <linux/regmap.h>
13 #include <linux/mfd/core.h>
14 #include <linux/mfd/mt6323/core.h>
15 #include <linux/mfd/mt6397/core.h>
16 #include <linux/mfd/mt6323/registers.h>
17 #include <linux/mfd/mt6397/registers.h>
19 #define MT6323_RTC_BASE 0x8000
20 #define MT6323_RTC_SIZE 0x40
22 #define MT6397_RTC_BASE 0xe000
23 #define MT6397_RTC_SIZE 0x3e
25 #define MT6323_PWRC_BASE 0x8000
26 #define MT6323_PWRC_SIZE 0x40
28 static const struct resource mt6323_rtc_resources[] = {
29 DEFINE_RES_MEM(MT6323_RTC_BASE, MT6323_RTC_SIZE),
30 DEFINE_RES_IRQ(MT6323_IRQ_STATUS_RTC),
33 static const struct resource mt6397_rtc_resources[] = {
34 DEFINE_RES_MEM(MT6397_RTC_BASE, MT6397_RTC_SIZE),
35 DEFINE_RES_IRQ(MT6397_IRQ_RTC),
38 static const struct resource mt6323_keys_resources[] = {
39 DEFINE_RES_IRQ(MT6323_IRQ_STATUS_PWRKEY),
40 DEFINE_RES_IRQ(MT6323_IRQ_STATUS_FCHRKEY),
43 static const struct resource mt6397_keys_resources[] = {
44 DEFINE_RES_IRQ(MT6397_IRQ_PWRKEY),
45 DEFINE_RES_IRQ(MT6397_IRQ_HOMEKEY),
48 static const struct resource mt6323_pwrc_resources[] = {
49 DEFINE_RES_MEM(MT6323_PWRC_BASE, MT6323_PWRC_SIZE),
52 static const struct mfd_cell mt6323_devs[] = {
55 .num_resources = ARRAY_SIZE(mt6323_rtc_resources),
56 .resources = mt6323_rtc_resources,
57 .of_compatible = "mediatek,mt6323-rtc",
59 .name = "mt6323-regulator",
60 .of_compatible = "mediatek,mt6323-regulator"
63 .of_compatible = "mediatek,mt6323-led"
65 .name = "mtk-pmic-keys",
66 .num_resources = ARRAY_SIZE(mt6323_keys_resources),
67 .resources = mt6323_keys_resources,
68 .of_compatible = "mediatek,mt6323-keys"
70 .name = "mt6323-pwrc",
71 .num_resources = ARRAY_SIZE(mt6323_pwrc_resources),
72 .resources = mt6323_pwrc_resources,
73 .of_compatible = "mediatek,mt6323-pwrc"
77 static const struct mfd_cell mt6397_devs[] = {
80 .num_resources = ARRAY_SIZE(mt6397_rtc_resources),
81 .resources = mt6397_rtc_resources,
82 .of_compatible = "mediatek,mt6397-rtc",
84 .name = "mt6397-regulator",
85 .of_compatible = "mediatek,mt6397-regulator",
87 .name = "mt6397-codec",
88 .of_compatible = "mediatek,mt6397-codec",
91 .of_compatible = "mediatek,mt6397-clk",
93 .name = "mt6397-pinctrl",
94 .of_compatible = "mediatek,mt6397-pinctrl",
96 .name = "mtk-pmic-keys",
97 .num_resources = ARRAY_SIZE(mt6397_keys_resources),
98 .resources = mt6397_keys_resources,
99 .of_compatible = "mediatek,mt6397-keys"
103 #ifdef CONFIG_PM_SLEEP
104 static int mt6397_irq_suspend(struct device *dev)
106 struct mt6397_chip *chip = dev_get_drvdata(dev);
108 regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
109 regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
111 enable_irq_wake(chip->irq);
116 static int mt6397_irq_resume(struct device *dev)
118 struct mt6397_chip *chip = dev_get_drvdata(dev);
120 regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
121 regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
123 disable_irq_wake(chip->irq);
129 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
132 static int mt6397_probe(struct platform_device *pdev)
136 struct mt6397_chip *pmic;
138 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
142 pmic->dev = &pdev->dev;
145 * mt6397 MFD is child device of soc pmic wrapper.
146 * Regmap is set from its parent.
148 pmic->regmap = dev_get_regmap(pdev->dev.parent, NULL);
152 platform_set_drvdata(pdev, pmic);
154 ret = regmap_read(pmic->regmap, MT6397_CID, &id);
156 dev_err(pmic->dev, "Failed to read chip id: %d\n", ret);
160 pmic->irq = platform_get_irq(pdev, 0);
166 pmic->int_con[0] = MT6323_INT_CON0;
167 pmic->int_con[1] = MT6323_INT_CON1;
168 pmic->int_status[0] = MT6323_INT_STATUS0;
169 pmic->int_status[1] = MT6323_INT_STATUS1;
170 ret = mt6397_irq_init(pmic);
174 ret = devm_mfd_add_devices(&pdev->dev, -1, mt6323_devs,
175 ARRAY_SIZE(mt6323_devs), NULL,
176 0, pmic->irq_domain);
181 pmic->int_con[0] = MT6397_INT_CON0;
182 pmic->int_con[1] = MT6397_INT_CON1;
183 pmic->int_status[0] = MT6397_INT_STATUS0;
184 pmic->int_status[1] = MT6397_INT_STATUS1;
185 ret = mt6397_irq_init(pmic);
189 ret = devm_mfd_add_devices(&pdev->dev, -1, mt6397_devs,
190 ARRAY_SIZE(mt6397_devs), NULL,
191 0, pmic->irq_domain);
195 dev_err(&pdev->dev, "unsupported chip: %d\n", id);
200 irq_domain_remove(pmic->irq_domain);
201 dev_err(&pdev->dev, "failed to add child devices: %d\n", ret);
207 static const struct of_device_id mt6397_of_match[] = {
208 { .compatible = "mediatek,mt6397" },
209 { .compatible = "mediatek,mt6323" },
212 MODULE_DEVICE_TABLE(of, mt6397_of_match);
214 static const struct platform_device_id mt6397_id[] = {
218 MODULE_DEVICE_TABLE(platform, mt6397_id);
220 static struct platform_driver mt6397_driver = {
221 .probe = mt6397_probe,
224 .of_match_table = of_match_ptr(mt6397_of_match),
225 .pm = &mt6397_pm_ops,
227 .id_table = mt6397_id,
230 module_platform_driver(mt6397_driver);
232 MODULE_AUTHOR("Flora Fu, MediaTek");
233 MODULE_DESCRIPTION("Driver for MediaTek MT6397 PMIC");
234 MODULE_LICENSE("GPL");