2 * IBM Accelerator Family 'GenWQE'
4 * (C) Copyright IBM Corp. 2013
6 * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
7 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
8 * Author: Michael Jung <mijung@gmx.net>
9 * Author: Michael Ruettger <michael@ibmra.de>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License (version 2 only)
13 * as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * Character device representation of the GenWQE device. This allows
23 * user-space applications to communicate with the card.
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/string.h>
32 #include <linux/sched/signal.h>
33 #include <linux/wait.h>
34 #include <linux/delay.h>
35 #include <linux/atomic.h>
37 #include "card_base.h"
38 #include "card_ddcb.h"
40 static int genwqe_open_files(struct genwqe_dev *cd)
45 spin_lock_irqsave(&cd->file_lock, flags);
46 rc = list_empty(&cd->file_list);
47 spin_unlock_irqrestore(&cd->file_lock, flags);
51 static void genwqe_add_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
55 cfile->opener = get_pid(task_tgid(current));
56 spin_lock_irqsave(&cd->file_lock, flags);
57 list_add(&cfile->list, &cd->file_list);
58 spin_unlock_irqrestore(&cd->file_lock, flags);
61 static int genwqe_del_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
65 spin_lock_irqsave(&cd->file_lock, flags);
66 list_del(&cfile->list);
67 spin_unlock_irqrestore(&cd->file_lock, flags);
68 put_pid(cfile->opener);
73 static void genwqe_add_pin(struct genwqe_file *cfile, struct dma_mapping *m)
77 spin_lock_irqsave(&cfile->pin_lock, flags);
78 list_add(&m->pin_list, &cfile->pin_list);
79 spin_unlock_irqrestore(&cfile->pin_lock, flags);
82 static int genwqe_del_pin(struct genwqe_file *cfile, struct dma_mapping *m)
86 spin_lock_irqsave(&cfile->pin_lock, flags);
87 list_del(&m->pin_list);
88 spin_unlock_irqrestore(&cfile->pin_lock, flags);
94 * genwqe_search_pin() - Search for the mapping for a userspace address
95 * @cfile: Descriptor of opened file
96 * @u_addr: User virtual address
97 * @size: Size of buffer
98 * @dma_addr: DMA address to be updated
100 * Return: Pointer to the corresponding mapping NULL if not found
102 static struct dma_mapping *genwqe_search_pin(struct genwqe_file *cfile,
103 unsigned long u_addr,
108 struct dma_mapping *m;
110 spin_lock_irqsave(&cfile->pin_lock, flags);
112 list_for_each_entry(m, &cfile->pin_list, pin_list) {
113 if ((((u64)m->u_vaddr) <= (u_addr)) &&
114 (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
117 *virt_addr = m->k_vaddr +
118 (u_addr - (u64)m->u_vaddr);
120 spin_unlock_irqrestore(&cfile->pin_lock, flags);
124 spin_unlock_irqrestore(&cfile->pin_lock, flags);
128 static void __genwqe_add_mapping(struct genwqe_file *cfile,
129 struct dma_mapping *dma_map)
133 spin_lock_irqsave(&cfile->map_lock, flags);
134 list_add(&dma_map->card_list, &cfile->map_list);
135 spin_unlock_irqrestore(&cfile->map_lock, flags);
138 static void __genwqe_del_mapping(struct genwqe_file *cfile,
139 struct dma_mapping *dma_map)
143 spin_lock_irqsave(&cfile->map_lock, flags);
144 list_del(&dma_map->card_list);
145 spin_unlock_irqrestore(&cfile->map_lock, flags);
150 * __genwqe_search_mapping() - Search for the mapping for a userspace address
151 * @cfile: descriptor of opened file
152 * @u_addr: user virtual address
153 * @size: size of buffer
154 * @dma_addr: DMA address to be updated
155 * Return: Pointer to the corresponding mapping NULL if not found
157 static struct dma_mapping *__genwqe_search_mapping(struct genwqe_file *cfile,
158 unsigned long u_addr,
160 dma_addr_t *dma_addr,
164 struct dma_mapping *m;
165 struct pci_dev *pci_dev = cfile->cd->pci_dev;
167 spin_lock_irqsave(&cfile->map_lock, flags);
168 list_for_each_entry(m, &cfile->map_list, card_list) {
170 if ((((u64)m->u_vaddr) <= (u_addr)) &&
171 (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
173 /* match found: current is as expected and
176 *dma_addr = m->dma_addr +
177 (u_addr - (u64)m->u_vaddr);
180 *virt_addr = m->k_vaddr +
181 (u_addr - (u64)m->u_vaddr);
183 spin_unlock_irqrestore(&cfile->map_lock, flags);
187 spin_unlock_irqrestore(&cfile->map_lock, flags);
189 dev_err(&pci_dev->dev,
190 "[%s] Entry not found: u_addr=%lx, size=%x\n",
191 __func__, u_addr, size);
196 static void genwqe_remove_mappings(struct genwqe_file *cfile)
199 struct list_head *node, *next;
200 struct dma_mapping *dma_map;
201 struct genwqe_dev *cd = cfile->cd;
202 struct pci_dev *pci_dev = cfile->cd->pci_dev;
204 list_for_each_safe(node, next, &cfile->map_list) {
205 dma_map = list_entry(node, struct dma_mapping, card_list);
207 list_del_init(&dma_map->card_list);
210 * This is really a bug, because those things should
211 * have been already tidied up.
213 * GENWQE_MAPPING_RAW should have been removed via mmunmap().
214 * GENWQE_MAPPING_SGL_TEMP should be removed by tidy up code.
216 dev_err(&pci_dev->dev,
217 "[%s] %d. cleanup mapping: u_vaddr=%p u_kaddr=%016lx dma_addr=%lx\n",
218 __func__, i++, dma_map->u_vaddr,
219 (unsigned long)dma_map->k_vaddr,
220 (unsigned long)dma_map->dma_addr);
222 if (dma_map->type == GENWQE_MAPPING_RAW) {
223 /* we allocated this dynamically */
224 __genwqe_free_consistent(cd, dma_map->size,
228 } else if (dma_map->type == GENWQE_MAPPING_SGL_TEMP) {
229 /* we use dma_map statically from the request */
230 genwqe_user_vunmap(cd, dma_map);
235 static void genwqe_remove_pinnings(struct genwqe_file *cfile)
237 struct list_head *node, *next;
238 struct dma_mapping *dma_map;
239 struct genwqe_dev *cd = cfile->cd;
241 list_for_each_safe(node, next, &cfile->pin_list) {
242 dma_map = list_entry(node, struct dma_mapping, pin_list);
245 * This is not a bug, because a killed processed might
246 * not call the unpin ioctl, which is supposed to free
249 * Pinnings are dymically allocated and need to be
252 list_del_init(&dma_map->pin_list);
253 genwqe_user_vunmap(cd, dma_map);
259 * genwqe_kill_fasync() - Send signal to all processes with open GenWQE files
261 * E.g. genwqe_send_signal(cd, SIGIO);
263 static int genwqe_kill_fasync(struct genwqe_dev *cd, int sig)
265 unsigned int files = 0;
267 struct genwqe_file *cfile;
269 spin_lock_irqsave(&cd->file_lock, flags);
270 list_for_each_entry(cfile, &cd->file_list, list) {
271 if (cfile->async_queue)
272 kill_fasync(&cfile->async_queue, sig, POLL_HUP);
275 spin_unlock_irqrestore(&cd->file_lock, flags);
279 static int genwqe_terminate(struct genwqe_dev *cd)
281 unsigned int files = 0;
283 struct genwqe_file *cfile;
285 spin_lock_irqsave(&cd->file_lock, flags);
286 list_for_each_entry(cfile, &cd->file_list, list) {
287 kill_pid(cfile->opener, SIGKILL, 1);
290 spin_unlock_irqrestore(&cd->file_lock, flags);
295 * genwqe_open() - file open
296 * @inode: file system information
299 * This function is executed whenever an application calls
300 * open("/dev/genwqe",..).
302 * Return: 0 if successful or <0 if errors
304 static int genwqe_open(struct inode *inode, struct file *filp)
306 struct genwqe_dev *cd;
307 struct genwqe_file *cfile;
309 cfile = kzalloc(sizeof(*cfile), GFP_KERNEL);
313 cd = container_of(inode->i_cdev, struct genwqe_dev, cdev_genwqe);
316 cfile->client = NULL;
318 spin_lock_init(&cfile->map_lock); /* list of raw memory allocations */
319 INIT_LIST_HEAD(&cfile->map_list);
321 spin_lock_init(&cfile->pin_lock); /* list of user pinned memory */
322 INIT_LIST_HEAD(&cfile->pin_list);
324 filp->private_data = cfile;
326 genwqe_add_file(cd, cfile);
331 * genwqe_fasync() - Setup process to receive SIGIO.
332 * @fd: file descriptor
336 * Sending a signal is working as following:
338 * if (cdev->async_queue)
339 * kill_fasync(&cdev->async_queue, SIGIO, POLL_IN);
341 * Some devices also implement asynchronous notification to indicate
342 * when the device can be written; in this case, of course,
343 * kill_fasync must be called with a mode of POLL_OUT.
345 static int genwqe_fasync(int fd, struct file *filp, int mode)
347 struct genwqe_file *cdev = (struct genwqe_file *)filp->private_data;
349 return fasync_helper(fd, filp, mode, &cdev->async_queue);
354 * genwqe_release() - file close
355 * @inode: file system information
358 * This function is executed whenever an application calls 'close(fd_genwqe)'
362 static int genwqe_release(struct inode *inode, struct file *filp)
364 struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
365 struct genwqe_dev *cd = cfile->cd;
367 /* there must be no entries in these lists! */
368 genwqe_remove_mappings(cfile);
369 genwqe_remove_pinnings(cfile);
371 /* remove this filp from the asynchronously notified filp's */
372 genwqe_fasync(-1, filp, 0);
375 * For this to work we must not release cd when this cfile is
376 * not yet released, otherwise the list entry is invalid,
377 * because the list itself gets reinstantiated!
379 genwqe_del_file(cd, cfile);
384 static void genwqe_vma_open(struct vm_area_struct *vma)
390 * genwqe_vma_close() - Called each time when vma is unmapped
392 * Free memory which got allocated by GenWQE mmap().
394 static void genwqe_vma_close(struct vm_area_struct *vma)
396 unsigned long vsize = vma->vm_end - vma->vm_start;
397 struct inode *inode = file_inode(vma->vm_file);
398 struct dma_mapping *dma_map;
399 struct genwqe_dev *cd = container_of(inode->i_cdev, struct genwqe_dev,
401 struct pci_dev *pci_dev = cd->pci_dev;
402 dma_addr_t d_addr = 0;
403 struct genwqe_file *cfile = vma->vm_private_data;
405 dma_map = __genwqe_search_mapping(cfile, vma->vm_start, vsize,
407 if (dma_map == NULL) {
408 dev_err(&pci_dev->dev,
409 " [%s] err: mapping not found: v=%lx, p=%lx s=%lx\n",
410 __func__, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT,
414 __genwqe_del_mapping(cfile, dma_map);
415 __genwqe_free_consistent(cd, dma_map->size, dma_map->k_vaddr,
420 static const struct vm_operations_struct genwqe_vma_ops = {
421 .open = genwqe_vma_open,
422 .close = genwqe_vma_close,
426 * genwqe_mmap() - Provide contignous buffers to userspace
428 * We use mmap() to allocate contignous buffers used for DMA
429 * transfers. After the buffer is allocated we remap it to user-space
430 * and remember a reference to our dma_mapping data structure, where
431 * we store the associated DMA address and allocated size.
433 * When we receive a DDCB execution request with the ATS bits set to
434 * plain buffer, we lookup our dma_mapping list to find the
435 * corresponding DMA address for the associated user-space address.
437 static int genwqe_mmap(struct file *filp, struct vm_area_struct *vma)
440 unsigned long pfn, vsize = vma->vm_end - vma->vm_start;
441 struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
442 struct genwqe_dev *cd = cfile->cd;
443 struct dma_mapping *dma_map;
448 if (get_order(vsize) > MAX_ORDER)
451 dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
455 genwqe_mapping_init(dma_map, GENWQE_MAPPING_RAW);
456 dma_map->u_vaddr = (void *)vma->vm_start;
457 dma_map->size = vsize;
458 dma_map->nr_pages = DIV_ROUND_UP(vsize, PAGE_SIZE);
459 dma_map->k_vaddr = __genwqe_alloc_consistent(cd, vsize,
461 if (dma_map->k_vaddr == NULL) {
466 if (capable(CAP_SYS_ADMIN) && (vsize > sizeof(dma_addr_t)))
467 *(dma_addr_t *)dma_map->k_vaddr = dma_map->dma_addr;
469 pfn = virt_to_phys(dma_map->k_vaddr) >> PAGE_SHIFT;
470 rc = remap_pfn_range(vma,
480 vma->vm_private_data = cfile;
481 vma->vm_ops = &genwqe_vma_ops;
482 __genwqe_add_mapping(cfile, dma_map);
487 __genwqe_free_consistent(cd, dma_map->size,
496 * do_flash_update() - Excute flash update (write image or CVPD)
498 * @load: details about image load
500 * Return: 0 if successful
503 #define FLASH_BLOCK 0x40000 /* we use 256k blocks */
505 static int do_flash_update(struct genwqe_file *cfile,
506 struct genwqe_bitstream *load)
517 struct genwqe_dev *cd = cfile->cd;
518 struct file *filp = cfile->filp;
519 struct pci_dev *pci_dev = cd->pci_dev;
521 if ((load->size & 0x3) != 0)
524 if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
527 /* FIXME Bits have changed for new service layer! */
528 switch ((char)load->partition) {
531 break; /* download/erase_first/part_0 */
534 break; /* download/erase_first/part_1 */
537 break; /* download/erase_first/vpd */
542 buf = (u8 __user *)load->data_addr;
543 xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
547 blocks_to_flash = load->size / FLASH_BLOCK;
549 struct genwqe_ddcb_cmd *req;
552 * We must be 4 byte aligned. Buffer must be 0 appened
553 * to have defined values when calculating CRC.
555 tocopy = min_t(size_t, load->size, FLASH_BLOCK);
557 rc = copy_from_user(xbuf, buf, tocopy);
562 crc = genwqe_crc32(xbuf, tocopy, 0xffffffff);
564 dev_dbg(&pci_dev->dev,
565 "[%s] DMA: %lx CRC: %08x SZ: %ld %d\n",
566 __func__, (unsigned long)dma_addr, crc, tocopy,
569 /* prepare DDCB for SLU process */
570 req = ddcb_requ_alloc();
576 req->cmd = SLCMD_MOVE_FLASH;
577 req->cmdopts = cmdopts;
579 /* prepare invariant values */
580 if (genwqe_get_slu_id(cd) <= 0x2) {
581 *(__be64 *)&req->__asiv[0] = cpu_to_be64(dma_addr);
582 *(__be64 *)&req->__asiv[8] = cpu_to_be64(tocopy);
583 *(__be64 *)&req->__asiv[16] = cpu_to_be64(flash);
584 *(__be32 *)&req->__asiv[24] = cpu_to_be32(0);
585 req->__asiv[24] = load->uid;
586 *(__be32 *)&req->__asiv[28] = cpu_to_be32(crc);
588 /* for simulation only */
589 *(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id);
590 *(__be64 *)&req->__asiv[96] = cpu_to_be64(load->app_id);
591 req->asiv_length = 32; /* bytes included in crc calc */
592 } else { /* setup DDCB for ATS architecture */
593 *(__be64 *)&req->asiv[0] = cpu_to_be64(dma_addr);
594 *(__be32 *)&req->asiv[8] = cpu_to_be32(tocopy);
595 *(__be32 *)&req->asiv[12] = cpu_to_be32(0); /* resvd */
596 *(__be64 *)&req->asiv[16] = cpu_to_be64(flash);
597 *(__be32 *)&req->asiv[24] = cpu_to_be32(load->uid<<24);
598 *(__be32 *)&req->asiv[28] = cpu_to_be32(crc);
600 /* for simulation only */
601 *(__be64 *)&req->asiv[80] = cpu_to_be64(load->slu_id);
602 *(__be64 *)&req->asiv[88] = cpu_to_be64(load->app_id);
605 req->ats = 0x4ULL << 44;
606 req->asiv_length = 40; /* bytes included in crc calc */
610 /* For Genwqe5 we get back the calculated CRC */
611 *(u64 *)&req->asv[0] = 0ULL; /* 0x80 */
613 rc = __genwqe_execute_raw_ddcb(cd, req, filp->f_flags);
615 load->retc = req->retc;
616 load->attn = req->attn;
617 load->progress = req->progress;
624 if (req->retc != DDCB_RETC_COMPLETE) {
630 load->size -= tocopy;
638 __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
642 static int do_flash_read(struct genwqe_file *cfile,
643 struct genwqe_bitstream *load)
645 int rc, blocks_to_flash;
652 struct genwqe_dev *cd = cfile->cd;
653 struct file *filp = cfile->filp;
654 struct pci_dev *pci_dev = cd->pci_dev;
655 struct genwqe_ddcb_cmd *cmd;
657 if ((load->size & 0x3) != 0)
660 if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
663 /* FIXME Bits have changed for new service layer! */
664 switch ((char)load->partition) {
667 break; /* upload/part_0 */
670 break; /* upload/part_1 */
673 break; /* upload/vpd */
678 buf = (u8 __user *)load->data_addr;
679 xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
683 blocks_to_flash = load->size / FLASH_BLOCK;
686 * We must be 4 byte aligned. Buffer must be 0 appened
687 * to have defined values when calculating CRC.
689 tocopy = min_t(size_t, load->size, FLASH_BLOCK);
691 dev_dbg(&pci_dev->dev,
692 "[%s] DMA: %lx SZ: %ld %d\n",
693 __func__, (unsigned long)dma_addr, tocopy,
696 /* prepare DDCB for SLU process */
697 cmd = ddcb_requ_alloc();
702 cmd->cmd = SLCMD_MOVE_FLASH;
703 cmd->cmdopts = cmdopts;
705 /* prepare invariant values */
706 if (genwqe_get_slu_id(cd) <= 0x2) {
707 *(__be64 *)&cmd->__asiv[0] = cpu_to_be64(dma_addr);
708 *(__be64 *)&cmd->__asiv[8] = cpu_to_be64(tocopy);
709 *(__be64 *)&cmd->__asiv[16] = cpu_to_be64(flash);
710 *(__be32 *)&cmd->__asiv[24] = cpu_to_be32(0);
711 cmd->__asiv[24] = load->uid;
712 *(__be32 *)&cmd->__asiv[28] = cpu_to_be32(0) /* CRC */;
713 cmd->asiv_length = 32; /* bytes included in crc calc */
714 } else { /* setup DDCB for ATS architecture */
715 *(__be64 *)&cmd->asiv[0] = cpu_to_be64(dma_addr);
716 *(__be32 *)&cmd->asiv[8] = cpu_to_be32(tocopy);
717 *(__be32 *)&cmd->asiv[12] = cpu_to_be32(0); /* resvd */
718 *(__be64 *)&cmd->asiv[16] = cpu_to_be64(flash);
719 *(__be32 *)&cmd->asiv[24] = cpu_to_be32(load->uid<<24);
720 *(__be32 *)&cmd->asiv[28] = cpu_to_be32(0); /* CRC */
723 cmd->ats = 0x5ULL << 44;
724 cmd->asiv_length = 40; /* bytes included in crc calc */
728 /* we only get back the calculated CRC */
729 *(u64 *)&cmd->asv[0] = 0ULL; /* 0x80 */
731 rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
733 load->retc = cmd->retc;
734 load->attn = cmd->attn;
735 load->progress = cmd->progress;
737 if ((rc < 0) && (rc != -EBADMSG)) {
742 rc = copy_to_user(buf, xbuf, tocopy);
749 /* We know that we can get retc 0x104 with CRC err */
750 if (((cmd->retc == DDCB_RETC_FAULT) &&
751 (cmd->attn != 0x02)) || /* Normally ignore CRC error */
752 ((cmd->retc == DDCB_RETC_COMPLETE) &&
753 (cmd->attn != 0x00))) { /* Everything was fine */
759 load->size -= tocopy;
768 __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
772 static int genwqe_pin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
775 struct genwqe_dev *cd = cfile->cd;
776 struct pci_dev *pci_dev = cfile->cd->pci_dev;
777 struct dma_mapping *dma_map;
778 unsigned long map_addr;
779 unsigned long map_size;
781 if ((m->addr == 0x0) || (m->size == 0))
784 map_addr = (m->addr & PAGE_MASK);
785 map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
787 dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
791 genwqe_mapping_init(dma_map, GENWQE_MAPPING_SGL_PINNED);
792 rc = genwqe_user_vmap(cd, dma_map, (void *)map_addr, map_size);
794 dev_err(&pci_dev->dev,
795 "[%s] genwqe_user_vmap rc=%d\n", __func__, rc);
800 genwqe_add_pin(cfile, dma_map);
804 static int genwqe_unpin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
806 struct genwqe_dev *cd = cfile->cd;
807 struct dma_mapping *dma_map;
808 unsigned long map_addr;
809 unsigned long map_size;
814 map_addr = (m->addr & PAGE_MASK);
815 map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
817 dma_map = genwqe_search_pin(cfile, map_addr, map_size, NULL);
821 genwqe_del_pin(cfile, dma_map);
822 genwqe_user_vunmap(cd, dma_map);
828 * ddcb_cmd_cleanup() - Remove dynamically created fixup entries
830 * Only if there are any. Pinnings are not removed.
832 static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
835 struct dma_mapping *dma_map;
836 struct genwqe_dev *cd = cfile->cd;
838 for (i = 0; i < DDCB_FIXUPS; i++) {
839 dma_map = &req->dma_mappings[i];
841 if (dma_mapping_used(dma_map)) {
842 __genwqe_del_mapping(cfile, dma_map);
843 genwqe_user_vunmap(cd, dma_map);
845 if (req->sgls[i].sgl != NULL)
846 genwqe_free_sync_sgl(cd, &req->sgls[i]);
852 * ddcb_cmd_fixups() - Establish DMA fixups/sglists for user memory references
854 * Before the DDCB gets executed we need to handle the fixups. We
855 * replace the user-space addresses with DMA addresses or do
856 * additional setup work e.g. generating a scatter-gather list which
857 * is used to describe the memory referred to in the fixup.
859 static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
862 unsigned int asiv_offs, i;
863 struct genwqe_dev *cd = cfile->cd;
864 struct genwqe_ddcb_cmd *cmd = &req->cmd;
865 struct dma_mapping *m;
867 for (i = 0, asiv_offs = 0x00; asiv_offs <= 0x58;
868 i++, asiv_offs += 0x08) {
875 ats_flags = ATS_GET_FLAGS(cmd->ats, asiv_offs);
880 break; /* nothing to do here */
882 case ATS_TYPE_FLAT_RDWR:
883 case ATS_TYPE_FLAT_RD: {
884 u_addr = be64_to_cpu(*((__be64 *)&cmd->
886 u_size = be32_to_cpu(*((__be32 *)&cmd->
887 asiv[asiv_offs + 0x08]));
890 * No data available. Ignore u_addr in this
891 * case and set addr to 0. Hardware must not
895 *((__be64 *)&cmd->asiv[asiv_offs]) =
900 m = __genwqe_search_mapping(cfile, u_addr, u_size,
907 *((__be64 *)&cmd->asiv[asiv_offs]) =
912 case ATS_TYPE_SGL_RDWR:
913 case ATS_TYPE_SGL_RD: {
916 u_addr = be64_to_cpu(*((__be64 *)
917 &cmd->asiv[asiv_offs]));
918 u_size = be32_to_cpu(*((__be32 *)
919 &cmd->asiv[asiv_offs + 0x08]));
922 * No data available. Ignore u_addr in this
923 * case and set addr to 0. Hardware must not
924 * fetch the empty sgl.
927 *((__be64 *)&cmd->asiv[asiv_offs]) =
932 m = genwqe_search_pin(cfile, u_addr, u_size, NULL);
934 page_offs = (u_addr -
935 (u64)m->u_vaddr)/PAGE_SIZE;
937 m = &req->dma_mappings[i];
939 genwqe_mapping_init(m,
940 GENWQE_MAPPING_SGL_TEMP);
942 if (ats_flags == ATS_TYPE_SGL_RD)
945 rc = genwqe_user_vmap(cd, m, (void *)u_addr,
950 __genwqe_add_mapping(cfile, m);
954 /* create genwqe style scatter gather list */
955 rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
956 (void __user *)u_addr,
961 genwqe_setup_sgl(cd, &req->sgls[i],
962 &m->dma_list[page_offs]);
964 *((__be64 *)&cmd->asiv[asiv_offs]) =
965 cpu_to_be64(req->sgls[i].sgl_dma_addr);
977 ddcb_cmd_cleanup(cfile, req);
982 * genwqe_execute_ddcb() - Execute DDCB using userspace address fixups
984 * The code will build up the translation tables or lookup the
985 * contignous memory allocation table to find the right translations
988 static int genwqe_execute_ddcb(struct genwqe_file *cfile,
989 struct genwqe_ddcb_cmd *cmd)
992 struct genwqe_dev *cd = cfile->cd;
993 struct file *filp = cfile->filp;
994 struct ddcb_requ *req = container_of(cmd, struct ddcb_requ, cmd);
996 rc = ddcb_cmd_fixups(cfile, req);
1000 rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
1001 ddcb_cmd_cleanup(cfile, req);
1005 static int do_execute_ddcb(struct genwqe_file *cfile,
1006 unsigned long arg, int raw)
1009 struct genwqe_ddcb_cmd *cmd;
1010 struct genwqe_dev *cd = cfile->cd;
1011 struct file *filp = cfile->filp;
1013 cmd = ddcb_requ_alloc();
1017 if (copy_from_user(cmd, (void __user *)arg, sizeof(*cmd))) {
1018 ddcb_requ_free(cmd);
1023 rc = genwqe_execute_ddcb(cfile, cmd);
1025 rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
1027 /* Copy back only the modifed fields. Do not copy ASIV
1028 back since the copy got modified by the driver. */
1029 if (copy_to_user((void __user *)arg, cmd,
1030 sizeof(*cmd) - DDCB_ASIV_LENGTH)) {
1031 ddcb_requ_free(cmd);
1035 ddcb_requ_free(cmd);
1040 * genwqe_ioctl() - IO control
1041 * @filp: file handle
1042 * @cmd: command identifier (passed from user)
1043 * @arg: argument (passed from user)
1047 static long genwqe_ioctl(struct file *filp, unsigned int cmd,
1051 struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
1052 struct genwqe_dev *cd = cfile->cd;
1053 struct pci_dev *pci_dev = cd->pci_dev;
1054 struct genwqe_reg_io __user *io;
1058 /* Return -EIO if card hit EEH */
1059 if (pci_channel_offline(pci_dev))
1062 if (_IOC_TYPE(cmd) != GENWQE_IOC_CODE)
1067 case GENWQE_GET_CARD_STATE:
1068 put_user(cd->card_state, (enum genwqe_card_state __user *)arg);
1071 /* Register access */
1072 case GENWQE_READ_REG64: {
1073 io = (struct genwqe_reg_io __user *)arg;
1075 if (get_user(reg_offs, &io->num))
1078 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
1081 val = __genwqe_readq(cd, reg_offs);
1082 put_user(val, &io->val64);
1086 case GENWQE_WRITE_REG64: {
1087 io = (struct genwqe_reg_io __user *)arg;
1089 if (!capable(CAP_SYS_ADMIN))
1092 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1095 if (get_user(reg_offs, &io->num))
1098 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
1101 if (get_user(val, &io->val64))
1104 __genwqe_writeq(cd, reg_offs, val);
1108 case GENWQE_READ_REG32: {
1109 io = (struct genwqe_reg_io __user *)arg;
1111 if (get_user(reg_offs, &io->num))
1114 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
1117 val = __genwqe_readl(cd, reg_offs);
1118 put_user(val, &io->val64);
1122 case GENWQE_WRITE_REG32: {
1123 io = (struct genwqe_reg_io __user *)arg;
1125 if (!capable(CAP_SYS_ADMIN))
1128 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1131 if (get_user(reg_offs, &io->num))
1134 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
1137 if (get_user(val, &io->val64))
1140 __genwqe_writel(cd, reg_offs, val);
1144 /* Flash update/reading */
1145 case GENWQE_SLU_UPDATE: {
1146 struct genwqe_bitstream load;
1148 if (!genwqe_is_privileged(cd))
1151 if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
1154 if (copy_from_user(&load, (void __user *)arg,
1158 rc = do_flash_update(cfile, &load);
1160 if (copy_to_user((void __user *)arg, &load, sizeof(load)))
1166 case GENWQE_SLU_READ: {
1167 struct genwqe_bitstream load;
1169 if (!genwqe_is_privileged(cd))
1172 if (genwqe_flash_readback_fails(cd))
1173 return -ENOSPC; /* known to fail for old versions */
1175 if (copy_from_user(&load, (void __user *)arg, sizeof(load)))
1178 rc = do_flash_read(cfile, &load);
1180 if (copy_to_user((void __user *)arg, &load, sizeof(load)))
1186 /* memory pinning and unpinning */
1187 case GENWQE_PIN_MEM: {
1188 struct genwqe_mem m;
1190 if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
1193 return genwqe_pin_mem(cfile, &m);
1196 case GENWQE_UNPIN_MEM: {
1197 struct genwqe_mem m;
1199 if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
1202 return genwqe_unpin_mem(cfile, &m);
1205 /* launch an DDCB and wait for completion */
1206 case GENWQE_EXECUTE_DDCB:
1207 return do_execute_ddcb(cfile, arg, 0);
1209 case GENWQE_EXECUTE_RAW_DDCB: {
1211 if (!capable(CAP_SYS_ADMIN))
1214 return do_execute_ddcb(cfile, arg, 1);
1224 #if defined(CONFIG_COMPAT)
1226 * genwqe_compat_ioctl() - Compatibility ioctl
1228 * Called whenever a 32-bit process running under a 64-bit kernel
1229 * performs an ioctl on /dev/genwqe<n>_card.
1231 * @filp: file pointer.
1233 * @arg: user argument.
1234 * Return: zero on success or negative number on failure.
1236 static long genwqe_compat_ioctl(struct file *filp, unsigned int cmd,
1239 return genwqe_ioctl(filp, cmd, arg);
1241 #endif /* defined(CONFIG_COMPAT) */
1243 static const struct file_operations genwqe_fops = {
1244 .owner = THIS_MODULE,
1245 .open = genwqe_open,
1246 .fasync = genwqe_fasync,
1247 .mmap = genwqe_mmap,
1248 .unlocked_ioctl = genwqe_ioctl,
1249 #if defined(CONFIG_COMPAT)
1250 .compat_ioctl = genwqe_compat_ioctl,
1252 .release = genwqe_release,
1255 static int genwqe_device_initialized(struct genwqe_dev *cd)
1257 return cd->dev != NULL;
1261 * genwqe_device_create() - Create and configure genwqe char device
1262 * @cd: genwqe device descriptor
1264 * This function must be called before we create any more genwqe
1265 * character devices, because it is allocating the major and minor
1266 * number which are supposed to be used by the client drivers.
1268 int genwqe_device_create(struct genwqe_dev *cd)
1271 struct pci_dev *pci_dev = cd->pci_dev;
1274 * Here starts the individual setup per client. It must
1275 * initialize its own cdev data structure with its own fops.
1276 * The appropriate devnum needs to be created. The ranges must
1279 rc = alloc_chrdev_region(&cd->devnum_genwqe, 0,
1280 GENWQE_MAX_MINOR, GENWQE_DEVNAME);
1282 dev_err(&pci_dev->dev, "err: alloc_chrdev_region failed\n");
1286 cdev_init(&cd->cdev_genwqe, &genwqe_fops);
1287 cd->cdev_genwqe.owner = THIS_MODULE;
1289 rc = cdev_add(&cd->cdev_genwqe, cd->devnum_genwqe, 1);
1291 dev_err(&pci_dev->dev, "err: cdev_add failed\n");
1296 * Finally the device in /dev/... must be created. The rule is
1297 * to use card%d_clientname for each created device.
1299 cd->dev = device_create_with_groups(cd->class_genwqe,
1301 cd->devnum_genwqe, cd,
1302 genwqe_attribute_groups,
1303 GENWQE_DEVNAME "%u_card",
1305 if (IS_ERR(cd->dev)) {
1306 rc = PTR_ERR(cd->dev);
1310 rc = genwqe_init_debugfs(cd);
1317 device_destroy(cd->class_genwqe, cd->devnum_genwqe);
1319 cdev_del(&cd->cdev_genwqe);
1321 unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
1327 static int genwqe_inform_and_stop_processes(struct genwqe_dev *cd)
1331 struct pci_dev *pci_dev = cd->pci_dev;
1333 if (!genwqe_open_files(cd))
1336 dev_warn(&pci_dev->dev, "[%s] send SIGIO and wait ...\n", __func__);
1338 rc = genwqe_kill_fasync(cd, SIGIO);
1340 /* give kill_timeout seconds to close file descriptors ... */
1341 for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
1342 genwqe_open_files(cd); i++) {
1343 dev_info(&pci_dev->dev, " %d sec ...", i);
1349 /* if no open files we can safely continue, else ... */
1350 if (!genwqe_open_files(cd))
1353 dev_warn(&pci_dev->dev,
1354 "[%s] send SIGKILL and wait ...\n", __func__);
1356 rc = genwqe_terminate(cd);
1358 /* Give kill_timout more seconds to end processes */
1359 for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
1360 genwqe_open_files(cd); i++) {
1361 dev_warn(&pci_dev->dev, " %d sec ...", i);
1372 * genwqe_device_remove() - Remove genwqe's char device
1374 * This function must be called after the client devices are removed
1375 * because it will free the major/minor number range for the genwqe
1378 * This function must be robust enough to be called twice.
1380 int genwqe_device_remove(struct genwqe_dev *cd)
1383 struct pci_dev *pci_dev = cd->pci_dev;
1385 if (!genwqe_device_initialized(cd))
1388 genwqe_inform_and_stop_processes(cd);
1391 * We currently do wait until all filedescriptors are
1392 * closed. This leads to a problem when we abort the
1393 * application which will decrease this reference from
1394 * 1/unused to 0/illegal and not from 2/used 1/empty.
1396 rc = kref_read(&cd->cdev_genwqe.kobj.kref);
1398 dev_err(&pci_dev->dev,
1399 "[%s] err: cdev_genwqe...refcount=%d\n", __func__, rc);
1400 panic("Fatal err: cannot free resources with pending references!");
1403 genqwe_exit_debugfs(cd);
1404 device_destroy(cd->class_genwqe, cd->devnum_genwqe);
1405 cdev_del(&cd->cdev_genwqe);
1406 unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);