1 // SPDX-License-Identifier: GPL-2.0
3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller
5 * Copyright (C) 2016-17 Renesas Electronics Corporation
6 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2017 Horms Solutions, Simon Horman
8 * Copyright (C) 2010-2011 Guennadi Liakhovetski
11 #include <linux/device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/dmaengine.h>
14 #include <linux/mfd/tmio.h>
15 #include <linux/mmc/host.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/module.h>
18 #include <linux/of_device.h>
19 #include <linux/pagemap.h>
20 #include <linux/scatterlist.h>
21 #include <linux/sys_soc.h>
23 #include "renesas_sdhi.h"
26 #define TMIO_MMC_MIN_DMA_LEN 8
28 static const struct renesas_sdhi_of_data of_default_cfg = {
29 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
32 static const struct renesas_sdhi_of_data of_rz_compatible = {
33 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
35 .tmio_ocr_mask = MMC_VDD_32_33,
36 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
39 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
40 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
41 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
42 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
45 /* Definitions for sampling clocks */
46 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
48 .clk_rate = 156000000,
57 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
59 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
62 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
63 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
64 .dma_rx_offset = 0x2000,
66 .taps = rcar_gen2_scc_taps,
67 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
70 /* Definitions for sampling clocks */
71 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
78 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
79 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
80 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
81 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
83 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
86 .taps = rcar_gen3_scc_taps,
87 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
90 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
91 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
92 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
93 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
94 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
95 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
96 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
97 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
98 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
99 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
100 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
101 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
102 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
103 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
104 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
105 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
106 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
107 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
108 { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
109 { .compatible = "renesas,sdhi-shmobile" },
112 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
114 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
117 struct renesas_sdhi *priv = host_to_priv(host);
119 if (!host->chan_tx || !host->chan_rx)
122 if (priv->dma_priv.enable)
123 priv->dma_priv.enable(host, enable);
126 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
128 renesas_sdhi_sys_dmac_enable_dma(host, false);
131 dmaengine_terminate_all(host->chan_rx);
133 dmaengine_terminate_all(host->chan_tx);
135 renesas_sdhi_sys_dmac_enable_dma(host, true);
138 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
140 struct renesas_sdhi *priv = host_to_priv(host);
142 complete(&priv->dma_priv.dma_dataend);
145 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
147 struct tmio_mmc_host *host = arg;
148 struct renesas_sdhi *priv = host_to_priv(host);
150 spin_lock_irq(&host->lock);
155 if (host->data->flags & MMC_DATA_READ)
156 dma_unmap_sg(host->chan_rx->device->dev,
157 host->sg_ptr, host->sg_len,
160 dma_unmap_sg(host->chan_tx->device->dev,
161 host->sg_ptr, host->sg_len,
164 spin_unlock_irq(&host->lock);
166 wait_for_completion(&priv->dma_priv.dma_dataend);
168 spin_lock_irq(&host->lock);
169 tmio_mmc_do_data_irq(host);
171 spin_unlock_irq(&host->lock);
174 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
176 struct renesas_sdhi *priv = host_to_priv(host);
177 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
178 struct dma_async_tx_descriptor *desc = NULL;
179 struct dma_chan *chan = host->chan_rx;
182 bool aligned = true, multiple = true;
183 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
185 for_each_sg(sg, sg_tmp, host->sg_len, i) {
186 if (sg_tmp->offset & align)
188 if (sg_tmp->length & align) {
194 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
195 (align & PAGE_MASK))) || !multiple) {
200 if (sg->length < TMIO_MMC_MIN_DMA_LEN)
203 /* The only sg element can be unaligned, use our bounce buffer then */
205 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
206 host->sg_ptr = &host->bounce_sg;
210 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
212 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
216 reinit_completion(&priv->dma_priv.dma_dataend);
217 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
218 desc->callback_param = host;
220 cookie = dmaengine_submit(desc);
229 /* DMA failed, fall back to PIO */
230 renesas_sdhi_sys_dmac_enable_dma(host, false);
233 host->chan_rx = NULL;
234 dma_release_channel(chan);
235 /* Free the Tx channel too */
236 chan = host->chan_tx;
238 host->chan_tx = NULL;
239 dma_release_channel(chan);
241 dev_warn(&host->pdev->dev,
242 "DMA failed: %d, falling back to PIO\n", ret);
246 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
248 struct renesas_sdhi *priv = host_to_priv(host);
249 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
250 struct dma_async_tx_descriptor *desc = NULL;
251 struct dma_chan *chan = host->chan_tx;
254 bool aligned = true, multiple = true;
255 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
257 for_each_sg(sg, sg_tmp, host->sg_len, i) {
258 if (sg_tmp->offset & align)
260 if (sg_tmp->length & align) {
266 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
267 (align & PAGE_MASK))) || !multiple) {
272 if (sg->length < TMIO_MMC_MIN_DMA_LEN)
275 /* The only sg element can be unaligned, use our bounce buffer then */
278 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
280 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
281 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
282 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
283 host->sg_ptr = &host->bounce_sg;
287 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
289 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
293 reinit_completion(&priv->dma_priv.dma_dataend);
294 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
295 desc->callback_param = host;
297 cookie = dmaengine_submit(desc);
306 /* DMA failed, fall back to PIO */
307 renesas_sdhi_sys_dmac_enable_dma(host, false);
310 host->chan_tx = NULL;
311 dma_release_channel(chan);
312 /* Free the Rx channel too */
313 chan = host->chan_rx;
315 host->chan_rx = NULL;
316 dma_release_channel(chan);
318 dev_warn(&host->pdev->dev,
319 "DMA failed: %d, falling back to PIO\n", ret);
323 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
324 struct mmc_data *data)
326 if (data->flags & MMC_DATA_READ) {
328 renesas_sdhi_sys_dmac_start_dma_rx(host);
331 renesas_sdhi_sys_dmac_start_dma_tx(host);
335 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
337 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
338 struct dma_chan *chan = NULL;
340 spin_lock_irq(&host->lock);
343 if (host->data->flags & MMC_DATA_READ)
344 chan = host->chan_rx;
346 chan = host->chan_tx;
349 spin_unlock_irq(&host->lock);
351 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
354 dma_async_issue_pending(chan);
357 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
358 struct tmio_mmc_data *pdata)
360 struct renesas_sdhi *priv = host_to_priv(host);
362 /* We can only either use DMA for both Tx and Rx or not use it at all */
363 if (!host->pdev->dev.of_node &&
364 (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
367 if (!host->chan_tx && !host->chan_rx) {
368 struct resource *res = platform_get_resource(host->pdev,
370 struct dma_slave_config cfg = {};
378 dma_cap_set(DMA_SLAVE, mask);
380 host->chan_tx = dma_request_slave_channel_compat(mask,
381 priv->dma_priv.filter, pdata->chan_priv_tx,
382 &host->pdev->dev, "tx");
383 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
389 cfg.direction = DMA_MEM_TO_DEV;
390 cfg.dst_addr = res->start +
391 (CTL_SD_DATA_PORT << host->bus_shift);
392 cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
393 if (!cfg.dst_addr_width)
394 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
396 ret = dmaengine_slave_config(host->chan_tx, &cfg);
400 host->chan_rx = dma_request_slave_channel_compat(mask,
401 priv->dma_priv.filter, pdata->chan_priv_rx,
402 &host->pdev->dev, "rx");
403 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
409 cfg.direction = DMA_DEV_TO_MEM;
410 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
411 cfg.src_addr_width = priv->dma_priv.dma_buswidth;
412 if (!cfg.src_addr_width)
413 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
415 ret = dmaengine_slave_config(host->chan_rx, &cfg);
419 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
420 if (!host->bounce_buf)
423 init_completion(&priv->dma_priv.dma_dataend);
424 tasklet_init(&host->dma_issue,
425 renesas_sdhi_sys_dmac_issue_tasklet_fn,
426 (unsigned long)host);
429 renesas_sdhi_sys_dmac_enable_dma(host, true);
435 dma_release_channel(host->chan_rx);
436 host->chan_rx = NULL;
439 dma_release_channel(host->chan_tx);
440 host->chan_tx = NULL;
443 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
446 struct dma_chan *chan = host->chan_tx;
448 host->chan_tx = NULL;
449 dma_release_channel(chan);
452 struct dma_chan *chan = host->chan_rx;
454 host->chan_rx = NULL;
455 dma_release_channel(chan);
457 if (host->bounce_buf) {
458 free_pages((unsigned long)host->bounce_buf, 0);
459 host->bounce_buf = NULL;
463 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
464 .start = renesas_sdhi_sys_dmac_start_dma,
465 .enable = renesas_sdhi_sys_dmac_enable_dma,
466 .request = renesas_sdhi_sys_dmac_request_dma,
467 .release = renesas_sdhi_sys_dmac_release_dma,
468 .abort = renesas_sdhi_sys_dmac_abort_dma,
469 .dataend = renesas_sdhi_sys_dmac_dataend_dma,
473 * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
474 * implementation. Currently empty as all supported ES versions use
477 static const struct soc_device_attribute gen3_soc_whitelist[] = {
481 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
483 if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
484 !soc_device_match(gen3_soc_whitelist))
487 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
490 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
491 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
492 pm_runtime_force_resume)
493 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
494 tmio_mmc_host_runtime_resume,
498 static struct platform_driver renesas_sys_dmac_sdhi_driver = {
500 .name = "sh_mobile_sdhi",
501 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
502 .of_match_table = renesas_sdhi_sys_dmac_of_match,
504 .probe = renesas_sdhi_sys_dmac_probe,
505 .remove = renesas_sdhi_remove,
508 module_platform_driver(renesas_sys_dmac_sdhi_driver);
510 MODULE_DESCRIPTION("Renesas SDHI driver");
511 MODULE_AUTHOR("Magnus Damm");
512 MODULE_LICENSE("GPL v2");
513 MODULE_ALIAS("platform:sh_mobile_sdhi");