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mmc: sdhci-acpi: Switch signal voltage back to 3.3V on suspend on external microSD...
[linux.git] / drivers / mmc / host / sdhci-acpi.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Secure Digital Host Controller Interface ACPI driver.
4  *
5  * Copyright (c) 2012, Intel Corporation.
6  */
7
8 #include <linux/init.h>
9 #include <linux/export.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/ioport.h>
14 #include <linux/io.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/compiler.h>
17 #include <linux/stddef.h>
18 #include <linux/bitops.h>
19 #include <linux/types.h>
20 #include <linux/err.h>
21 #include <linux/interrupt.h>
22 #include <linux/acpi.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/pm.h>
30 #include <linux/mmc/slot-gpio.h>
31
32 #ifdef CONFIG_X86
33 #include <asm/cpu_device_id.h>
34 #include <asm/intel-family.h>
35 #include <asm/iosf_mbi.h>
36 #include <linux/pci.h>
37 #endif
38
39 #include "sdhci.h"
40
41 enum {
42         SDHCI_ACPI_SD_CD                = BIT(0),
43         SDHCI_ACPI_RUNTIME_PM           = BIT(1),
44         SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
45 };
46
47 struct sdhci_acpi_chip {
48         const struct    sdhci_ops *ops;
49         unsigned int    quirks;
50         unsigned int    quirks2;
51         unsigned long   caps;
52         unsigned int    caps2;
53         mmc_pm_flag_t   pm_caps;
54 };
55
56 struct sdhci_acpi_slot {
57         const struct    sdhci_acpi_chip *chip;
58         unsigned int    quirks;
59         unsigned int    quirks2;
60         unsigned long   caps;
61         unsigned int    caps2;
62         mmc_pm_flag_t   pm_caps;
63         unsigned int    flags;
64         size_t          priv_size;
65         int (*probe_slot)(struct platform_device *, struct acpi_device *);
66         int (*remove_slot)(struct platform_device *);
67         int (*free_slot)(struct platform_device *pdev);
68         int (*setup_host)(struct platform_device *pdev);
69 };
70
71 struct sdhci_acpi_host {
72         struct sdhci_host               *host;
73         const struct sdhci_acpi_slot    *slot;
74         struct platform_device          *pdev;
75         bool                            use_runtime_pm;
76         bool                            is_intel;
77         bool                            reset_signal_volt_on_suspend;
78         unsigned long                   private[0] ____cacheline_aligned;
79 };
80
81 enum {
82         DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP                  = BIT(0),
83 };
84
85 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
86 {
87         return (void *)c->private;
88 }
89
90 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
91 {
92         return c->slot && (c->slot->flags & flag);
93 }
94
95 #define INTEL_DSM_HS_CAPS_SDR25         BIT(0)
96 #define INTEL_DSM_HS_CAPS_DDR50         BIT(1)
97 #define INTEL_DSM_HS_CAPS_SDR50         BIT(2)
98 #define INTEL_DSM_HS_CAPS_SDR104        BIT(3)
99
100 enum {
101         INTEL_DSM_FNS           =  0,
102         INTEL_DSM_V18_SWITCH    =  3,
103         INTEL_DSM_V33_SWITCH    =  4,
104         INTEL_DSM_HS_CAPS       =  8,
105 };
106
107 struct intel_host {
108         u32     dsm_fns;
109         u32     hs_caps;
110 };
111
112 static const guid_t intel_dsm_guid =
113         GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
114                   0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
115
116 static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
117                        unsigned int fn, u32 *result)
118 {
119         union acpi_object *obj;
120         int err = 0;
121
122         obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
123         if (!obj)
124                 return -EOPNOTSUPP;
125
126         if (obj->type == ACPI_TYPE_INTEGER) {
127                 *result = obj->integer.value;
128         } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
129                 size_t len = min_t(size_t, obj->buffer.length, 4);
130
131                 *result = 0;
132                 memcpy(result, obj->buffer.pointer, len);
133         } else {
134                 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
135                         __func__, fn, obj->type, obj->buffer.length);
136                 err = -EINVAL;
137         }
138
139         ACPI_FREE(obj);
140
141         return err;
142 }
143
144 static int intel_dsm(struct intel_host *intel_host, struct device *dev,
145                      unsigned int fn, u32 *result)
146 {
147         if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
148                 return -EOPNOTSUPP;
149
150         return __intel_dsm(intel_host, dev, fn, result);
151 }
152
153 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
154                            struct mmc_host *mmc)
155 {
156         int err;
157
158         intel_host->hs_caps = ~0;
159
160         err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
161         if (err) {
162                 pr_debug("%s: DSM not supported, error %d\n",
163                          mmc_hostname(mmc), err);
164                 return;
165         }
166
167         pr_debug("%s: DSM function mask %#x\n",
168                  mmc_hostname(mmc), intel_host->dsm_fns);
169
170         intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
171 }
172
173 static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
174                                              struct mmc_ios *ios)
175 {
176         struct device *dev = mmc_dev(mmc);
177         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
178         struct intel_host *intel_host = sdhci_acpi_priv(c);
179         unsigned int fn;
180         u32 result = 0;
181         int err;
182
183         err = sdhci_start_signal_voltage_switch(mmc, ios);
184         if (err)
185                 return err;
186
187         switch (ios->signal_voltage) {
188         case MMC_SIGNAL_VOLTAGE_330:
189                 fn = INTEL_DSM_V33_SWITCH;
190                 break;
191         case MMC_SIGNAL_VOLTAGE_180:
192                 fn = INTEL_DSM_V18_SWITCH;
193                 break;
194         default:
195                 return 0;
196         }
197
198         err = intel_dsm(intel_host, dev, fn, &result);
199         pr_debug("%s: %s DSM fn %u error %d result %u\n",
200                  mmc_hostname(mmc), __func__, fn, err, result);
201
202         return 0;
203 }
204
205 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
206 {
207         u8 reg;
208
209         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
210         reg |= 0x10;
211         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
212         /* For eMMC, minimum is 1us but give it 9us for good measure */
213         udelay(9);
214         reg &= ~0x10;
215         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
216         /* For eMMC, minimum is 200us but give it 300us for good measure */
217         usleep_range(300, 1000);
218 }
219
220 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
221         .set_clock = sdhci_set_clock,
222         .set_bus_width = sdhci_set_bus_width,
223         .reset = sdhci_reset,
224         .set_uhs_signaling = sdhci_set_uhs_signaling,
225 };
226
227 static const struct sdhci_ops sdhci_acpi_ops_int = {
228         .set_clock = sdhci_set_clock,
229         .set_bus_width = sdhci_set_bus_width,
230         .reset = sdhci_reset,
231         .set_uhs_signaling = sdhci_set_uhs_signaling,
232         .hw_reset   = sdhci_acpi_int_hw_reset,
233 };
234
235 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
236         .ops = &sdhci_acpi_ops_int,
237 };
238
239 #ifdef CONFIG_X86
240
241 static bool sdhci_acpi_byt(void)
242 {
243         static const struct x86_cpu_id byt[] = {
244                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
245                 {}
246         };
247
248         return x86_match_cpu(byt);
249 }
250
251 static bool sdhci_acpi_cht(void)
252 {
253         static const struct x86_cpu_id cht[] = {
254                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
255                 {}
256         };
257
258         return x86_match_cpu(cht);
259 }
260
261 #define BYT_IOSF_SCCEP                  0x63
262 #define BYT_IOSF_OCP_NETCTRL0           0x1078
263 #define BYT_IOSF_OCP_TIMEOUT_BASE       GENMASK(10, 8)
264
265 static void sdhci_acpi_byt_setting(struct device *dev)
266 {
267         u32 val = 0;
268
269         if (!sdhci_acpi_byt())
270                 return;
271
272         if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
273                           &val)) {
274                 dev_err(dev, "%s read error\n", __func__);
275                 return;
276         }
277
278         if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
279                 return;
280
281         val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
282
283         if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
284                            val)) {
285                 dev_err(dev, "%s write error\n", __func__);
286                 return;
287         }
288
289         dev_dbg(dev, "%s completed\n", __func__);
290 }
291
292 static bool sdhci_acpi_byt_defer(struct device *dev)
293 {
294         if (!sdhci_acpi_byt())
295                 return false;
296
297         if (!iosf_mbi_available())
298                 return true;
299
300         sdhci_acpi_byt_setting(dev);
301
302         return false;
303 }
304
305 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
306                                     unsigned int slot, unsigned int parent_slot)
307 {
308         struct pci_dev *dev, *parent, *from = NULL;
309
310         while (1) {
311                 dev = pci_get_device(vendor, device, from);
312                 pci_dev_put(from);
313                 if (!dev)
314                         break;
315                 parent = pci_upstream_bridge(dev);
316                 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
317                     parent && PCI_SLOT(parent->devfn) == parent_slot &&
318                     !pci_upstream_bridge(parent)) {
319                         pci_dev_put(dev);
320                         return true;
321                 }
322                 from = dev;
323         }
324
325         return false;
326 }
327
328 /*
329  * GPDwin uses PCI wifi which conflicts with SDIO's use of
330  * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
331  * problematic, but since SDIO is only used for wifi, the presence of the PCI
332  * wifi card in the expected slot with an ACPI companion node, is used to
333  * indicate that acpi_device_fix_up_power() should be avoided.
334  */
335 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
336 {
337         return sdhci_acpi_cht() &&
338                acpi_dev_hid_uid_match(adev, "80860F14", "2") &&
339                sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
340 }
341
342 #else
343
344 static inline void sdhci_acpi_byt_setting(struct device *dev)
345 {
346 }
347
348 static inline bool sdhci_acpi_byt_defer(struct device *dev)
349 {
350         return false;
351 }
352
353 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
354 {
355         return false;
356 }
357
358 #endif
359
360 static int bxt_get_cd(struct mmc_host *mmc)
361 {
362         int gpio_cd = mmc_gpio_get_cd(mmc);
363         struct sdhci_host *host = mmc_priv(mmc);
364         unsigned long flags;
365         int ret = 0;
366
367         if (!gpio_cd)
368                 return 0;
369
370         spin_lock_irqsave(&host->lock, flags);
371
372         if (host->flags & SDHCI_DEVICE_DEAD)
373                 goto out;
374
375         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
376 out:
377         spin_unlock_irqrestore(&host->lock, flags);
378
379         return ret;
380 }
381
382 static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
383 {
384         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
385         struct intel_host *intel_host = sdhci_acpi_priv(c);
386         struct sdhci_host *host = c->host;
387
388         if (acpi_dev_hid_uid_match(adev, "80860F14", "1") &&
389             sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
390             sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
391                 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
392
393         if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL))
394                 host->mmc_host_ops.get_cd = bxt_get_cd;
395
396         intel_dsm_init(intel_host, &pdev->dev, host->mmc);
397
398         host->mmc_host_ops.start_signal_voltage_switch =
399                                         intel_start_signal_voltage_switch;
400
401         c->is_intel = true;
402
403         return 0;
404 }
405
406 static int intel_setup_host(struct platform_device *pdev)
407 {
408         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
409         struct intel_host *intel_host = sdhci_acpi_priv(c);
410
411         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
412                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
413
414         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
415                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
416
417         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
418                 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
419
420         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
421                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
422
423         return 0;
424 }
425
426 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
427         .chip    = &sdhci_acpi_chip_int,
428         .caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
429                    MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
430                    MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
431         .flags   = SDHCI_ACPI_RUNTIME_PM,
432         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
433                    SDHCI_QUIRK_NO_LED,
434         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
435                    SDHCI_QUIRK2_STOP_WITH_TC |
436                    SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
437         .probe_slot     = intel_probe_slot,
438         .setup_host     = intel_setup_host,
439         .priv_size      = sizeof(struct intel_host),
440 };
441
442 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
443         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
444                    SDHCI_QUIRK_NO_LED |
445                    SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
446         .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
447         .caps    = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
448                    MMC_CAP_WAIT_WHILE_BUSY,
449         .flags   = SDHCI_ACPI_RUNTIME_PM,
450         .pm_caps = MMC_PM_KEEP_POWER,
451         .probe_slot     = intel_probe_slot,
452         .setup_host     = intel_setup_host,
453         .priv_size      = sizeof(struct intel_host),
454 };
455
456 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
457         .flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
458                    SDHCI_ACPI_RUNTIME_PM,
459         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
460                    SDHCI_QUIRK_NO_LED,
461         .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
462                    SDHCI_QUIRK2_STOP_WITH_TC,
463         .caps    = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
464         .probe_slot     = intel_probe_slot,
465         .setup_host     = intel_setup_host,
466         .priv_size      = sizeof(struct intel_host),
467 };
468
469 #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG        0x1a8
470 #define VENDOR_SPECIFIC_PWRCTL_CTL_REG          0x1ac
471 static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
472 {
473         struct sdhci_host *host = ptr;
474
475         sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
476         sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
477
478         return IRQ_HANDLED;
479 }
480
481 static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
482 {
483         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
484         struct sdhci_host *host = c->host;
485         int *irq = sdhci_acpi_priv(c);
486
487         *irq = -EINVAL;
488
489         if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
490                 return 0;
491
492         *irq = platform_get_irq(pdev, 1);
493         if (*irq < 0)
494                 return 0;
495
496         return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
497                                     IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
498                                     "sdhci_qcom", host);
499 }
500
501 static int qcom_free_slot(struct platform_device *pdev)
502 {
503         struct device *dev = &pdev->dev;
504         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
505         struct sdhci_host *host = c->host;
506         struct acpi_device *adev;
507         int *irq = sdhci_acpi_priv(c);
508
509         adev = ACPI_COMPANION(dev);
510         if (!adev)
511                 return -ENODEV;
512
513         if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
514                 return 0;
515
516         if (*irq < 0)
517                 return 0;
518
519         free_irq(*irq, host);
520         return 0;
521 }
522
523 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
524         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
525         .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
526         .caps    = MMC_CAP_NONREMOVABLE,
527         .priv_size      = sizeof(int),
528         .probe_slot     = qcom_probe_slot,
529         .free_slot      = qcom_free_slot,
530 };
531
532 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
533         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
534         .caps    = MMC_CAP_NONREMOVABLE,
535 };
536
537 /* AMD sdhci reset dll register. */
538 #define SDHCI_AMD_RESET_DLL_REGISTER    0x908
539
540 static int amd_select_drive_strength(struct mmc_card *card,
541                                      unsigned int max_dtr, int host_drv,
542                                      int card_drv, int *drv_type)
543 {
544         return MMC_SET_DRIVER_TYPE_A;
545 }
546
547 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
548 {
549         /* AMD Platform requires dll setting */
550         sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
551         usleep_range(10, 20);
552         sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
553 }
554
555 /*
556  * For AMD Platform it is required to disable the tuning
557  * bit first controller to bring to HS Mode from HS200
558  * mode, later enable to tune to HS400 mode.
559  */
560 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
561 {
562         struct sdhci_host *host = mmc_priv(mmc);
563         unsigned int old_timing = host->timing;
564
565         sdhci_set_ios(mmc, ios);
566         if (old_timing == MMC_TIMING_MMC_HS200 &&
567             ios->timing == MMC_TIMING_MMC_HS)
568                 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
569         if (old_timing != MMC_TIMING_MMC_HS400 &&
570             ios->timing == MMC_TIMING_MMC_HS400) {
571                 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
572                 sdhci_acpi_amd_hs400_dll(host);
573         }
574 }
575
576 static const struct sdhci_ops sdhci_acpi_ops_amd = {
577         .set_clock      = sdhci_set_clock,
578         .set_bus_width  = sdhci_set_bus_width,
579         .reset          = sdhci_reset,
580         .set_uhs_signaling = sdhci_set_uhs_signaling,
581 };
582
583 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
584         .ops = &sdhci_acpi_ops_amd,
585 };
586
587 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
588                                           struct acpi_device *adev)
589 {
590         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
591         struct sdhci_host *host   = c->host;
592
593         sdhci_read_caps(host);
594         if (host->caps1 & SDHCI_SUPPORT_DDR50)
595                 host->mmc->caps = MMC_CAP_1_8V_DDR;
596
597         if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
598             (host->mmc->caps & MMC_CAP_1_8V_DDR))
599                 host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
600
601         host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
602         host->mmc_host_ops.set_ios = amd_set_ios;
603         return 0;
604 }
605
606 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
607         .chip   = &sdhci_acpi_chip_amd,
608         .caps   = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
609         .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
610                         SDHCI_QUIRK_32BIT_ADMA_SIZE,
611         .probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
612 };
613
614 struct sdhci_acpi_uid_slot {
615         const char *hid;
616         const char *uid;
617         const struct sdhci_acpi_slot *slot;
618 };
619
620 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
621         { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
622         { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
623         { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
624         { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
625         { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
626         { "80860F14" , "3" , &sdhci_acpi_slot_int_sd   },
627         { "80860F16" , NULL, &sdhci_acpi_slot_int_sd   },
628         { "INT33BB"  , "2" , &sdhci_acpi_slot_int_sdio },
629         { "INT33BB"  , "3" , &sdhci_acpi_slot_int_sd },
630         { "INT33C6"  , NULL, &sdhci_acpi_slot_int_sdio },
631         { "INT3436"  , NULL, &sdhci_acpi_slot_int_sdio },
632         { "INT344D"  , NULL, &sdhci_acpi_slot_int_sdio },
633         { "PNP0FFF"  , "3" , &sdhci_acpi_slot_int_sd   },
634         { "PNP0D40"  },
635         { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
636         { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
637         { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
638         { },
639 };
640
641 static const struct acpi_device_id sdhci_acpi_ids[] = {
642         { "80865ACA" },
643         { "80865ACC" },
644         { "80865AD0" },
645         { "80860F14" },
646         { "80860F16" },
647         { "INT33BB"  },
648         { "INT33C6"  },
649         { "INT3436"  },
650         { "INT344D"  },
651         { "PNP0D40"  },
652         { "QCOM8051" },
653         { "QCOM8052" },
654         { "AMDI0040" },
655         { },
656 };
657 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
658
659 static const struct dmi_system_id sdhci_acpi_quirks[] = {
660         {
661                 /*
662                  * The Lenovo Miix 320-10ICR has a bug in the _PS0 method of
663                  * the SHC1 ACPI device, this bug causes it to reprogram the
664                  * wrong LDO (DLDO3) to 1.8V if 1.8V modes are used and the
665                  * card is (runtime) suspended + resumed. DLDO3 is used for
666                  * the LCD and setting it to 1.8V causes the LCD to go black.
667                  */
668                 .matches = {
669                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
670                         DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
671                 },
672                 .driver_data = (void *)DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP,
673         },
674         {} /* Terminating entry */
675 };
676
677 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev)
678 {
679         const struct sdhci_acpi_uid_slot *u;
680
681         for (u = sdhci_acpi_uids; u->hid; u++) {
682                 if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
683                         return u->slot;
684         }
685         return NULL;
686 }
687
688 static int sdhci_acpi_probe(struct platform_device *pdev)
689 {
690         struct device *dev = &pdev->dev;
691         const struct sdhci_acpi_slot *slot;
692         struct acpi_device *device, *child;
693         const struct dmi_system_id *id;
694         struct sdhci_acpi_host *c;
695         struct sdhci_host *host;
696         struct resource *iomem;
697         resource_size_t len;
698         size_t priv_size;
699         int quirks = 0;
700         int err;
701
702         device = ACPI_COMPANION(dev);
703         if (!device)
704                 return -ENODEV;
705
706         id = dmi_first_match(sdhci_acpi_quirks);
707         if (id)
708                 quirks = (long)id->driver_data;
709
710         slot = sdhci_acpi_get_slot(device);
711
712         /* Power on the SDHCI controller and its children */
713         acpi_device_fix_up_power(device);
714         if (!sdhci_acpi_no_fixup_child_power(device)) {
715                 list_for_each_entry(child, &device->children, node)
716                         if (child->status.present && child->status.enabled)
717                                 acpi_device_fix_up_power(child);
718         }
719
720         if (sdhci_acpi_byt_defer(dev))
721                 return -EPROBE_DEFER;
722
723         iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
724         if (!iomem)
725                 return -ENOMEM;
726
727         len = resource_size(iomem);
728         if (len < 0x100)
729                 dev_err(dev, "Invalid iomem size!\n");
730
731         if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
732                 return -ENOMEM;
733
734         priv_size = slot ? slot->priv_size : 0;
735         host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
736         if (IS_ERR(host))
737                 return PTR_ERR(host);
738
739         c = sdhci_priv(host);
740         c->host = host;
741         c->slot = slot;
742         c->pdev = pdev;
743         c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
744
745         platform_set_drvdata(pdev, c);
746
747         host->hw_name   = "ACPI";
748         host->ops       = &sdhci_acpi_ops_dflt;
749         host->irq       = platform_get_irq(pdev, 0);
750         if (host->irq < 0) {
751                 err = -EINVAL;
752                 goto err_free;
753         }
754
755         host->ioaddr = devm_ioremap(dev, iomem->start,
756                                             resource_size(iomem));
757         if (host->ioaddr == NULL) {
758                 err = -ENOMEM;
759                 goto err_free;
760         }
761
762         if (c->slot) {
763                 if (c->slot->probe_slot) {
764                         err = c->slot->probe_slot(pdev, device);
765                         if (err)
766                                 goto err_free;
767                 }
768                 if (c->slot->chip) {
769                         host->ops            = c->slot->chip->ops;
770                         host->quirks        |= c->slot->chip->quirks;
771                         host->quirks2       |= c->slot->chip->quirks2;
772                         host->mmc->caps     |= c->slot->chip->caps;
773                         host->mmc->caps2    |= c->slot->chip->caps2;
774                         host->mmc->pm_caps  |= c->slot->chip->pm_caps;
775                 }
776                 host->quirks        |= c->slot->quirks;
777                 host->quirks2       |= c->slot->quirks2;
778                 host->mmc->caps     |= c->slot->caps;
779                 host->mmc->caps2    |= c->slot->caps2;
780                 host->mmc->pm_caps  |= c->slot->pm_caps;
781         }
782
783         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
784
785         if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
786                 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
787
788                 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0);
789                 if (err) {
790                         if (err == -EPROBE_DEFER)
791                                 goto err_free;
792                         dev_warn(dev, "failed to setup card detect gpio\n");
793                         c->use_runtime_pm = false;
794                 }
795
796                 if (quirks & DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP)
797                         c->reset_signal_volt_on_suspend = true;
798         }
799
800         err = sdhci_setup_host(host);
801         if (err)
802                 goto err_free;
803
804         if (c->slot && c->slot->setup_host) {
805                 err = c->slot->setup_host(pdev);
806                 if (err)
807                         goto err_cleanup;
808         }
809
810         err = __sdhci_add_host(host);
811         if (err)
812                 goto err_cleanup;
813
814         if (c->use_runtime_pm) {
815                 pm_runtime_set_active(dev);
816                 pm_suspend_ignore_children(dev, 1);
817                 pm_runtime_set_autosuspend_delay(dev, 50);
818                 pm_runtime_use_autosuspend(dev);
819                 pm_runtime_enable(dev);
820         }
821
822         device_enable_async_suspend(dev);
823
824         return 0;
825
826 err_cleanup:
827         sdhci_cleanup_host(c->host);
828 err_free:
829         if (c->slot && c->slot->free_slot)
830                 c->slot->free_slot(pdev);
831
832         sdhci_free_host(c->host);
833         return err;
834 }
835
836 static int sdhci_acpi_remove(struct platform_device *pdev)
837 {
838         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
839         struct device *dev = &pdev->dev;
840         int dead;
841
842         if (c->use_runtime_pm) {
843                 pm_runtime_get_sync(dev);
844                 pm_runtime_disable(dev);
845                 pm_runtime_put_noidle(dev);
846         }
847
848         if (c->slot && c->slot->remove_slot)
849                 c->slot->remove_slot(pdev);
850
851         dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
852         sdhci_remove_host(c->host, dead);
853
854         if (c->slot && c->slot->free_slot)
855                 c->slot->free_slot(pdev);
856
857         sdhci_free_host(c->host);
858
859         return 0;
860 }
861
862 static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed(
863         struct device *dev)
864 {
865         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
866         struct sdhci_host *host = c->host;
867
868         if (c->is_intel && c->reset_signal_volt_on_suspend &&
869             host->mmc->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_330) {
870                 struct intel_host *intel_host = sdhci_acpi_priv(c);
871                 unsigned int fn = INTEL_DSM_V33_SWITCH;
872                 u32 result = 0;
873
874                 intel_dsm(intel_host, dev, fn, &result);
875         }
876 }
877
878 #ifdef CONFIG_PM_SLEEP
879
880 static int sdhci_acpi_suspend(struct device *dev)
881 {
882         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
883         struct sdhci_host *host = c->host;
884         int ret;
885
886         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
887                 mmc_retune_needed(host->mmc);
888
889         ret = sdhci_suspend_host(host);
890         if (ret)
891                 return ret;
892
893         sdhci_acpi_reset_signal_voltage_if_needed(dev);
894         return 0;
895 }
896
897 static int sdhci_acpi_resume(struct device *dev)
898 {
899         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
900
901         sdhci_acpi_byt_setting(&c->pdev->dev);
902
903         return sdhci_resume_host(c->host);
904 }
905
906 #endif
907
908 #ifdef CONFIG_PM
909
910 static int sdhci_acpi_runtime_suspend(struct device *dev)
911 {
912         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
913         struct sdhci_host *host = c->host;
914         int ret;
915
916         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
917                 mmc_retune_needed(host->mmc);
918
919         ret = sdhci_runtime_suspend_host(host);
920         if (ret)
921                 return ret;
922
923         sdhci_acpi_reset_signal_voltage_if_needed(dev);
924         return 0;
925 }
926
927 static int sdhci_acpi_runtime_resume(struct device *dev)
928 {
929         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
930
931         sdhci_acpi_byt_setting(&c->pdev->dev);
932
933         return sdhci_runtime_resume_host(c->host, 0);
934 }
935
936 #endif
937
938 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
939         SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
940         SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
941                         sdhci_acpi_runtime_resume, NULL)
942 };
943
944 static struct platform_driver sdhci_acpi_driver = {
945         .driver = {
946                 .name                   = "sdhci-acpi",
947                 .acpi_match_table       = sdhci_acpi_ids,
948                 .pm                     = &sdhci_acpi_pm_ops,
949         },
950         .probe  = sdhci_acpi_probe,
951         .remove = sdhci_acpi_remove,
952 };
953
954 module_platform_driver(sdhci_acpi_driver);
955
956 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
957 MODULE_AUTHOR("Adrian Hunter");
958 MODULE_LICENSE("GPL v2");