1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
4 * found on some Ricoh RL5c476 II cardbus bridge
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
13 #include <linux/delay.h>
14 #include <linux/highmem.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/ioport.h>
18 #include <linux/scatterlist.h>
20 #include <pcmcia/cistpl.h>
21 #include <pcmcia/ds.h>
24 #include <linux/mmc/host.h>
26 #define DRIVER_NAME "sdricoh_cs"
28 static unsigned int switchlocked;
31 #define SDRICOH_PCI_REGION 0
32 #define SDRICOH_PCI_REGION_SIZE 0x1000
35 #define R104_VERSION 0x104
36 #define R200_CMD 0x200
37 #define R204_CMD_ARG 0x204
38 #define R208_DATAIO 0x208
39 #define R20C_RESP 0x20c
40 #define R21C_STATUS 0x21c
41 #define R2E0_INIT 0x2e0
42 #define R2E4_STATUS_RESP 0x2e4
43 #define R2F0_RESET 0x2f0
44 #define R224_MODE 0x224
45 #define R226_BLOCKSIZE 0x226
46 #define R228_POWER 0x228
47 #define R230_DATA 0x230
49 /* flags for the R21C_STATUS register */
50 #define STATUS_CMD_FINISHED 0x00000001
51 #define STATUS_TRANSFER_FINISHED 0x00000004
52 #define STATUS_CARD_INSERTED 0x00000020
53 #define STATUS_CARD_LOCKED 0x00000080
54 #define STATUS_CMD_TIMEOUT 0x00400000
55 #define STATUS_READY_TO_READ 0x01000000
56 #define STATUS_READY_TO_WRITE 0x02000000
57 #define STATUS_BUSY 0x40000000
60 #define INIT_TIMEOUT 100
61 #define CMD_TIMEOUT 100000
62 #define TRANSFER_TIMEOUT 100000
63 #define BUSY_TIMEOUT 32767
65 /* list of supported pcmcia devices */
66 static const struct pcmcia_device_id pcmcia_ids[] = {
67 /* vendor and device strings followed by their crc32 hashes */
68 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
75 MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
80 struct mmc_host *mmc; /* MMC structure */
81 unsigned char __iomem *iobase;
82 struct pci_dev *pci_dev;
86 /***************** register i/o helper functions *****************************/
88 static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
91 unsigned int value = readl(host->iobase + reg);
92 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
96 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
99 writel(value, host->iobase + reg);
100 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
104 static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
107 unsigned int value = readw(host->iobase + reg);
108 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
112 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
113 unsigned short value)
115 writew(value, host->iobase + reg);
116 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
119 static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
122 unsigned int value = readb(host->iobase + reg);
123 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
127 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
128 unsigned int timeout){
130 unsigned int status = 0;
131 struct device *dev = host->dev;
132 for (loop = 0; loop < timeout; loop++) {
133 status = sdricoh_readl(host, R21C_STATUS);
134 sdricoh_writel(host, R2E4_STATUS_RESP, status);
139 if (loop == timeout) {
140 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
144 /* do not do this check in the loop as some commands fail otherwise */
145 if (status & 0x7F0000) {
146 dev_err(dev, "waiting for status bit %x failed\n", wanted);
153 static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
158 unsigned int loop = 0;
159 /* reset status reg? */
160 sdricoh_writel(host, R21C_STATUS, 0x18);
161 /* fill parameters */
162 sdricoh_writel(host, R204_CMD_ARG, arg);
163 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
164 /* wait for command completion */
166 for (loop = 0; loop < CMD_TIMEOUT; loop++) {
167 status = sdricoh_readl(host, R21C_STATUS);
168 sdricoh_writel(host, R2E4_STATUS_RESP, status);
169 if (status & STATUS_CMD_FINISHED)
172 /* don't check for timeout in the loop it is not always
175 if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
184 static int sdricoh_reset(struct sdricoh_host *host)
186 dev_dbg(host->dev, "reset\n");
187 sdricoh_writel(host, R2F0_RESET, 0x10001);
188 sdricoh_writel(host, R2E0_INIT, 0x10000);
189 if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
191 sdricoh_writel(host, R2E0_INIT, 0x10007);
193 sdricoh_writel(host, R224_MODE, 0x2000000);
194 sdricoh_writel(host, R228_POWER, 0xe0);
197 /* status register ? */
198 sdricoh_writel(host, R21C_STATUS, 0x18);
203 static int sdricoh_blockio(struct sdricoh_host *host, int read,
208 /* wait until the data is available */
210 if (sdricoh_query_status(host, STATUS_READY_TO_READ,
213 sdricoh_writel(host, R21C_STATUS, 0x18);
216 data = sdricoh_readl(host, R230_DATA);
227 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
230 sdricoh_writel(host, R21C_STATUS, 0x18);
237 data |= (u32)*buf << 24;
241 sdricoh_writel(host, R230_DATA, data);
248 static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
250 struct sdricoh_host *host = mmc_priv(mmc);
251 struct mmc_command *cmd = mrq->cmd;
252 struct mmc_data *data = cmd->data;
253 struct device *dev = host->dev;
254 unsigned char opcode = cmd->opcode;
257 dev_dbg(dev, "=============================\n");
258 dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
260 sdricoh_writel(host, R21C_STATUS, 0x18);
262 /* MMC_APP_CMDs need some special handling */
266 } else if (opcode == 55)
269 /* read/write commands seem to require this */
271 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
272 sdricoh_writel(host, R208_DATAIO, 0);
275 cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
277 /* read response buffer */
278 if (cmd->flags & MMC_RSP_PRESENT) {
279 if (cmd->flags & MMC_RSP_136) {
280 /* CRC is stripped so we need to do some shifting. */
281 for (i = 0; i < 4; i++) {
284 R20C_RESP + (3 - i) * 4) << 8;
287 sdricoh_readb(host, R20C_RESP +
291 cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
295 if (data && cmd->error == 0) {
296 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
297 "sg length %i\n", data->blksz, data->blocks,
298 data->sg_len, data->sg->length);
300 /* enter data reading mode */
301 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
302 for (i = 0; i < data->blocks; i++) {
303 size_t len = data->blksz;
307 page = sg_page(data->sg);
309 buf = kmap(page) + data->sg->offset + (len * i);
311 sdricoh_blockio(host,
312 data->flags & MMC_DATA_READ, buf, len);
314 flush_dcache_page(page);
316 dev_err(dev, "sdricoh_request: cmd %i "
317 "block transfer failed\n", cmd->opcode);
321 data->bytes_xfered += len;
324 sdricoh_writel(host, R208_DATAIO, 1);
326 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
328 dev_err(dev, "sdricoh_request: transfer end error\n");
329 cmd->error = -EINVAL;
332 /* FIXME check busy flag */
334 mmc_request_done(mmc, mrq);
335 dev_dbg(dev, "=============================\n");
338 static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
340 struct sdricoh_host *host = mmc_priv(mmc);
341 dev_dbg(host->dev, "set_ios\n");
343 if (ios->power_mode == MMC_POWER_ON) {
344 sdricoh_writel(host, R228_POWER, 0xc0e0);
346 if (ios->bus_width == MMC_BUS_WIDTH_4) {
347 sdricoh_writel(host, R224_MODE, 0x2000300);
348 sdricoh_writel(host, R228_POWER, 0x40e0);
350 sdricoh_writel(host, R224_MODE, 0x2000340);
353 } else if (ios->power_mode == MMC_POWER_UP) {
354 sdricoh_writel(host, R224_MODE, 0x2000320);
355 sdricoh_writel(host, R228_POWER, 0xe0);
359 static int sdricoh_get_ro(struct mmc_host *mmc)
361 struct sdricoh_host *host = mmc_priv(mmc);
364 status = sdricoh_readl(host, R21C_STATUS);
365 sdricoh_writel(host, R2E4_STATUS_RESP, status);
367 /* some notebooks seem to have the locked flag switched */
369 return !(status & STATUS_CARD_LOCKED);
371 return (status & STATUS_CARD_LOCKED);
374 static const struct mmc_host_ops sdricoh_ops = {
375 .request = sdricoh_request,
376 .set_ios = sdricoh_set_ios,
377 .get_ro = sdricoh_get_ro,
380 /* initialize the control and register it to the mmc framework */
381 static int sdricoh_init_mmc(struct pci_dev *pci_dev,
382 struct pcmcia_device *pcmcia_dev)
385 void __iomem *iobase;
386 struct mmc_host *mmc;
387 struct sdricoh_host *host;
388 struct device *dev = &pcmcia_dev->dev;
390 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
391 SDRICOH_PCI_REGION_SIZE) {
392 dev_dbg(dev, "unexpected pci resource len\n");
396 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
398 dev_err(dev, "unable to map iobase\n");
402 if (readl(iobase + R104_VERSION) != 0x4000) {
403 dev_dbg(dev, "no supported mmc controller found\n");
407 /* allocate privdata */
408 mmc = pcmcia_dev->priv =
409 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
411 dev_err(dev, "mmc_alloc_host failed\n");
415 host = mmc_priv(mmc);
417 host->iobase = iobase;
419 host->pci_dev = pci_dev;
421 mmc->ops = &sdricoh_ops;
423 /* FIXME: frequency and voltage handling is done by the controller
426 mmc->f_max = 24000000;
427 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
428 mmc->caps |= MMC_CAP_4_BIT_DATA;
430 mmc->max_seg_size = 1024 * 512;
431 mmc->max_blk_size = 512;
433 /* reset the controller */
434 if (sdricoh_reset(host)) {
435 dev_dbg(dev, "could not reset\n");
440 result = mmc_add_host(mmc);
443 dev_dbg(dev, "mmc host registered\n");
449 pci_iounmap(pci_dev, iobase);
453 /* search for supported mmc controllers */
454 static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
456 struct pci_dev *pci_dev = NULL;
458 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
459 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
461 /* search pci cardbus bridge that contains the mmc controller */
462 /* the io region is already claimed by yenta_socket... */
464 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
466 /* try to init the device */
467 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
468 dev_info(&pcmcia_dev->dev, "MMC controller found\n");
473 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
477 static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
479 struct mmc_host *mmc = link->priv;
481 dev_dbg(&link->dev, "detach\n");
483 /* remove mmc host */
485 struct sdricoh_host *host = mmc_priv(mmc);
486 mmc_remove_host(mmc);
487 pci_iounmap(host->pci_dev, host->iobase);
488 pci_dev_put(host->pci_dev);
491 pcmcia_disable_device(link);
496 static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
498 dev_dbg(&link->dev, "suspend\n");
502 static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
504 struct mmc_host *mmc = link->priv;
505 dev_dbg(&link->dev, "resume\n");
506 sdricoh_reset(mmc_priv(mmc));
510 #define sdricoh_pcmcia_suspend NULL
511 #define sdricoh_pcmcia_resume NULL
514 static struct pcmcia_driver sdricoh_driver = {
516 .probe = sdricoh_pcmcia_probe,
517 .remove = sdricoh_pcmcia_detach,
518 .id_table = pcmcia_ids,
519 .suspend = sdricoh_pcmcia_suspend,
520 .resume = sdricoh_pcmcia_resume,
522 module_pcmcia_driver(sdricoh_driver);
524 module_param(switchlocked, uint, 0444);
526 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
527 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
528 MODULE_LICENSE("GPL");
530 MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
531 "Use this when unlocked cards are shown readonly (default 0)");