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mmc: sh_mobile_sdhi: Add r7s72100 support
[linux.git] / drivers / mmc / host / sh_mobile_sdhi.c
1 /*
2  * SuperH Mobile SDHI
3  *
4  * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5  * Copyright (C) 2015-16 Renesas Electronics Corporation
6  * Copyright (C) 2009 Magnus Damm
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Based on "Compaq ASIC3 support":
13  *
14  * Copyright 2001 Compaq Computer Corporation.
15  * Copyright 2004-2005 Phil Blundell
16  * Copyright 2007-2008 OpenedHand Ltd.
17  *
18  * Authors: Phil Blundell <pb@handhelds.org>,
19  *          Samuel Ortiz <sameo@openedhand.com>
20  *
21  */
22
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/slab.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/platform_device.h>
30 #include <linux/mmc/host.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/sh_dma.h>
33 #include <linux/delay.h>
34 #include <linux/pinctrl/consumer.h>
35 #include <linux/pinctrl/pinctrl-state.h>
36 #include <linux/regulator/consumer.h>
37
38 #include "tmio_mmc.h"
39
40 #define EXT_ACC           0xe4
41
42 #define SDHI_VER_GEN2_SDR50     0x490c
43 /* very old datasheets said 0x490c for SDR104, too. They are wrong! */
44 #define SDHI_VER_GEN2_SDR104    0xcb0d
45 #define SDHI_VER_GEN3_SD        0xcc10
46 #define SDHI_VER_GEN3_SDMMC     0xcd10
47
48 #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
49
50 struct sh_mobile_sdhi_of_data {
51         unsigned long tmio_flags;
52         u32           tmio_ocr_mask;
53         unsigned long capabilities;
54         unsigned long capabilities2;
55         enum dma_slave_buswidth dma_buswidth;
56         dma_addr_t dma_rx_offset;
57         unsigned bus_shift;
58 };
59
60 static const struct sh_mobile_sdhi_of_data of_default_cfg = {
61         .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
62 };
63
64 static const struct sh_mobile_sdhi_of_data of_rz_compatible = {
65         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
66         .tmio_ocr_mask  = MMC_VDD_32_33,
67         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
68 };
69
70 static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
71         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
72                           TMIO_MMC_CLK_ACTUAL,
73         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
74 };
75
76 static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
77         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
78                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
79         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
80         .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
81         .dma_rx_offset  = 0x2000,
82 };
83
84 static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
85         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
86                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
87         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
88         .bus_shift      = 2,
89 };
90
91 static const struct of_device_id sh_mobile_sdhi_of_match[] = {
92         { .compatible = "renesas,sdhi-shmobile" },
93         { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
94         { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
95         { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
96         { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
97         { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
98         { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
99         { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
100         { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
101         { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
102         { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
103         { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
104         { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
105         { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
106         {},
107 };
108 MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
109
110 struct sh_mobile_sdhi {
111         struct clk *clk;
112         struct tmio_mmc_data mmc_data;
113         struct tmio_mmc_dma dma_priv;
114         struct pinctrl *pinctrl;
115         struct pinctrl_state *pins_default, *pins_uhs;
116 };
117
118 static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
119 {
120         u32 val;
121
122         /*
123          * see also
124          *      sh_mobile_sdhi_of_data :: dma_buswidth
125          */
126         switch (sd_ctrl_read16(host, CTL_VERSION)) {
127         case SDHI_VER_GEN2_SDR50:
128                 val = (width == 32) ? 0x0001 : 0x0000;
129                 break;
130         case SDHI_VER_GEN2_SDR104:
131                 val = (width == 32) ? 0x0000 : 0x0001;
132                 break;
133         case SDHI_VER_GEN3_SD:
134         case SDHI_VER_GEN3_SDMMC:
135                 if (width == 64)
136                         val = 0x0000;
137                 else if (width == 32)
138                         val = 0x0101;
139                 else
140                         val = 0x0001;
141                 break;
142         default:
143                 /* nothing to do */
144                 return;
145         }
146
147         sd_ctrl_write16(host, EXT_ACC, val);
148 }
149
150 static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
151 {
152         struct mmc_host *mmc = host->mmc;
153         struct sh_mobile_sdhi *priv = host_to_priv(host);
154         int ret = clk_prepare_enable(priv->clk);
155         if (ret < 0)
156                 return ret;
157
158         /*
159          * The clock driver may not know what maximum frequency
160          * actually works, so it should be set with the max-frequency
161          * property which will already have been read to f_max.  If it
162          * was missing, assume the current frequency is the maximum.
163          */
164         if (!mmc->f_max)
165                 mmc->f_max = clk_get_rate(priv->clk);
166
167         /*
168          * Minimum frequency is the minimum input clock frequency
169          * divided by our maximum divider.
170          */
171         mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
172
173         /* enable 16bit data access on SDBUF as default */
174         sh_mobile_sdhi_sdbuf_width(host, 16);
175
176         return 0;
177 }
178
179 static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
180                                               unsigned int new_clock)
181 {
182         struct sh_mobile_sdhi *priv = host_to_priv(host);
183         unsigned int freq, diff, best_freq = 0, diff_min = ~0;
184         int i, ret;
185
186         /* tested only on RCar Gen2+ currently; may work for others */
187         if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
188                 return clk_get_rate(priv->clk);
189
190         /*
191          * We want the bus clock to be as close as possible to, but no
192          * greater than, new_clock.  As we can divide by 1 << i for
193          * any i in [0, 9] we want the input clock to be as close as
194          * possible, but no greater than, new_clock << i.
195          */
196         for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
197                 freq = clk_round_rate(priv->clk, new_clock << i);
198                 if (freq > (new_clock << i)) {
199                         /* Too fast; look for a slightly slower option */
200                         freq = clk_round_rate(priv->clk,
201                                               (new_clock << i) / 4 * 3);
202                         if (freq > (new_clock << i))
203                                 continue;
204                 }
205
206                 diff = new_clock - (freq >> i);
207                 if (diff <= diff_min) {
208                         best_freq = freq;
209                         diff_min = diff;
210                 }
211         }
212
213         ret = clk_set_rate(priv->clk, best_freq);
214
215         return ret == 0 ? best_freq : clk_get_rate(priv->clk);
216 }
217
218 static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
219 {
220         struct sh_mobile_sdhi *priv = host_to_priv(host);
221
222         clk_disable_unprepare(priv->clk);
223 }
224
225 static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc)
226 {
227         struct tmio_mmc_host *host = mmc_priv(mmc);
228
229         return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_DAT0);
230 }
231
232 static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
233                                                       struct mmc_ios *ios)
234 {
235         struct tmio_mmc_host *host = mmc_priv(mmc);
236         struct sh_mobile_sdhi *priv = host_to_priv(host);
237         struct pinctrl_state *pin_state;
238         int ret;
239
240         switch (ios->signal_voltage) {
241         case MMC_SIGNAL_VOLTAGE_330:
242                 pin_state = priv->pins_default;
243                 break;
244         case MMC_SIGNAL_VOLTAGE_180:
245                 pin_state = priv->pins_uhs;
246                 break;
247         default:
248                 return -EINVAL;
249         }
250
251         /*
252          * If anything is missing, assume signal voltage is fixed at
253          * 3.3V and succeed/fail accordingly.
254          */
255         if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state))
256                 return ios->signal_voltage ==
257                         MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL;
258
259         ret = mmc_regulator_set_vqmmc(host->mmc, ios);
260         if (ret)
261                 return ret;
262
263         return pinctrl_select_state(priv->pinctrl, pin_state);
264 }
265
266 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
267 {
268         int timeout = 1000;
269
270         while (--timeout && !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS)
271                               & TMIO_STAT_SCLKDIVEN))
272                 udelay(1);
273
274         if (!timeout) {
275                 dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
276                 return -EBUSY;
277         }
278
279         return 0;
280 }
281
282 static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
283 {
284         switch (addr)
285         {
286         case CTL_SD_CMD:
287         case CTL_STOP_INTERNAL_ACTION:
288         case CTL_XFER_BLK_COUNT:
289         case CTL_SD_CARD_CLK_CTL:
290         case CTL_SD_XFER_LEN:
291         case CTL_SD_MEM_CARD_OPT:
292         case CTL_TRANSACTION_CTL:
293         case CTL_DMA_ENABLE:
294         case EXT_ACC:
295                 return sh_mobile_sdhi_wait_idle(host);
296         }
297
298         return 0;
299 }
300
301 static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
302                                          unsigned int direction, int blk_size)
303 {
304         /*
305          * In Renesas controllers, when performing a
306          * multiple block read of one or two blocks,
307          * depending on the timing with which the
308          * response register is read, the response
309          * value may not be read properly.
310          * Use single block read for this HW bug
311          */
312         if ((direction == MMC_DATA_READ) &&
313             blk_size == 2)
314                 return 1;
315
316         return blk_size;
317 }
318
319 static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
320 {
321         sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
322
323         /* enable 32bit access if DMA mode if possibile */
324         sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
325 }
326
327 static int sh_mobile_sdhi_probe(struct platform_device *pdev)
328 {
329         const struct of_device_id *of_id =
330                 of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
331         struct sh_mobile_sdhi *priv;
332         struct tmio_mmc_data *mmc_data;
333         struct tmio_mmc_data *mmd = pdev->dev.platform_data;
334         struct tmio_mmc_host *host;
335         struct resource *res;
336         int irq, ret, i = 0;
337         struct tmio_mmc_dma *dma_priv;
338
339         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
340         if (!res)
341                 return -EINVAL;
342
343         priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
344         if (!priv)
345                 return -ENOMEM;
346
347         mmc_data = &priv->mmc_data;
348         dma_priv = &priv->dma_priv;
349
350         priv->clk = devm_clk_get(&pdev->dev, NULL);
351         if (IS_ERR(priv->clk)) {
352                 ret = PTR_ERR(priv->clk);
353                 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
354                 goto eprobe;
355         }
356
357         priv->pinctrl = devm_pinctrl_get(&pdev->dev);
358         if (!IS_ERR(priv->pinctrl)) {
359                 priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
360                                                 PINCTRL_STATE_DEFAULT);
361                 priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl,
362                                                 "state_uhs");
363         }
364
365         host = tmio_mmc_host_alloc(pdev);
366         if (!host) {
367                 ret = -ENOMEM;
368                 goto eprobe;
369         }
370
371         if (of_id && of_id->data) {
372                 const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
373
374                 mmc_data->flags |= of_data->tmio_flags;
375                 mmc_data->ocr_mask = of_data->tmio_ocr_mask;
376                 mmc_data->capabilities |= of_data->capabilities;
377                 mmc_data->capabilities2 |= of_data->capabilities2;
378                 mmc_data->dma_rx_offset = of_data->dma_rx_offset;
379                 dma_priv->dma_buswidth = of_data->dma_buswidth;
380                 host->bus_shift = of_data->bus_shift;
381         }
382
383         host->dma               = dma_priv;
384         host->write16_hook      = sh_mobile_sdhi_write16_hook;
385         host->clk_enable        = sh_mobile_sdhi_clk_enable;
386         host->clk_update        = sh_mobile_sdhi_clk_update;
387         host->clk_disable       = sh_mobile_sdhi_clk_disable;
388         host->multi_io_quirk    = sh_mobile_sdhi_multi_io_quirk;
389
390         /* SDR speeds are only available on Gen2+ */
391         if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
392                 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
393                 host->card_busy = sh_mobile_sdhi_card_busy;
394                 host->start_signal_voltage_switch =
395                         sh_mobile_sdhi_start_signal_voltage_switch;
396         }
397
398         /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
399         if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
400                 host->bus_shift = 1;
401
402         if (mmd)
403                 *mmc_data = *mmd;
404
405         dma_priv->filter = shdma_chan_filter;
406         dma_priv->enable = sh_mobile_sdhi_enable_dma;
407
408         mmc_data->alignment_shift = 1; /* 2-byte alignment */
409         mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
410
411         /*
412          * All SDHI blocks support 2-byte and larger block sizes in 4-bit
413          * bus width mode.
414          */
415         mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
416
417         /*
418          * All SDHI blocks support SDIO IRQ signalling.
419          */
420         mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
421
422         /*
423          * All SDHI have CMD12 controll bit
424          */
425         mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
426
427         /*
428          * All SDHI need SDIO_INFO1 reserved bit
429          */
430         mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
431
432         ret = tmio_mmc_host_probe(host, mmc_data);
433         if (ret < 0)
434                 goto efree;
435
436         while (1) {
437                 irq = platform_get_irq(pdev, i);
438                 if (irq < 0)
439                         break;
440                 i++;
441                 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
442                                   dev_name(&pdev->dev), host);
443                 if (ret)
444                         goto eirq;
445         }
446
447         /* There must be at least one IRQ source */
448         if (!i) {
449                 ret = irq;
450                 goto eirq;
451         }
452
453         dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
454                  mmc_hostname(host->mmc), (unsigned long)
455                  (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
456                  host->mmc->f_max / 1000000);
457
458         return ret;
459
460 eirq:
461         tmio_mmc_host_remove(host);
462 efree:
463         tmio_mmc_host_free(host);
464 eprobe:
465         return ret;
466 }
467
468 static int sh_mobile_sdhi_remove(struct platform_device *pdev)
469 {
470         struct mmc_host *mmc = platform_get_drvdata(pdev);
471         struct tmio_mmc_host *host = mmc_priv(mmc);
472
473         tmio_mmc_host_remove(host);
474
475         return 0;
476 }
477
478 static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
479         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
480                         pm_runtime_force_resume)
481         SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
482                         tmio_mmc_host_runtime_resume,
483                         NULL)
484 };
485
486 static struct platform_driver sh_mobile_sdhi_driver = {
487         .driver         = {
488                 .name   = "sh_mobile_sdhi",
489                 .pm     = &tmio_mmc_dev_pm_ops,
490                 .of_match_table = sh_mobile_sdhi_of_match,
491         },
492         .probe          = sh_mobile_sdhi_probe,
493         .remove         = sh_mobile_sdhi_remove,
494 };
495
496 module_platform_driver(sh_mobile_sdhi_driver);
497
498 MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
499 MODULE_AUTHOR("Magnus Damm");
500 MODULE_LICENSE("GPL v2");
501 MODULE_ALIAS("platform:sh_mobile_sdhi");