2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
4 * Author: Mike Lavender, mike@steroidmicros.com
6 * Copyright (c) 2005, Intec Automation Inc.
8 * Some parts are based on lart.c by Abraham Van Der Merwe
10 * Cleaned up and generalized based on mtd_dataflash.c
12 * This code is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/err.h>
19 #include <linux/errno.h>
20 #include <linux/module.h>
21 #include <linux/device.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
26 #include <linux/spi/spi.h>
27 #include <linux/spi/flash.h>
28 #include <linux/mtd/spi-nor.h>
30 #define MAX_CMD_SIZE 6
32 struct spi_device *spi;
33 struct spi_nor spi_nor;
34 u8 command[MAX_CMD_SIZE];
37 static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
39 struct m25p *flash = nor->priv;
40 struct spi_device *spi = flash->spi;
43 ret = spi_write_then_read(spi, &code, 1, val, len);
45 dev_err(&spi->dev, "error %d reading %x\n", ret, code);
50 static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
52 /* opcode is in cmd[0] */
53 cmd[1] = addr >> (nor->addr_width * 8 - 8);
54 cmd[2] = addr >> (nor->addr_width * 8 - 16);
55 cmd[3] = addr >> (nor->addr_width * 8 - 24);
56 cmd[4] = addr >> (nor->addr_width * 8 - 32);
59 static int m25p_cmdsz(struct spi_nor *nor)
61 return 1 + nor->addr_width;
64 static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
66 struct m25p *flash = nor->priv;
67 struct spi_device *spi = flash->spi;
69 flash->command[0] = opcode;
71 memcpy(&flash->command[1], buf, len);
73 return spi_write(spi, flash->command, len + 1);
76 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
79 struct m25p *flash = nor->priv;
80 struct spi_device *spi = flash->spi;
81 struct spi_transfer t[2] = {};
83 int cmd_sz = m25p_cmdsz(nor);
88 if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
91 flash->command[0] = nor->program_opcode;
92 m25p_addr2cmd(nor, to, flash->command);
94 t[0].tx_buf = flash->command;
96 spi_message_add_tail(&t[0], &m);
100 spi_message_add_tail(&t[1], &m);
102 ret = spi_sync(spi, &m);
106 ret = m.actual_length - cmd_sz;
112 static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
114 switch (nor->flash_read) {
125 * Read an address range from the nor chip. The address range
126 * may be any size provided it is within the physical boundaries.
128 static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
131 struct m25p *flash = nor->priv;
132 struct spi_device *spi = flash->spi;
133 struct spi_transfer t[2];
134 struct spi_message m;
135 unsigned int dummy = nor->read_dummy;
138 /* convert the dummy cycles to the number of bytes */
141 if (spi_flash_read_supported(spi)) {
142 struct spi_flash_read_message msg;
144 memset(&msg, 0, sizeof(msg));
149 msg.read_opcode = nor->read_opcode;
150 msg.addr_width = nor->addr_width;
151 msg.dummy_bytes = dummy;
152 /* TODO: Support other combinations */
153 msg.opcode_nbits = SPI_NBITS_SINGLE;
154 msg.addr_nbits = SPI_NBITS_SINGLE;
155 msg.data_nbits = m25p80_rx_nbits(nor);
157 ret = spi_flash_read(spi, &msg);
163 spi_message_init(&m);
164 memset(t, 0, (sizeof t));
166 flash->command[0] = nor->read_opcode;
167 m25p_addr2cmd(nor, from, flash->command);
169 t[0].tx_buf = flash->command;
170 t[0].len = m25p_cmdsz(nor) + dummy;
171 spi_message_add_tail(&t[0], &m);
174 t[1].rx_nbits = m25p80_rx_nbits(nor);
175 t[1].len = min3(len, spi_max_transfer_size(spi),
176 spi_max_message_size(spi) - t[0].len);
177 spi_message_add_tail(&t[1], &m);
179 ret = spi_sync(spi, &m);
183 ret = m.actual_length - m25p_cmdsz(nor) - dummy;
190 * board specific setup should have ensured the SPI clock used here
191 * matches what the READ command supports, at least until this driver
192 * understands FAST_READ (for clocks over 25 MHz).
194 static int m25p_probe(struct spi_device *spi)
196 struct flash_platform_data *data;
199 enum read_mode mode = SPI_NOR_NORMAL;
203 data = dev_get_platdata(&spi->dev);
205 flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
209 nor = &flash->spi_nor;
211 /* install the hooks */
212 nor->read = m25p80_read;
213 nor->write = m25p80_write;
214 nor->write_reg = m25p80_write_reg;
215 nor->read_reg = m25p80_read_reg;
217 nor->dev = &spi->dev;
218 spi_nor_set_flash_node(nor, spi->dev.of_node);
221 spi_set_drvdata(spi, flash);
224 if (spi->mode & SPI_RX_QUAD)
226 else if (spi->mode & SPI_RX_DUAL)
229 if (data && data->name)
230 nor->mtd.name = data->name;
232 /* For some (historical?) reason many platforms provide two different
233 * names in flash_platform_data: "name" and "type". Quite often name is
234 * set to "m25p80" and then "type" provides a real chip name.
235 * If that's the case, respect "type" and ignore a "name".
237 if (data && data->type)
238 flash_name = data->type;
239 else if (!strcmp(spi->modalias, "spi-nor"))
240 flash_name = NULL; /* auto-detect */
242 flash_name = spi->modalias;
244 ret = spi_nor_scan(nor, flash_name, mode);
248 return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
249 data ? data->nr_parts : 0);
253 static int m25p_remove(struct spi_device *spi)
255 struct m25p *flash = spi_get_drvdata(spi);
257 /* Clean up MTD stuff. */
258 return mtd_device_unregister(&flash->spi_nor.mtd);
262 * Do NOT add to this array without reading the following:
264 * Historically, many flash devices are bound to this driver by their name. But
265 * since most of these flash are compatible to some extent, and their
266 * differences can often be differentiated by the JEDEC read-ID command, we
267 * encourage new users to add support to the spi-nor library, and simply bind
268 * against a generic string here (e.g., "jedec,spi-nor").
270 * Many flash names are kept here in this list (as well as in spi-nor.c) to
271 * keep them available as module aliases for existing platforms.
273 static const struct spi_device_id m25p_ids[] = {
275 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
276 * hack around the fact that the SPI core does not provide uevent
277 * matching for .of_match_table
282 * Entries not used in DTs that should be safe to drop after replacing
283 * them with "spi-nor" in platform data.
285 {"s25sl064a"}, {"w25x16"}, {"m25p10"}, {"m25px64"},
288 * Entries that were used in DTs without "jedec,spi-nor" fallback and
289 * should be kept for backward compatibility.
291 {"at25df321a"}, {"at25df641"}, {"at26df081a"},
292 {"mx25l4005a"}, {"mx25l1606e"}, {"mx25l6405d"}, {"mx25l12805d"},
293 {"mx25l25635e"},{"mx66l51235l"},
294 {"n25q064"}, {"n25q128a11"}, {"n25q128a13"}, {"n25q512a"},
295 {"s25fl256s1"}, {"s25fl512s"}, {"s25sl12801"}, {"s25fl008k"},
297 {"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
298 {"m25p40"}, {"m25p80"}, {"m25p16"}, {"m25p32"},
299 {"m25p64"}, {"m25p128"},
300 {"w25x80"}, {"w25x32"}, {"w25q32"}, {"w25q32dw"},
301 {"w25q80bl"}, {"w25q128"}, {"w25q256"},
303 /* Flashes that can't be detected using JEDEC */
304 {"m25p05-nonjedec"}, {"m25p10-nonjedec"}, {"m25p20-nonjedec"},
305 {"m25p40-nonjedec"}, {"m25p80-nonjedec"}, {"m25p16-nonjedec"},
306 {"m25p32-nonjedec"}, {"m25p64-nonjedec"}, {"m25p128-nonjedec"},
308 /* Everspin MRAMs (non-JEDEC) */
309 { "mr25h256" }, /* 256 Kib, 40 MHz */
310 { "mr25h10" }, /* 1 Mib, 40 MHz */
311 { "mr25h40" }, /* 4 Mib, 40 MHz */
315 MODULE_DEVICE_TABLE(spi, m25p_ids);
317 static const struct of_device_id m25p_of_table[] = {
319 * Generic compatibility for SPI NOR that can be identified by the
320 * JEDEC READ ID opcode (0x9F). Use this, if possible.
322 { .compatible = "jedec,spi-nor" },
325 MODULE_DEVICE_TABLE(of, m25p_of_table);
327 static struct spi_driver m25p80_driver = {
330 .of_match_table = m25p_of_table,
332 .id_table = m25p_ids,
334 .remove = m25p_remove,
336 /* REVISIT: many of these chips have deep power-down modes, which
337 * should clearly be entered on suspend() to minimize power use.
338 * And also when they're otherwise idle...
342 module_spi_driver(m25p80_driver);
344 MODULE_LICENSE("GPL");
345 MODULE_AUTHOR("Mike Lavender");
346 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");