2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/numa.h>
43 #include <linux/pci.h>
44 #include <linux/utsname.h>
45 #include <linux/version.h>
46 #include <linux/vmalloc.h>
49 #include "ena_netdev.h"
50 #include "ena_pci_id_tbl.h"
52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
55 MODULE_DESCRIPTION(DEVICE_NAME);
56 MODULE_LICENSE("GPL");
57 MODULE_VERSION(DRV_MODULE_VERSION);
59 /* Time in jiffies before concluding the transmitter is hung. */
60 #define TX_TIMEOUT (5 * HZ)
62 #define ENA_NAPI_BUDGET 64
64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
65 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
66 static int debug = -1;
67 module_param(debug, int, 0);
68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70 static struct ena_aenq_handlers aenq_handlers;
72 static struct workqueue_struct *ena_wq;
74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
76 static int ena_rss_init_default(struct ena_adapter *adapter);
77 static void check_for_admin_com_state(struct ena_adapter *adapter);
78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
79 static int ena_restore_device(struct ena_adapter *adapter);
81 static void ena_tx_timeout(struct net_device *dev)
83 struct ena_adapter *adapter = netdev_priv(dev);
85 /* Change the state of the device to trigger reset
86 * Check that we are not in the middle or a trigger already
89 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
92 adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
93 u64_stats_update_begin(&adapter->syncp);
94 adapter->dev_stats.tx_timeout++;
95 u64_stats_update_end(&adapter->syncp);
97 netif_err(adapter, tx_err, dev, "Transmit time out\n");
100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
104 for (i = 0; i < adapter->num_queues; i++)
105 adapter->rx_ring[i].mtu = mtu;
108 static int ena_change_mtu(struct net_device *dev, int new_mtu)
110 struct ena_adapter *adapter = netdev_priv(dev);
113 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
115 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
116 update_rx_ring_mtu(adapter, new_mtu);
119 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
128 #ifdef CONFIG_RFS_ACCEL
132 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
133 if (!adapter->netdev->rx_cpu_rmap)
135 for (i = 0; i < adapter->num_queues; i++) {
136 int irq_idx = ENA_IO_IRQ_IDX(i);
138 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
139 pci_irq_vector(adapter->pdev, irq_idx));
141 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
142 adapter->netdev->rx_cpu_rmap = NULL;
146 #endif /* CONFIG_RFS_ACCEL */
150 static void ena_init_io_rings_common(struct ena_adapter *adapter,
151 struct ena_ring *ring, u16 qid)
154 ring->pdev = adapter->pdev;
155 ring->dev = &adapter->pdev->dev;
156 ring->netdev = adapter->netdev;
157 ring->napi = &adapter->ena_napi[qid].napi;
158 ring->adapter = adapter;
159 ring->ena_dev = adapter->ena_dev;
160 ring->per_napi_packets = 0;
162 ring->first_interrupt = false;
163 ring->no_interrupt_event_cnt = 0;
164 u64_stats_init(&ring->syncp);
167 static void ena_init_io_rings(struct ena_adapter *adapter)
169 struct ena_com_dev *ena_dev;
170 struct ena_ring *txr, *rxr;
173 ena_dev = adapter->ena_dev;
175 for (i = 0; i < adapter->num_queues; i++) {
176 txr = &adapter->tx_ring[i];
177 rxr = &adapter->rx_ring[i];
179 /* TX/RX common ring state */
180 ena_init_io_rings_common(adapter, txr, i);
181 ena_init_io_rings_common(adapter, rxr, i);
183 /* TX specific ring state */
184 txr->ring_size = adapter->requested_tx_ring_size;
185 txr->tx_max_header_size = ena_dev->tx_max_header_size;
186 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
187 txr->sgl_size = adapter->max_tx_sgl_size;
188 txr->smoothed_interval =
189 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
191 /* RX specific ring state */
192 rxr->ring_size = adapter->requested_rx_ring_size;
193 rxr->rx_copybreak = adapter->rx_copybreak;
194 rxr->sgl_size = adapter->max_rx_sgl_size;
195 rxr->smoothed_interval =
196 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
197 rxr->empty_rx_queue = 0;
198 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
202 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
203 * @adapter: network interface device structure
206 * Return 0 on success, negative on failure
208 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
210 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
211 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
214 if (tx_ring->tx_buffer_info) {
215 netif_err(adapter, ifup,
216 adapter->netdev, "tx_buffer_info info is not NULL");
220 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
221 node = cpu_to_node(ena_irq->cpu);
223 tx_ring->tx_buffer_info = vzalloc_node(size, node);
224 if (!tx_ring->tx_buffer_info) {
225 tx_ring->tx_buffer_info = vzalloc(size);
226 if (!tx_ring->tx_buffer_info)
227 goto err_tx_buffer_info;
230 size = sizeof(u16) * tx_ring->ring_size;
231 tx_ring->free_ids = vzalloc_node(size, node);
232 if (!tx_ring->free_ids) {
233 tx_ring->free_ids = vzalloc(size);
234 if (!tx_ring->free_ids)
235 goto err_tx_free_ids;
238 size = tx_ring->tx_max_header_size;
239 tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
240 if (!tx_ring->push_buf_intermediate_buf) {
241 tx_ring->push_buf_intermediate_buf = vzalloc(size);
242 if (!tx_ring->push_buf_intermediate_buf)
243 goto err_push_buf_intermediate_buf;
246 /* Req id ring for TX out of order completions */
247 for (i = 0; i < tx_ring->ring_size; i++)
248 tx_ring->free_ids[i] = i;
250 /* Reset tx statistics */
251 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
253 tx_ring->next_to_use = 0;
254 tx_ring->next_to_clean = 0;
255 tx_ring->cpu = ena_irq->cpu;
258 err_push_buf_intermediate_buf:
259 vfree(tx_ring->free_ids);
260 tx_ring->free_ids = NULL;
262 vfree(tx_ring->tx_buffer_info);
263 tx_ring->tx_buffer_info = NULL;
268 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
269 * @adapter: network interface device structure
272 * Free all transmit software resources
274 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
276 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
278 vfree(tx_ring->tx_buffer_info);
279 tx_ring->tx_buffer_info = NULL;
281 vfree(tx_ring->free_ids);
282 tx_ring->free_ids = NULL;
284 vfree(tx_ring->push_buf_intermediate_buf);
285 tx_ring->push_buf_intermediate_buf = NULL;
288 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
289 * @adapter: private structure
291 * Return 0 on success, negative on failure
293 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
297 for (i = 0; i < adapter->num_queues; i++) {
298 rc = ena_setup_tx_resources(adapter, i);
307 netif_err(adapter, ifup, adapter->netdev,
308 "Tx queue %d: allocation failed\n", i);
310 /* rewind the index freeing the rings as we go */
312 ena_free_tx_resources(adapter, i);
316 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
317 * @adapter: board private structure
319 * Free all transmit software resources
321 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
325 for (i = 0; i < adapter->num_queues; i++)
326 ena_free_tx_resources(adapter, i);
329 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
331 if (likely(req_id < rx_ring->ring_size))
334 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
335 "Invalid rx req_id: %hu\n", req_id);
337 u64_stats_update_begin(&rx_ring->syncp);
338 rx_ring->rx_stats.bad_req_id++;
339 u64_stats_update_end(&rx_ring->syncp);
341 /* Trigger device reset */
342 rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
343 set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
347 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
348 * @adapter: network interface device structure
351 * Returns 0 on success, negative on failure
353 static int ena_setup_rx_resources(struct ena_adapter *adapter,
356 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
357 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
360 if (rx_ring->rx_buffer_info) {
361 netif_err(adapter, ifup, adapter->netdev,
362 "rx_buffer_info is not NULL");
366 /* alloc extra element so in rx path
367 * we can always prefetch rx_info + 1
369 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
370 node = cpu_to_node(ena_irq->cpu);
372 rx_ring->rx_buffer_info = vzalloc_node(size, node);
373 if (!rx_ring->rx_buffer_info) {
374 rx_ring->rx_buffer_info = vzalloc(size);
375 if (!rx_ring->rx_buffer_info)
379 size = sizeof(u16) * rx_ring->ring_size;
380 rx_ring->free_ids = vzalloc_node(size, node);
381 if (!rx_ring->free_ids) {
382 rx_ring->free_ids = vzalloc(size);
383 if (!rx_ring->free_ids) {
384 vfree(rx_ring->rx_buffer_info);
385 rx_ring->rx_buffer_info = NULL;
390 /* Req id ring for receiving RX pkts out of order */
391 for (i = 0; i < rx_ring->ring_size; i++)
392 rx_ring->free_ids[i] = i;
394 /* Reset rx statistics */
395 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
397 rx_ring->next_to_clean = 0;
398 rx_ring->next_to_use = 0;
399 rx_ring->cpu = ena_irq->cpu;
404 /* ena_free_rx_resources - Free I/O Rx Resources
405 * @adapter: network interface device structure
408 * Free all receive software resources
410 static void ena_free_rx_resources(struct ena_adapter *adapter,
413 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
415 vfree(rx_ring->rx_buffer_info);
416 rx_ring->rx_buffer_info = NULL;
418 vfree(rx_ring->free_ids);
419 rx_ring->free_ids = NULL;
422 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
423 * @adapter: board private structure
425 * Return 0 on success, negative on failure
427 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
431 for (i = 0; i < adapter->num_queues; i++) {
432 rc = ena_setup_rx_resources(adapter, i);
441 netif_err(adapter, ifup, adapter->netdev,
442 "Rx queue %d: allocation failed\n", i);
444 /* rewind the index freeing the rings as we go */
446 ena_free_rx_resources(adapter, i);
450 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
451 * @adapter: board private structure
453 * Free all receive software resources
455 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
459 for (i = 0; i < adapter->num_queues; i++)
460 ena_free_rx_resources(adapter, i);
463 static int ena_alloc_rx_page(struct ena_ring *rx_ring,
464 struct ena_rx_buffer *rx_info, gfp_t gfp)
466 struct ena_com_buf *ena_buf;
470 /* if previous allocated page is not used */
471 if (unlikely(rx_info->page))
474 page = alloc_page(gfp);
475 if (unlikely(!page)) {
476 u64_stats_update_begin(&rx_ring->syncp);
477 rx_ring->rx_stats.page_alloc_fail++;
478 u64_stats_update_end(&rx_ring->syncp);
482 dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
484 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
485 u64_stats_update_begin(&rx_ring->syncp);
486 rx_ring->rx_stats.dma_mapping_err++;
487 u64_stats_update_end(&rx_ring->syncp);
492 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
493 "alloc page %p, rx_info %p\n", page, rx_info);
495 rx_info->page = page;
496 rx_info->page_offset = 0;
497 ena_buf = &rx_info->ena_buf;
498 ena_buf->paddr = dma;
499 ena_buf->len = ENA_PAGE_SIZE;
504 static void ena_free_rx_page(struct ena_ring *rx_ring,
505 struct ena_rx_buffer *rx_info)
507 struct page *page = rx_info->page;
508 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
510 if (unlikely(!page)) {
511 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
512 "Trying to free unallocated buffer\n");
516 dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE,
520 rx_info->page = NULL;
523 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
525 u16 next_to_use, req_id;
529 next_to_use = rx_ring->next_to_use;
531 for (i = 0; i < num; i++) {
532 struct ena_rx_buffer *rx_info;
534 req_id = rx_ring->free_ids[next_to_use];
535 rc = validate_rx_req_id(rx_ring, req_id);
536 if (unlikely(rc < 0))
539 rx_info = &rx_ring->rx_buffer_info[req_id];
542 rc = ena_alloc_rx_page(rx_ring, rx_info,
543 GFP_ATOMIC | __GFP_COMP);
544 if (unlikely(rc < 0)) {
545 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
546 "failed to alloc buffer for rx queue %d\n",
550 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
554 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
555 "failed to add buffer for rx queue %d\n",
559 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
563 if (unlikely(i < num)) {
564 u64_stats_update_begin(&rx_ring->syncp);
565 rx_ring->rx_stats.refil_partial++;
566 u64_stats_update_end(&rx_ring->syncp);
567 netdev_warn(rx_ring->netdev,
568 "refilled rx qid %d with only %d buffers (from %d)\n",
569 rx_ring->qid, i, num);
572 /* ena_com_write_sq_doorbell issues a wmb() */
574 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
576 rx_ring->next_to_use = next_to_use;
581 static void ena_free_rx_bufs(struct ena_adapter *adapter,
584 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
587 for (i = 0; i < rx_ring->ring_size; i++) {
588 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
591 ena_free_rx_page(rx_ring, rx_info);
595 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
596 * @adapter: board private structure
598 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
600 struct ena_ring *rx_ring;
603 for (i = 0; i < adapter->num_queues; i++) {
604 rx_ring = &adapter->rx_ring[i];
605 bufs_num = rx_ring->ring_size - 1;
606 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
608 if (unlikely(rc != bufs_num))
609 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
610 "refilling Queue %d failed. allocated %d buffers from: %d\n",
615 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
619 for (i = 0; i < adapter->num_queues; i++)
620 ena_free_rx_bufs(adapter, i);
623 static void ena_unmap_tx_skb(struct ena_ring *tx_ring,
624 struct ena_tx_buffer *tx_info)
626 struct ena_com_buf *ena_buf;
630 ena_buf = tx_info->bufs;
631 cnt = tx_info->num_of_bufs;
636 if (tx_info->map_linear_data) {
637 dma_unmap_single(tx_ring->dev,
638 dma_unmap_addr(ena_buf, paddr),
639 dma_unmap_len(ena_buf, len),
645 /* unmap remaining mapped pages */
646 for (i = 0; i < cnt; i++) {
647 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
648 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
653 /* ena_free_tx_bufs - Free Tx Buffers per Queue
654 * @tx_ring: TX ring for which buffers be freed
656 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
658 bool print_once = true;
661 for (i = 0; i < tx_ring->ring_size; i++) {
662 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
668 netdev_notice(tx_ring->netdev,
669 "free uncompleted tx skb qid %d idx 0x%x\n",
673 netdev_dbg(tx_ring->netdev,
674 "free uncompleted tx skb qid %d idx 0x%x\n",
678 ena_unmap_tx_skb(tx_ring, tx_info);
680 dev_kfree_skb_any(tx_info->skb);
682 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
686 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
688 struct ena_ring *tx_ring;
691 for (i = 0; i < adapter->num_queues; i++) {
692 tx_ring = &adapter->tx_ring[i];
693 ena_free_tx_bufs(tx_ring);
697 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
702 for (i = 0; i < adapter->num_queues; i++) {
703 ena_qid = ENA_IO_TXQ_IDX(i);
704 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
708 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
713 for (i = 0; i < adapter->num_queues; i++) {
714 ena_qid = ENA_IO_RXQ_IDX(i);
715 cancel_work_sync(&adapter->ena_napi[i].dim.work);
716 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
720 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
722 ena_destroy_all_tx_queues(adapter);
723 ena_destroy_all_rx_queues(adapter);
726 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
728 struct ena_tx_buffer *tx_info = NULL;
730 if (likely(req_id < tx_ring->ring_size)) {
731 tx_info = &tx_ring->tx_buffer_info[req_id];
732 if (likely(tx_info->skb))
737 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
738 "tx_info doesn't have valid skb\n");
740 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
741 "Invalid req_id: %hu\n", req_id);
743 u64_stats_update_begin(&tx_ring->syncp);
744 tx_ring->tx_stats.bad_req_id++;
745 u64_stats_update_end(&tx_ring->syncp);
747 /* Trigger device reset */
748 tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
749 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
753 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
755 struct netdev_queue *txq;
764 next_to_clean = tx_ring->next_to_clean;
765 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
767 while (tx_pkts < budget) {
768 struct ena_tx_buffer *tx_info;
771 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
776 rc = validate_tx_req_id(tx_ring, req_id);
780 tx_info = &tx_ring->tx_buffer_info[req_id];
783 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
787 tx_info->last_jiffies = 0;
789 ena_unmap_tx_skb(tx_ring, tx_info);
791 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
792 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
795 tx_bytes += skb->len;
798 total_done += tx_info->tx_descs;
800 tx_ring->free_ids[next_to_clean] = req_id;
801 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
805 tx_ring->next_to_clean = next_to_clean;
806 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
807 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
809 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
811 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
812 "tx_poll: q %d done. total pkts: %d\n",
813 tx_ring->qid, tx_pkts);
815 /* need to make the rings circular update visible to
816 * ena_start_xmit() before checking for netif_queue_stopped().
820 above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
821 ENA_TX_WAKEUP_THRESH);
822 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
823 __netif_tx_lock(txq, smp_processor_id());
825 ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
826 ENA_TX_WAKEUP_THRESH);
827 if (netif_tx_queue_stopped(txq) && above_thresh) {
828 netif_tx_wake_queue(txq);
829 u64_stats_update_begin(&tx_ring->syncp);
830 tx_ring->tx_stats.queue_wakeup++;
831 u64_stats_update_end(&tx_ring->syncp);
833 __netif_tx_unlock(txq);
839 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
844 skb = napi_get_frags(rx_ring->napi);
846 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
847 rx_ring->rx_copybreak);
849 if (unlikely(!skb)) {
850 u64_stats_update_begin(&rx_ring->syncp);
851 rx_ring->rx_stats.skb_alloc_fail++;
852 u64_stats_update_end(&rx_ring->syncp);
853 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
854 "Failed to allocate skb. frags: %d\n", frags);
861 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
862 struct ena_com_rx_buf_info *ena_bufs,
867 struct ena_rx_buffer *rx_info;
868 u16 len, req_id, buf = 0;
871 len = ena_bufs[buf].len;
872 req_id = ena_bufs[buf].req_id;
873 rx_info = &rx_ring->rx_buffer_info[req_id];
875 if (unlikely(!rx_info->page)) {
876 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
881 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
882 "rx_info %p page %p\n",
883 rx_info, rx_info->page);
885 /* save virt address of first buffer */
886 va = page_address(rx_info->page) + rx_info->page_offset;
887 prefetch(va + NET_IP_ALIGN);
889 if (len <= rx_ring->rx_copybreak) {
890 skb = ena_alloc_skb(rx_ring, false);
894 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
895 "rx allocated small packet. len %d. data_len %d\n",
896 skb->len, skb->data_len);
898 /* sync this buffer for CPU use */
899 dma_sync_single_for_cpu(rx_ring->dev,
900 dma_unmap_addr(&rx_info->ena_buf, paddr),
903 skb_copy_to_linear_data(skb, va, len);
904 dma_sync_single_for_device(rx_ring->dev,
905 dma_unmap_addr(&rx_info->ena_buf, paddr),
910 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
911 rx_ring->free_ids[*next_to_clean] = req_id;
912 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
917 skb = ena_alloc_skb(rx_ring, true);
922 dma_unmap_page(rx_ring->dev,
923 dma_unmap_addr(&rx_info->ena_buf, paddr),
924 ENA_PAGE_SIZE, DMA_FROM_DEVICE);
926 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
927 rx_info->page_offset, len, ENA_PAGE_SIZE);
929 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
930 "rx skb updated. len %d. data_len %d\n",
931 skb->len, skb->data_len);
933 rx_info->page = NULL;
935 rx_ring->free_ids[*next_to_clean] = req_id;
937 ENA_RX_RING_IDX_NEXT(*next_to_clean,
939 if (likely(--descs == 0))
943 len = ena_bufs[buf].len;
944 req_id = ena_bufs[buf].req_id;
945 rx_info = &rx_ring->rx_buffer_info[req_id];
951 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
952 * @adapter: structure containing adapter specific data
953 * @ena_rx_ctx: received packet context/metadata
954 * @skb: skb currently being received and modified
956 static void ena_rx_checksum(struct ena_ring *rx_ring,
957 struct ena_com_rx_ctx *ena_rx_ctx,
960 /* Rx csum disabled */
961 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
962 skb->ip_summed = CHECKSUM_NONE;
966 /* For fragmented packets the checksum isn't valid */
967 if (ena_rx_ctx->frag) {
968 skb->ip_summed = CHECKSUM_NONE;
972 /* if IP and error */
973 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
974 (ena_rx_ctx->l3_csum_err))) {
975 /* ipv4 checksum error */
976 skb->ip_summed = CHECKSUM_NONE;
977 u64_stats_update_begin(&rx_ring->syncp);
978 rx_ring->rx_stats.bad_csum++;
979 u64_stats_update_end(&rx_ring->syncp);
980 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
981 "RX IPv4 header checksum error\n");
986 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
987 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
988 if (unlikely(ena_rx_ctx->l4_csum_err)) {
989 /* TCP/UDP checksum error */
990 u64_stats_update_begin(&rx_ring->syncp);
991 rx_ring->rx_stats.bad_csum++;
992 u64_stats_update_end(&rx_ring->syncp);
993 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
994 "RX L4 checksum error\n");
995 skb->ip_summed = CHECKSUM_NONE;
999 if (likely(ena_rx_ctx->l4_csum_checked)) {
1000 skb->ip_summed = CHECKSUM_UNNECESSARY;
1001 u64_stats_update_begin(&rx_ring->syncp);
1002 rx_ring->rx_stats.csum_good++;
1003 u64_stats_update_end(&rx_ring->syncp);
1005 u64_stats_update_begin(&rx_ring->syncp);
1006 rx_ring->rx_stats.csum_unchecked++;
1007 u64_stats_update_end(&rx_ring->syncp);
1008 skb->ip_summed = CHECKSUM_NONE;
1011 skb->ip_summed = CHECKSUM_NONE;
1017 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1018 struct ena_com_rx_ctx *ena_rx_ctx,
1019 struct sk_buff *skb)
1021 enum pkt_hash_types hash_type;
1023 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1024 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1025 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1027 hash_type = PKT_HASH_TYPE_L4;
1029 hash_type = PKT_HASH_TYPE_NONE;
1031 /* Override hash type if the packet is fragmented */
1032 if (ena_rx_ctx->frag)
1033 hash_type = PKT_HASH_TYPE_NONE;
1035 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1039 /* ena_clean_rx_irq - Cleanup RX irq
1040 * @rx_ring: RX ring to clean
1041 * @napi: napi handler
1042 * @budget: how many packets driver is allowed to clean
1044 * Returns the number of cleaned buffers.
1046 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1049 u16 next_to_clean = rx_ring->next_to_clean;
1050 u32 res_budget, work_done;
1052 struct ena_com_rx_ctx ena_rx_ctx;
1053 struct ena_adapter *adapter;
1054 struct sk_buff *skb;
1055 int refill_required;
1056 int refill_threshold;
1059 int rx_copybreak_pkt = 0;
1062 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1063 "%s qid %d\n", __func__, rx_ring->qid);
1064 res_budget = budget;
1067 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1068 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1069 ena_rx_ctx.descs = 0;
1070 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1071 rx_ring->ena_com_io_sq,
1076 if (unlikely(ena_rx_ctx.descs == 0))
1079 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1080 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1081 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1082 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1084 /* allocate skb and fill it */
1085 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
1088 /* exit if we failed to retrieve a buffer */
1089 if (unlikely(!skb)) {
1090 for (i = 0; i < ena_rx_ctx.descs; i++) {
1091 rx_ring->free_ids[next_to_clean] =
1092 rx_ring->ena_bufs[i].req_id;
1094 ENA_RX_RING_IDX_NEXT(next_to_clean,
1095 rx_ring->ring_size);
1100 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1102 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1104 skb_record_rx_queue(skb, rx_ring->qid);
1106 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1107 total_len += rx_ring->ena_bufs[0].len;
1109 napi_gro_receive(napi, skb);
1111 total_len += skb->len;
1112 napi_gro_frags(napi);
1116 } while (likely(res_budget));
1118 work_done = budget - res_budget;
1119 rx_ring->per_napi_packets += work_done;
1120 u64_stats_update_begin(&rx_ring->syncp);
1121 rx_ring->rx_stats.bytes += total_len;
1122 rx_ring->rx_stats.cnt += work_done;
1123 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1124 u64_stats_update_end(&rx_ring->syncp);
1126 rx_ring->next_to_clean = next_to_clean;
1128 refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1130 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1131 ENA_RX_REFILL_THRESH_PACKET);
1133 /* Optimization, try to batch new rx buffers */
1134 if (refill_required > refill_threshold) {
1135 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1136 ena_refill_rx_bufs(rx_ring, refill_required);
1142 adapter = netdev_priv(rx_ring->netdev);
1144 u64_stats_update_begin(&rx_ring->syncp);
1145 rx_ring->rx_stats.bad_desc_num++;
1146 u64_stats_update_end(&rx_ring->syncp);
1148 /* Too many desc from the device. Trigger reset */
1149 adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1150 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1155 static void ena_dim_work(struct work_struct *w)
1157 struct dim *dim = container_of(w, struct dim, work);
1158 struct dim_cq_moder cur_moder =
1159 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1160 struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1162 ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1163 dim->state = DIM_START_MEASURE;
1166 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1168 struct dim_sample dim_sample;
1169 struct ena_ring *rx_ring = ena_napi->rx_ring;
1171 if (!rx_ring->per_napi_packets)
1174 rx_ring->non_empty_napi_events++;
1176 dim_update_sample(rx_ring->non_empty_napi_events,
1177 rx_ring->rx_stats.cnt,
1178 rx_ring->rx_stats.bytes,
1181 net_dim(&ena_napi->dim, dim_sample);
1183 rx_ring->per_napi_packets = 0;
1186 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1187 struct ena_ring *rx_ring)
1189 struct ena_eth_io_intr_reg intr_reg;
1191 /* Update intr register: rx intr delay,
1192 * tx intr delay and interrupt unmask
1194 ena_com_update_intr_reg(&intr_reg,
1195 rx_ring->smoothed_interval,
1196 tx_ring->smoothed_interval,
1199 /* It is a shared MSI-X.
1200 * Tx and Rx CQ have pointer to it.
1201 * So we use one of them to reach the intr reg
1203 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1206 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1207 struct ena_ring *rx_ring)
1209 int cpu = get_cpu();
1212 /* Check only one ring since the 2 rings are running on the same cpu */
1213 if (likely(tx_ring->cpu == cpu))
1216 numa_node = cpu_to_node(cpu);
1219 if (numa_node != NUMA_NO_NODE) {
1220 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1221 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1232 static int ena_io_poll(struct napi_struct *napi, int budget)
1234 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1235 struct ena_ring *tx_ring, *rx_ring;
1240 int napi_comp_call = 0;
1243 tx_ring = ena_napi->tx_ring;
1244 rx_ring = ena_napi->rx_ring;
1246 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1248 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1249 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1250 napi_complete_done(napi, 0);
1254 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1255 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1257 /* If the device is about to reset or down, avoid unmask
1258 * the interrupt and return 0 so NAPI won't reschedule
1260 if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1261 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1262 napi_complete_done(napi, 0);
1265 } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1268 /* Update numa and unmask the interrupt only when schedule
1269 * from the interrupt context (vs from sk_busy_loop)
1271 if (napi_complete_done(napi, rx_work_done)) {
1272 /* We apply adaptive moderation on Rx path only.
1273 * Tx uses static interrupt moderation.
1275 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1276 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1278 ena_unmask_interrupt(tx_ring, rx_ring);
1281 ena_update_ring_numa_node(tx_ring, rx_ring);
1288 u64_stats_update_begin(&tx_ring->syncp);
1289 tx_ring->tx_stats.napi_comp += napi_comp_call;
1290 tx_ring->tx_stats.tx_poll++;
1291 u64_stats_update_end(&tx_ring->syncp);
1296 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1298 struct ena_adapter *adapter = (struct ena_adapter *)data;
1300 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1302 /* Don't call the aenq handler before probe is done */
1303 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1304 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1309 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1310 * @irq: interrupt number
1311 * @data: pointer to a network interface private napi device structure
1313 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1315 struct ena_napi *ena_napi = data;
1317 ena_napi->tx_ring->first_interrupt = true;
1318 ena_napi->rx_ring->first_interrupt = true;
1320 napi_schedule_irqoff(&ena_napi->napi);
1325 /* Reserve a single MSI-X vector for management (admin + aenq).
1326 * plus reserve one vector for each potential io queue.
1327 * the number of potential io queues is the minimum of what the device
1328 * supports and the number of vCPUs.
1330 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1332 int msix_vecs, irq_cnt;
1334 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1335 netif_err(adapter, probe, adapter->netdev,
1336 "Error, MSI-X is already enabled\n");
1340 /* Reserved the max msix vectors we might need */
1341 msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1342 netif_dbg(adapter, probe, adapter->netdev,
1343 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1345 irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1346 msix_vecs, PCI_IRQ_MSIX);
1349 netif_err(adapter, probe, adapter->netdev,
1350 "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1354 if (irq_cnt != msix_vecs) {
1355 netif_notice(adapter, probe, adapter->netdev,
1356 "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1357 irq_cnt, msix_vecs);
1358 adapter->num_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1361 if (ena_init_rx_cpu_rmap(adapter))
1362 netif_warn(adapter, probe, adapter->netdev,
1363 "Failed to map IRQs to CPUs\n");
1365 adapter->msix_vecs = irq_cnt;
1366 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1371 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1375 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1376 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1377 pci_name(adapter->pdev));
1378 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1379 ena_intr_msix_mgmnt;
1380 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1381 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1382 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1383 cpu = cpumask_first(cpu_online_mask);
1384 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1385 cpumask_set_cpu(cpu,
1386 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1389 static void ena_setup_io_intr(struct ena_adapter *adapter)
1391 struct net_device *netdev;
1392 int irq_idx, i, cpu;
1394 netdev = adapter->netdev;
1396 for (i = 0; i < adapter->num_queues; i++) {
1397 irq_idx = ENA_IO_IRQ_IDX(i);
1398 cpu = i % num_online_cpus();
1400 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1401 "%s-Tx-Rx-%d", netdev->name, i);
1402 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1403 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1404 adapter->irq_tbl[irq_idx].vector =
1405 pci_irq_vector(adapter->pdev, irq_idx);
1406 adapter->irq_tbl[irq_idx].cpu = cpu;
1408 cpumask_set_cpu(cpu,
1409 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1413 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1415 unsigned long flags = 0;
1416 struct ena_irq *irq;
1419 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1420 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1423 netif_err(adapter, probe, adapter->netdev,
1424 "failed to request admin irq\n");
1428 netif_dbg(adapter, probe, adapter->netdev,
1429 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1430 irq->affinity_hint_mask.bits[0], irq->vector);
1432 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1437 static int ena_request_io_irq(struct ena_adapter *adapter)
1439 unsigned long flags = 0;
1440 struct ena_irq *irq;
1443 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1444 netif_err(adapter, ifup, adapter->netdev,
1445 "Failed to request I/O IRQ: MSI-X is not enabled\n");
1449 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1450 irq = &adapter->irq_tbl[i];
1451 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1454 netif_err(adapter, ifup, adapter->netdev,
1455 "Failed to request I/O IRQ. index %d rc %d\n",
1460 netif_dbg(adapter, ifup, adapter->netdev,
1461 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1462 i, irq->affinity_hint_mask.bits[0], irq->vector);
1464 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1470 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1471 irq = &adapter->irq_tbl[k];
1472 free_irq(irq->vector, irq->data);
1478 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1480 struct ena_irq *irq;
1482 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1483 synchronize_irq(irq->vector);
1484 irq_set_affinity_hint(irq->vector, NULL);
1485 free_irq(irq->vector, irq->data);
1488 static void ena_free_io_irq(struct ena_adapter *adapter)
1490 struct ena_irq *irq;
1493 #ifdef CONFIG_RFS_ACCEL
1494 if (adapter->msix_vecs >= 1) {
1495 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1496 adapter->netdev->rx_cpu_rmap = NULL;
1498 #endif /* CONFIG_RFS_ACCEL */
1500 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1501 irq = &adapter->irq_tbl[i];
1502 irq_set_affinity_hint(irq->vector, NULL);
1503 free_irq(irq->vector, irq->data);
1507 static void ena_disable_msix(struct ena_adapter *adapter)
1509 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1510 pci_free_irq_vectors(adapter->pdev);
1513 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1517 if (!netif_running(adapter->netdev))
1520 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1521 synchronize_irq(adapter->irq_tbl[i].vector);
1524 static void ena_del_napi(struct ena_adapter *adapter)
1528 for (i = 0; i < adapter->num_queues; i++)
1529 netif_napi_del(&adapter->ena_napi[i].napi);
1532 static void ena_init_napi(struct ena_adapter *adapter)
1534 struct ena_napi *napi;
1537 for (i = 0; i < adapter->num_queues; i++) {
1538 napi = &adapter->ena_napi[i];
1540 netif_napi_add(adapter->netdev,
1541 &adapter->ena_napi[i].napi,
1544 napi->rx_ring = &adapter->rx_ring[i];
1545 napi->tx_ring = &adapter->tx_ring[i];
1550 static void ena_napi_disable_all(struct ena_adapter *adapter)
1554 for (i = 0; i < adapter->num_queues; i++)
1555 napi_disable(&adapter->ena_napi[i].napi);
1558 static void ena_napi_enable_all(struct ena_adapter *adapter)
1562 for (i = 0; i < adapter->num_queues; i++)
1563 napi_enable(&adapter->ena_napi[i].napi);
1566 static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1568 adapter->tx_usecs = 0;
1569 adapter->rx_usecs = 0;
1570 adapter->tx_frames = 1;
1571 adapter->rx_frames = 1;
1574 /* Configure the Rx forwarding */
1575 static int ena_rss_configure(struct ena_adapter *adapter)
1577 struct ena_com_dev *ena_dev = adapter->ena_dev;
1580 /* In case the RSS table wasn't initialized by probe */
1581 if (!ena_dev->rss.tbl_log_size) {
1582 rc = ena_rss_init_default(adapter);
1583 if (rc && (rc != -EOPNOTSUPP)) {
1584 netif_err(adapter, ifup, adapter->netdev,
1585 "Failed to init RSS rc: %d\n", rc);
1590 /* Set indirect table */
1591 rc = ena_com_indirect_table_set(ena_dev);
1592 if (unlikely(rc && rc != -EOPNOTSUPP))
1595 /* Configure hash function (if supported) */
1596 rc = ena_com_set_hash_function(ena_dev);
1597 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1600 /* Configure hash inputs (if supported) */
1601 rc = ena_com_set_hash_ctrl(ena_dev);
1602 if (unlikely(rc && (rc != -EOPNOTSUPP)))
1608 static int ena_up_complete(struct ena_adapter *adapter)
1612 rc = ena_rss_configure(adapter);
1616 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1618 ena_refill_all_rx_bufs(adapter);
1620 /* enable transmits */
1621 netif_tx_start_all_queues(adapter->netdev);
1623 ena_restore_ethtool_params(adapter);
1625 ena_napi_enable_all(adapter);
1630 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1632 struct ena_com_create_io_ctx ctx;
1633 struct ena_com_dev *ena_dev;
1634 struct ena_ring *tx_ring;
1639 ena_dev = adapter->ena_dev;
1641 tx_ring = &adapter->tx_ring[qid];
1642 msix_vector = ENA_IO_IRQ_IDX(qid);
1643 ena_qid = ENA_IO_TXQ_IDX(qid);
1645 memset(&ctx, 0x0, sizeof(ctx));
1647 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1649 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1650 ctx.msix_vector = msix_vector;
1651 ctx.queue_size = tx_ring->ring_size;
1652 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1654 rc = ena_com_create_io_queue(ena_dev, &ctx);
1656 netif_err(adapter, ifup, adapter->netdev,
1657 "Failed to create I/O TX queue num %d rc: %d\n",
1662 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1663 &tx_ring->ena_com_io_sq,
1664 &tx_ring->ena_com_io_cq);
1666 netif_err(adapter, ifup, adapter->netdev,
1667 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1669 ena_com_destroy_io_queue(ena_dev, ena_qid);
1673 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1677 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1679 struct ena_com_dev *ena_dev = adapter->ena_dev;
1682 for (i = 0; i < adapter->num_queues; i++) {
1683 rc = ena_create_io_tx_queue(adapter, i);
1692 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1697 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1699 struct ena_com_dev *ena_dev;
1700 struct ena_com_create_io_ctx ctx;
1701 struct ena_ring *rx_ring;
1706 ena_dev = adapter->ena_dev;
1708 rx_ring = &adapter->rx_ring[qid];
1709 msix_vector = ENA_IO_IRQ_IDX(qid);
1710 ena_qid = ENA_IO_RXQ_IDX(qid);
1712 memset(&ctx, 0x0, sizeof(ctx));
1715 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1716 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1717 ctx.msix_vector = msix_vector;
1718 ctx.queue_size = rx_ring->ring_size;
1719 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1721 rc = ena_com_create_io_queue(ena_dev, &ctx);
1723 netif_err(adapter, ifup, adapter->netdev,
1724 "Failed to create I/O RX queue num %d rc: %d\n",
1729 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1730 &rx_ring->ena_com_io_sq,
1731 &rx_ring->ena_com_io_cq);
1733 netif_err(adapter, ifup, adapter->netdev,
1734 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1736 ena_com_destroy_io_queue(ena_dev, ena_qid);
1740 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1745 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1747 struct ena_com_dev *ena_dev = adapter->ena_dev;
1750 for (i = 0; i < adapter->num_queues; i++) {
1751 rc = ena_create_io_rx_queue(adapter, i);
1754 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
1761 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1762 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1768 static void set_io_rings_size(struct ena_adapter *adapter,
1769 int new_tx_size, int new_rx_size)
1773 for (i = 0; i < adapter->num_queues; i++) {
1774 adapter->tx_ring[i].ring_size = new_tx_size;
1775 adapter->rx_ring[i].ring_size = new_rx_size;
1779 /* This function allows queue allocation to backoff when the system is
1780 * low on memory. If there is not enough memory to allocate io queues
1781 * the driver will try to allocate smaller queues.
1783 * The backoff algorithm is as follows:
1784 * 1. Try to allocate TX and RX and if successful.
1785 * 1.1. return success
1787 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
1789 * 3. If TX or RX is smaller than 256
1790 * 3.1. return failure.
1792 * 4.1. go back to 1.
1794 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
1796 int rc, cur_rx_ring_size, cur_tx_ring_size;
1797 int new_rx_ring_size, new_tx_ring_size;
1799 /* current queue sizes might be set to smaller than the requested
1800 * ones due to past queue allocation failures.
1802 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
1803 adapter->requested_rx_ring_size);
1806 rc = ena_setup_all_tx_resources(adapter);
1810 rc = ena_create_all_io_tx_queues(adapter);
1812 goto err_create_tx_queues;
1814 rc = ena_setup_all_rx_resources(adapter);
1818 rc = ena_create_all_io_rx_queues(adapter);
1820 goto err_create_rx_queues;
1824 err_create_rx_queues:
1825 ena_free_all_io_rx_resources(adapter);
1827 ena_destroy_all_tx_queues(adapter);
1828 err_create_tx_queues:
1829 ena_free_all_io_tx_resources(adapter);
1831 if (rc != -ENOMEM) {
1832 netif_err(adapter, ifup, adapter->netdev,
1833 "Queue creation failed with error code %d\n",
1838 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
1839 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
1841 netif_err(adapter, ifup, adapter->netdev,
1842 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
1843 cur_tx_ring_size, cur_rx_ring_size);
1845 new_tx_ring_size = cur_tx_ring_size;
1846 new_rx_ring_size = cur_rx_ring_size;
1848 /* Decrease the size of the larger queue, or
1849 * decrease both if they are the same size.
1851 if (cur_rx_ring_size <= cur_tx_ring_size)
1852 new_tx_ring_size = cur_tx_ring_size / 2;
1853 if (cur_rx_ring_size >= cur_tx_ring_size)
1854 new_rx_ring_size = cur_rx_ring_size / 2;
1856 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
1857 new_rx_ring_size < ENA_MIN_RING_SIZE) {
1858 netif_err(adapter, ifup, adapter->netdev,
1859 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
1864 netif_err(adapter, ifup, adapter->netdev,
1865 "Retrying queue creation with sizes TX=%d, RX=%d\n",
1869 set_io_rings_size(adapter, new_tx_ring_size,
1874 static int ena_up(struct ena_adapter *adapter)
1878 netdev_dbg(adapter->netdev, "%s\n", __func__);
1880 ena_setup_io_intr(adapter);
1882 /* napi poll functions should be initialized before running
1883 * request_irq(), to handle a rare condition where there is a pending
1884 * interrupt, causing the ISR to fire immediately while the poll
1885 * function wasn't set yet, causing a null dereference
1887 ena_init_napi(adapter);
1889 rc = ena_request_io_irq(adapter);
1893 rc = create_queues_with_size_backoff(adapter);
1895 goto err_create_queues_with_backoff;
1897 rc = ena_up_complete(adapter);
1901 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1902 netif_carrier_on(adapter->netdev);
1904 u64_stats_update_begin(&adapter->syncp);
1905 adapter->dev_stats.interface_up++;
1906 u64_stats_update_end(&adapter->syncp);
1908 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1910 /* Enable completion queues interrupt */
1911 for (i = 0; i < adapter->num_queues; i++)
1912 ena_unmask_interrupt(&adapter->tx_ring[i],
1913 &adapter->rx_ring[i]);
1915 /* schedule napi in case we had pending packets
1916 * from the last time we disable napi
1918 for (i = 0; i < adapter->num_queues; i++)
1919 napi_schedule(&adapter->ena_napi[i].napi);
1924 ena_destroy_all_tx_queues(adapter);
1925 ena_free_all_io_tx_resources(adapter);
1926 ena_destroy_all_rx_queues(adapter);
1927 ena_free_all_io_rx_resources(adapter);
1928 err_create_queues_with_backoff:
1929 ena_free_io_irq(adapter);
1931 ena_del_napi(adapter);
1936 static void ena_down(struct ena_adapter *adapter)
1938 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1940 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1942 u64_stats_update_begin(&adapter->syncp);
1943 adapter->dev_stats.interface_down++;
1944 u64_stats_update_end(&adapter->syncp);
1946 netif_carrier_off(adapter->netdev);
1947 netif_tx_disable(adapter->netdev);
1949 /* After this point the napi handler won't enable the tx queue */
1950 ena_napi_disable_all(adapter);
1952 /* After destroy the queue there won't be any new interrupts */
1954 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1957 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
1959 dev_err(&adapter->pdev->dev, "Device reset failed\n");
1960 /* stop submitting admin commands on a device that was reset */
1961 ena_com_set_admin_running_state(adapter->ena_dev, false);
1964 ena_destroy_all_io_queues(adapter);
1966 ena_disable_io_intr_sync(adapter);
1967 ena_free_io_irq(adapter);
1968 ena_del_napi(adapter);
1970 ena_free_all_tx_bufs(adapter);
1971 ena_free_all_rx_bufs(adapter);
1972 ena_free_all_io_tx_resources(adapter);
1973 ena_free_all_io_rx_resources(adapter);
1976 /* ena_open - Called when a network interface is made active
1977 * @netdev: network interface device structure
1979 * Returns 0 on success, negative value on failure
1981 * The open entry point is called when a network interface is made
1982 * active by the system (IFF_UP). At this point all resources needed
1983 * for transmit and receive operations are allocated, the interrupt
1984 * handler is registered with the OS, the watchdog timer is started,
1985 * and the stack is notified that the interface is ready.
1987 static int ena_open(struct net_device *netdev)
1989 struct ena_adapter *adapter = netdev_priv(netdev);
1992 /* Notify the stack of the actual queue counts. */
1993 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1995 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1999 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
2001 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
2005 rc = ena_up(adapter);
2012 /* ena_close - Disables a network interface
2013 * @netdev: network interface device structure
2015 * Returns 0, this is not allowed to fail
2017 * The close entry point is called when an interface is de-activated
2018 * by the OS. The hardware is still under the drivers control, but
2019 * needs to be disabled. A global MAC reset is issued to stop the
2020 * hardware, and all transmit and receive resources are freed.
2022 static int ena_close(struct net_device *netdev)
2024 struct ena_adapter *adapter = netdev_priv(netdev);
2026 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2028 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2031 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2034 /* Check for device status and issue reset if needed*/
2035 check_for_admin_com_state(adapter);
2036 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2037 netif_err(adapter, ifdown, adapter->netdev,
2038 "Destroy failure, restarting device\n");
2039 ena_dump_stats_to_dmesg(adapter);
2040 /* rtnl lock already obtained in dev_ioctl() layer */
2041 ena_destroy_device(adapter, false);
2042 ena_restore_device(adapter);
2048 int ena_update_queue_sizes(struct ena_adapter *adapter,
2054 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2055 ena_close(adapter->netdev);
2056 adapter->requested_tx_ring_size = new_tx_size;
2057 adapter->requested_rx_ring_size = new_rx_size;
2058 ena_init_io_rings(adapter);
2059 return dev_up ? ena_up(adapter) : 0;
2062 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
2064 u32 mss = skb_shinfo(skb)->gso_size;
2065 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2068 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2069 ena_tx_ctx->l4_csum_enable = 1;
2071 ena_tx_ctx->tso_enable = 1;
2072 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2073 ena_tx_ctx->l4_csum_partial = 0;
2075 ena_tx_ctx->tso_enable = 0;
2076 ena_meta->l4_hdr_len = 0;
2077 ena_tx_ctx->l4_csum_partial = 1;
2080 switch (ip_hdr(skb)->version) {
2082 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2083 if (ip_hdr(skb)->frag_off & htons(IP_DF))
2086 ena_tx_ctx->l3_csum_enable = 1;
2087 l4_protocol = ip_hdr(skb)->protocol;
2090 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2091 l4_protocol = ipv6_hdr(skb)->nexthdr;
2097 if (l4_protocol == IPPROTO_TCP)
2098 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2100 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2102 ena_meta->mss = mss;
2103 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2104 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2105 ena_tx_ctx->meta_valid = 1;
2108 ena_tx_ctx->meta_valid = 0;
2112 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2113 struct sk_buff *skb)
2115 int num_frags, header_len, rc;
2117 num_frags = skb_shinfo(skb)->nr_frags;
2118 header_len = skb_headlen(skb);
2120 if (num_frags < tx_ring->sgl_size)
2123 if ((num_frags == tx_ring->sgl_size) &&
2124 (header_len < tx_ring->tx_max_header_size))
2127 u64_stats_update_begin(&tx_ring->syncp);
2128 tx_ring->tx_stats.linearize++;
2129 u64_stats_update_end(&tx_ring->syncp);
2131 rc = skb_linearize(skb);
2133 u64_stats_update_begin(&tx_ring->syncp);
2134 tx_ring->tx_stats.linearize_failed++;
2135 u64_stats_update_end(&tx_ring->syncp);
2141 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2142 struct ena_tx_buffer *tx_info,
2143 struct sk_buff *skb,
2147 struct ena_adapter *adapter = tx_ring->adapter;
2148 struct ena_com_buf *ena_buf;
2150 u32 skb_head_len, frag_len, last_frag;
2155 skb_head_len = skb_headlen(skb);
2157 ena_buf = tx_info->bufs;
2159 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2160 /* When the device is LLQ mode, the driver will copy
2161 * the header into the device memory space.
2162 * the ena_com layer assume the header is in a linear
2164 * This assumption might be wrong since part of the header
2165 * can be in the fragmented buffers.
2166 * Use skb_header_pointer to make sure the header is in a
2167 * linear memory space.
2170 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2171 *push_hdr = skb_header_pointer(skb, 0, push_len,
2172 tx_ring->push_buf_intermediate_buf);
2173 *header_len = push_len;
2174 if (unlikely(skb->data != *push_hdr)) {
2175 u64_stats_update_begin(&tx_ring->syncp);
2176 tx_ring->tx_stats.llq_buffer_copy++;
2177 u64_stats_update_end(&tx_ring->syncp);
2179 delta = push_len - skb_head_len;
2183 *header_len = min_t(u32, skb_head_len,
2184 tx_ring->tx_max_header_size);
2187 netif_dbg(adapter, tx_queued, adapter->netdev,
2188 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2189 *push_hdr, push_len);
2191 if (skb_head_len > push_len) {
2192 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2193 skb_head_len - push_len, DMA_TO_DEVICE);
2194 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2195 goto error_report_dma_error;
2197 ena_buf->paddr = dma;
2198 ena_buf->len = skb_head_len - push_len;
2201 tx_info->num_of_bufs++;
2202 tx_info->map_linear_data = 1;
2204 tx_info->map_linear_data = 0;
2207 last_frag = skb_shinfo(skb)->nr_frags;
2209 for (i = 0; i < last_frag; i++) {
2210 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2212 frag_len = skb_frag_size(frag);
2214 if (unlikely(delta >= frag_len)) {
2219 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2220 frag_len - delta, DMA_TO_DEVICE);
2221 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2222 goto error_report_dma_error;
2224 ena_buf->paddr = dma;
2225 ena_buf->len = frag_len - delta;
2227 tx_info->num_of_bufs++;
2233 error_report_dma_error:
2234 u64_stats_update_begin(&tx_ring->syncp);
2235 tx_ring->tx_stats.dma_mapping_err++;
2236 u64_stats_update_end(&tx_ring->syncp);
2237 netdev_warn(adapter->netdev, "failed to map skb\n");
2239 tx_info->skb = NULL;
2241 tx_info->num_of_bufs += i;
2242 ena_unmap_tx_skb(tx_ring, tx_info);
2247 /* Called with netif_tx_lock. */
2248 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2250 struct ena_adapter *adapter = netdev_priv(dev);
2251 struct ena_tx_buffer *tx_info;
2252 struct ena_com_tx_ctx ena_tx_ctx;
2253 struct ena_ring *tx_ring;
2254 struct netdev_queue *txq;
2256 u16 next_to_use, req_id, header_len;
2257 int qid, rc, nb_hw_desc;
2259 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2260 /* Determine which tx ring we will be placed on */
2261 qid = skb_get_queue_mapping(skb);
2262 tx_ring = &adapter->tx_ring[qid];
2263 txq = netdev_get_tx_queue(dev, qid);
2265 rc = ena_check_and_linearize_skb(tx_ring, skb);
2267 goto error_drop_packet;
2269 skb_tx_timestamp(skb);
2271 next_to_use = tx_ring->next_to_use;
2272 req_id = tx_ring->free_ids[next_to_use];
2273 tx_info = &tx_ring->tx_buffer_info[req_id];
2274 tx_info->num_of_bufs = 0;
2276 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2278 rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2280 goto error_drop_packet;
2282 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2283 ena_tx_ctx.ena_bufs = tx_info->bufs;
2284 ena_tx_ctx.push_header = push_hdr;
2285 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2286 ena_tx_ctx.req_id = req_id;
2287 ena_tx_ctx.header_len = header_len;
2289 /* set flags and meta data */
2290 ena_tx_csum(&ena_tx_ctx, skb);
2292 if (unlikely(ena_com_is_doorbell_needed(tx_ring->ena_com_io_sq, &ena_tx_ctx))) {
2293 netif_dbg(adapter, tx_queued, dev,
2294 "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
2296 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2299 /* prepare the packet's descriptors to dma engine */
2300 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
2303 /* ena_com_prepare_tx() can't fail due to overflow of tx queue,
2304 * since the number of free descriptors in the queue is checked
2305 * after sending the previous packet. In case there isn't enough
2306 * space in the queue for the next packet, it is stopped
2307 * until there is again enough available space in the queue.
2308 * All other failure reasons of ena_com_prepare_tx() are fatal
2309 * and therefore require a device reset.
2312 netif_err(adapter, tx_queued, dev,
2313 "failed to prepare tx bufs\n");
2314 u64_stats_update_begin(&tx_ring->syncp);
2315 tx_ring->tx_stats.prepare_ctx_err++;
2316 u64_stats_update_end(&tx_ring->syncp);
2317 adapter->reset_reason = ENA_REGS_RESET_DRIVER_INVALID_STATE;
2318 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2319 goto error_unmap_dma;
2322 netdev_tx_sent_queue(txq, skb->len);
2324 u64_stats_update_begin(&tx_ring->syncp);
2325 tx_ring->tx_stats.cnt++;
2326 tx_ring->tx_stats.bytes += skb->len;
2327 u64_stats_update_end(&tx_ring->syncp);
2329 tx_info->tx_descs = nb_hw_desc;
2330 tx_info->last_jiffies = jiffies;
2331 tx_info->print_once = 0;
2333 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2334 tx_ring->ring_size);
2336 /* stop the queue when no more space available, the packet can have up
2337 * to sgl_size + 2. one for the meta descriptor and one for header
2338 * (if the header is larger than tx_max_header_size).
2340 if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2341 tx_ring->sgl_size + 2))) {
2342 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2345 netif_tx_stop_queue(txq);
2346 u64_stats_update_begin(&tx_ring->syncp);
2347 tx_ring->tx_stats.queue_stop++;
2348 u64_stats_update_end(&tx_ring->syncp);
2350 /* There is a rare condition where this function decide to
2351 * stop the queue but meanwhile clean_tx_irq updates
2352 * next_to_completion and terminates.
2353 * The queue will remain stopped forever.
2354 * To solve this issue add a mb() to make sure that
2355 * netif_tx_stop_queue() write is vissible before checking if
2356 * there is additional space in the queue.
2360 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2361 ENA_TX_WAKEUP_THRESH)) {
2362 netif_tx_wake_queue(txq);
2363 u64_stats_update_begin(&tx_ring->syncp);
2364 tx_ring->tx_stats.queue_wakeup++;
2365 u64_stats_update_end(&tx_ring->syncp);
2369 if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
2370 /* trigger the dma engine. ena_com_write_sq_doorbell()
2373 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2374 u64_stats_update_begin(&tx_ring->syncp);
2375 tx_ring->tx_stats.doorbells++;
2376 u64_stats_update_end(&tx_ring->syncp);
2379 return NETDEV_TX_OK;
2382 ena_unmap_tx_skb(tx_ring, tx_info);
2383 tx_info->skb = NULL;
2387 return NETDEV_TX_OK;
2390 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2391 struct net_device *sb_dev)
2394 /* we suspect that this is good for in--kernel network services that
2395 * want to loop incoming skb rx to tx in normal user generated traffic,
2396 * most probably we will not get to this
2398 if (skb_rx_queue_recorded(skb))
2399 qid = skb_get_rx_queue(skb);
2401 qid = netdev_pick_tx(dev, skb, NULL);
2406 static void ena_config_host_info(struct ena_com_dev *ena_dev,
2407 struct pci_dev *pdev)
2409 struct ena_admin_host_info *host_info;
2412 /* Allocate only the host info */
2413 rc = ena_com_allocate_host_info(ena_dev);
2415 pr_err("Cannot allocate host info\n");
2419 host_info = ena_dev->host_attr.host_info;
2421 host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
2422 host_info->os_type = ENA_ADMIN_OS_LINUX;
2423 host_info->kernel_ver = LINUX_VERSION_CODE;
2424 strlcpy(host_info->kernel_ver_str, utsname()->version,
2425 sizeof(host_info->kernel_ver_str) - 1);
2426 host_info->os_dist = 0;
2427 strncpy(host_info->os_dist_str, utsname()->release,
2428 sizeof(host_info->os_dist_str) - 1);
2429 host_info->driver_version =
2430 (DRV_MODULE_VER_MAJOR) |
2431 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2432 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
2433 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
2434 host_info->num_cpus = num_online_cpus();
2436 host_info->driver_supported_features =
2437 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK;
2439 rc = ena_com_set_host_attributes(ena_dev);
2441 if (rc == -EOPNOTSUPP)
2442 pr_warn("Cannot set host attributes\n");
2444 pr_err("Cannot set host attributes\n");
2452 ena_com_delete_host_info(ena_dev);
2455 static void ena_config_debug_area(struct ena_adapter *adapter)
2457 u32 debug_area_size;
2460 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2461 if (ss_count <= 0) {
2462 netif_err(adapter, drv, adapter->netdev,
2463 "SS count is negative\n");
2467 /* allocate 32 bytes for each string and 64bit for the value */
2468 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2470 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2472 pr_err("Cannot allocate debug area\n");
2476 rc = ena_com_set_host_attributes(adapter->ena_dev);
2478 if (rc == -EOPNOTSUPP)
2479 netif_warn(adapter, drv, adapter->netdev,
2480 "Cannot set host attributes\n");
2482 netif_err(adapter, drv, adapter->netdev,
2483 "Cannot set host attributes\n");
2489 ena_com_delete_debug_area(adapter->ena_dev);
2492 static void ena_get_stats64(struct net_device *netdev,
2493 struct rtnl_link_stats64 *stats)
2495 struct ena_adapter *adapter = netdev_priv(netdev);
2496 struct ena_ring *rx_ring, *tx_ring;
2501 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2504 for (i = 0; i < adapter->num_queues; i++) {
2507 tx_ring = &adapter->tx_ring[i];
2510 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2511 packets = tx_ring->tx_stats.cnt;
2512 bytes = tx_ring->tx_stats.bytes;
2513 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
2515 stats->tx_packets += packets;
2516 stats->tx_bytes += bytes;
2518 rx_ring = &adapter->rx_ring[i];
2521 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2522 packets = rx_ring->rx_stats.cnt;
2523 bytes = rx_ring->rx_stats.bytes;
2524 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2526 stats->rx_packets += packets;
2527 stats->rx_bytes += bytes;
2531 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2532 rx_drops = adapter->dev_stats.rx_drops;
2533 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
2535 stats->rx_dropped = rx_drops;
2537 stats->multicast = 0;
2538 stats->collisions = 0;
2540 stats->rx_length_errors = 0;
2541 stats->rx_crc_errors = 0;
2542 stats->rx_frame_errors = 0;
2543 stats->rx_fifo_errors = 0;
2544 stats->rx_missed_errors = 0;
2545 stats->tx_window_errors = 0;
2547 stats->rx_errors = 0;
2548 stats->tx_errors = 0;
2551 static const struct net_device_ops ena_netdev_ops = {
2552 .ndo_open = ena_open,
2553 .ndo_stop = ena_close,
2554 .ndo_start_xmit = ena_start_xmit,
2555 .ndo_select_queue = ena_select_queue,
2556 .ndo_get_stats64 = ena_get_stats64,
2557 .ndo_tx_timeout = ena_tx_timeout,
2558 .ndo_change_mtu = ena_change_mtu,
2559 .ndo_set_mac_address = NULL,
2560 .ndo_validate_addr = eth_validate_addr,
2563 static int ena_device_validate_params(struct ena_adapter *adapter,
2564 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2566 struct net_device *netdev = adapter->netdev;
2569 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2572 netif_err(adapter, drv, netdev,
2573 "Error, mac address are different\n");
2577 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2578 netif_err(adapter, drv, netdev,
2579 "Error, device max mtu is smaller than netdev MTU\n");
2586 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2587 struct ena_com_dev_get_features_ctx *get_feat_ctx,
2590 struct device *dev = &pdev->dev;
2591 bool readless_supported;
2596 rc = ena_com_mmio_reg_read_request_init(ena_dev);
2598 dev_err(dev, "failed to init mmio read less\n");
2602 /* The PCIe configuration space revision id indicate if mmio reg
2605 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2606 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2608 rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
2610 dev_err(dev, "Can not reset device\n");
2611 goto err_mmio_read_less;
2614 rc = ena_com_validate_version(ena_dev);
2616 dev_err(dev, "device version is too low\n");
2617 goto err_mmio_read_less;
2620 dma_width = ena_com_get_dma_width(ena_dev);
2621 if (dma_width < 0) {
2622 dev_err(dev, "Invalid dma width value %d", dma_width);
2624 goto err_mmio_read_less;
2627 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2629 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2630 goto err_mmio_read_less;
2633 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2635 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2637 goto err_mmio_read_less;
2640 /* ENA admin level init */
2641 rc = ena_com_admin_init(ena_dev, &aenq_handlers);
2644 "Can not initialize ena admin queue with device\n");
2645 goto err_mmio_read_less;
2648 /* To enable the msix interrupts the driver needs to know the number
2649 * of queues. So the driver uses polling mode to retrieve this
2652 ena_com_set_admin_polling_mode(ena_dev, true);
2654 ena_config_host_info(ena_dev, pdev);
2656 /* Get Device Attributes*/
2657 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2659 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2660 goto err_admin_init;
2663 /* Try to turn all the available aenq groups */
2664 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2665 BIT(ENA_ADMIN_FATAL_ERROR) |
2666 BIT(ENA_ADMIN_WARNING) |
2667 BIT(ENA_ADMIN_NOTIFICATION) |
2668 BIT(ENA_ADMIN_KEEP_ALIVE);
2670 aenq_groups &= get_feat_ctx->aenq.supported_groups;
2672 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2674 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2675 goto err_admin_init;
2678 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2683 ena_com_delete_host_info(ena_dev);
2684 ena_com_admin_destroy(ena_dev);
2686 ena_com_mmio_reg_read_request_destroy(ena_dev);
2691 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2694 struct ena_com_dev *ena_dev = adapter->ena_dev;
2695 struct device *dev = &adapter->pdev->dev;
2698 rc = ena_enable_msix(adapter, io_vectors);
2700 dev_err(dev, "Can not reserve msix vectors\n");
2704 ena_setup_mgmnt_intr(adapter);
2706 rc = ena_request_mgmnt_irq(adapter);
2708 dev_err(dev, "Can not setup management interrupts\n");
2709 goto err_disable_msix;
2712 ena_com_set_admin_polling_mode(ena_dev, false);
2714 ena_com_admin_aenq_enable(ena_dev);
2719 ena_disable_msix(adapter);
2724 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
2726 struct net_device *netdev = adapter->netdev;
2727 struct ena_com_dev *ena_dev = adapter->ena_dev;
2730 if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2733 netif_carrier_off(netdev);
2735 del_timer_sync(&adapter->timer_service);
2737 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2738 adapter->dev_up_before_reset = dev_up;
2740 ena_com_set_admin_running_state(ena_dev, false);
2742 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2745 /* Stop the device from sending AENQ events (in case reset flag is set
2746 * and device is up, ena_down() already reset the device.
2748 if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
2749 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2751 ena_free_mgmnt_irq(adapter);
2753 ena_disable_msix(adapter);
2755 ena_com_abort_admin_commands(ena_dev);
2757 ena_com_wait_for_abort_completion(ena_dev);
2759 ena_com_admin_destroy(ena_dev);
2761 ena_com_mmio_reg_read_request_destroy(ena_dev);
2763 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
2765 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2766 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2769 static int ena_restore_device(struct ena_adapter *adapter)
2771 struct ena_com_dev_get_features_ctx get_feat_ctx;
2772 struct ena_com_dev *ena_dev = adapter->ena_dev;
2773 struct pci_dev *pdev = adapter->pdev;
2777 set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2778 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2780 dev_err(&pdev->dev, "Can not initialize device\n");
2783 adapter->wd_state = wd_state;
2785 rc = ena_device_validate_params(adapter, &get_feat_ctx);
2787 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2788 goto err_device_destroy;
2791 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2792 adapter->num_queues);
2794 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2795 goto err_device_destroy;
2797 /* If the interface was up before the reset bring it up */
2798 if (adapter->dev_up_before_reset) {
2799 rc = ena_up(adapter);
2801 dev_err(&pdev->dev, "Failed to create I/O queues\n");
2802 goto err_disable_msix;
2806 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2808 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2809 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2810 netif_carrier_on(adapter->netdev);
2812 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2814 "Device reset completed successfully, Driver info: %s\n",
2819 ena_free_mgmnt_irq(adapter);
2820 ena_disable_msix(adapter);
2822 ena_com_abort_admin_commands(ena_dev);
2823 ena_com_wait_for_abort_completion(ena_dev);
2824 ena_com_admin_destroy(ena_dev);
2825 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
2826 ena_com_mmio_reg_read_request_destroy(ena_dev);
2828 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2829 clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2831 "Reset attempt failed. Can not reset the device\n");
2836 static void ena_fw_reset_device(struct work_struct *work)
2838 struct ena_adapter *adapter =
2839 container_of(work, struct ena_adapter, reset_task);
2840 struct pci_dev *pdev = adapter->pdev;
2842 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2844 "device reset schedule while reset bit is off\n");
2848 ena_destroy_device(adapter, false);
2849 ena_restore_device(adapter);
2853 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
2854 struct ena_ring *rx_ring)
2856 if (likely(rx_ring->first_interrupt))
2859 if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
2862 rx_ring->no_interrupt_event_cnt++;
2864 if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
2865 netif_err(adapter, rx_err, adapter->netdev,
2866 "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
2868 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2869 smp_mb__before_atomic();
2870 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2877 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
2878 struct ena_ring *tx_ring)
2880 struct ena_tx_buffer *tx_buf;
2881 unsigned long last_jiffies;
2885 for (i = 0; i < tx_ring->ring_size; i++) {
2886 tx_buf = &tx_ring->tx_buffer_info[i];
2887 last_jiffies = tx_buf->last_jiffies;
2889 if (last_jiffies == 0)
2890 /* no pending Tx at this location */
2893 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
2894 2 * adapter->missing_tx_completion_to))) {
2895 /* If after graceful period interrupt is still not
2896 * received, we schedule a reset
2898 netif_err(adapter, tx_err, adapter->netdev,
2899 "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
2901 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2902 smp_mb__before_atomic();
2903 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2907 if (unlikely(time_is_before_jiffies(last_jiffies +
2908 adapter->missing_tx_completion_to))) {
2909 if (!tx_buf->print_once)
2910 netif_notice(adapter, tx_err, adapter->netdev,
2911 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2914 tx_buf->print_once = 1;
2919 if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
2920 netif_err(adapter, tx_err, adapter->netdev,
2921 "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
2923 adapter->missing_tx_completion_threshold);
2924 adapter->reset_reason =
2925 ENA_REGS_RESET_MISS_TX_CMPL;
2926 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2930 u64_stats_update_begin(&tx_ring->syncp);
2931 tx_ring->tx_stats.missed_tx = missed_tx;
2932 u64_stats_update_end(&tx_ring->syncp);
2937 static void check_for_missing_completions(struct ena_adapter *adapter)
2939 struct ena_ring *tx_ring;
2940 struct ena_ring *rx_ring;
2943 /* Make sure the driver doesn't turn the device in other process */
2946 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2949 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2952 if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
2955 budget = ENA_MONITORED_TX_QUEUES;
2957 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2958 tx_ring = &adapter->tx_ring[i];
2959 rx_ring = &adapter->rx_ring[i];
2961 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
2965 rc = check_for_rx_interrupt_queue(adapter, rx_ring);
2974 adapter->last_monitored_tx_qid = i % adapter->num_queues;
2977 /* trigger napi schedule after 2 consecutive detections */
2978 #define EMPTY_RX_REFILL 2
2979 /* For the rare case where the device runs out of Rx descriptors and the
2980 * napi handler failed to refill new Rx descriptors (due to a lack of memory
2982 * This case will lead to a deadlock:
2983 * The device won't send interrupts since all the new Rx packets will be dropped
2984 * The napi handler won't allocate new Rx descriptors so the device will be
2985 * able to send new packets.
2987 * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
2988 * It is recommended to have at least 512MB, with a minimum of 128MB for
2989 * constrained environment).
2991 * When such a situation is detected - Reschedule napi
2993 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
2995 struct ena_ring *rx_ring;
2996 int i, refill_required;
2998 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
3001 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
3004 for (i = 0; i < adapter->num_queues; i++) {
3005 rx_ring = &adapter->rx_ring[i];
3008 ena_com_free_desc(rx_ring->ena_com_io_sq);
3009 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3010 rx_ring->empty_rx_queue++;
3012 if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3013 u64_stats_update_begin(&rx_ring->syncp);
3014 rx_ring->rx_stats.empty_rx_ring++;
3015 u64_stats_update_end(&rx_ring->syncp);
3017 netif_err(adapter, drv, adapter->netdev,
3018 "trigger refill for ring %d\n", i);
3020 napi_schedule(rx_ring->napi);
3021 rx_ring->empty_rx_queue = 0;
3024 rx_ring->empty_rx_queue = 0;
3029 /* Check for keep alive expiration */
3030 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3032 unsigned long keep_alive_expired;
3034 if (!adapter->wd_state)
3037 if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3040 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies +
3041 adapter->keep_alive_timeout);
3042 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3043 netif_err(adapter, drv, adapter->netdev,
3044 "Keep alive watchdog timeout.\n");
3045 u64_stats_update_begin(&adapter->syncp);
3046 adapter->dev_stats.wd_expired++;
3047 u64_stats_update_end(&adapter->syncp);
3048 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3049 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3053 static void check_for_admin_com_state(struct ena_adapter *adapter)
3055 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3056 netif_err(adapter, drv, adapter->netdev,
3057 "ENA admin queue is not in running state!\n");
3058 u64_stats_update_begin(&adapter->syncp);
3059 adapter->dev_stats.admin_q_pause++;
3060 u64_stats_update_end(&adapter->syncp);
3061 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3062 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3066 static void ena_update_hints(struct ena_adapter *adapter,
3067 struct ena_admin_ena_hw_hints *hints)
3069 struct net_device *netdev = adapter->netdev;
3071 if (hints->admin_completion_tx_timeout)
3072 adapter->ena_dev->admin_queue.completion_timeout =
3073 hints->admin_completion_tx_timeout * 1000;
3075 if (hints->mmio_read_timeout)
3076 /* convert to usec */
3077 adapter->ena_dev->mmio_read.reg_read_to =
3078 hints->mmio_read_timeout * 1000;
3080 if (hints->missed_tx_completion_count_threshold_to_reset)
3081 adapter->missing_tx_completion_threshold =
3082 hints->missed_tx_completion_count_threshold_to_reset;
3084 if (hints->missing_tx_completion_timeout) {
3085 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3086 adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3088 adapter->missing_tx_completion_to =
3089 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3092 if (hints->netdev_wd_timeout)
3093 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3095 if (hints->driver_watchdog_timeout) {
3096 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3097 adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3099 adapter->keep_alive_timeout =
3100 msecs_to_jiffies(hints->driver_watchdog_timeout);
3104 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3105 struct net_device *netdev)
3107 host_info->supported_network_features[0] =
3108 netdev->features & GENMASK_ULL(31, 0);
3109 host_info->supported_network_features[1] =
3110 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3113 static void ena_timer_service(struct timer_list *t)
3115 struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3116 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3117 struct ena_admin_host_info *host_info =
3118 adapter->ena_dev->host_attr.host_info;
3120 check_for_missing_keep_alive(adapter);
3122 check_for_admin_com_state(adapter);
3124 check_for_missing_completions(adapter);
3126 check_for_empty_rx_ring(adapter);
3129 ena_dump_stats_to_buf(adapter, debug_area);
3132 ena_update_host_info(host_info, adapter->netdev);
3134 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3135 netif_err(adapter, drv, adapter->netdev,
3136 "Trigger reset is on\n");
3137 ena_dump_stats_to_dmesg(adapter);
3138 queue_work(ena_wq, &adapter->reset_task);
3142 /* Reset the timer */
3143 mod_timer(&adapter->timer_service, jiffies + HZ);
3146 static int ena_calc_io_queue_num(struct pci_dev *pdev,
3147 struct ena_com_dev *ena_dev,
3148 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3150 int io_tx_sq_num, io_tx_cq_num, io_rx_num, io_queue_num;
3152 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3153 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3154 &get_feat_ctx->max_queue_ext.max_queue_ext;
3155 io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num,
3156 max_queue_ext->max_rx_cq_num);
3158 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3159 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3161 struct ena_admin_queue_feature_desc *max_queues =
3162 &get_feat_ctx->max_queues;
3163 io_tx_sq_num = max_queues->max_sq_num;
3164 io_tx_cq_num = max_queues->max_cq_num;
3165 io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num);
3168 /* In case of LLQ use the llq fields for the tx SQ/CQ */
3169 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3170 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3172 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3173 io_queue_num = min_t(int, io_queue_num, io_rx_num);
3174 io_queue_num = min_t(int, io_queue_num, io_tx_sq_num);
3175 io_queue_num = min_t(int, io_queue_num, io_tx_cq_num);
3176 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3177 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
3178 if (unlikely(!io_queue_num)) {
3179 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3183 return io_queue_num;
3186 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3187 struct ena_com_dev *ena_dev,
3188 struct ena_admin_feature_llq_desc *llq,
3189 struct ena_llq_configurations *llq_default_configurations)
3193 u32 llq_feature_mask;
3195 llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3196 if (!(ena_dev->supported_features & llq_feature_mask)) {
3198 "LLQ is not supported Fallback to host mode policy.\n");
3199 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3203 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3205 rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3208 "Failed to configure the device mode. Fallback to host mode policy.\n");
3209 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3213 /* Nothing to config, exit */
3214 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3219 "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3220 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3224 ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3225 pci_resource_start(pdev, ENA_MEM_BAR),
3226 pci_resource_len(pdev, ENA_MEM_BAR));
3228 if (!ena_dev->mem_bar)
3234 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3235 struct net_device *netdev)
3237 netdev_features_t dev_features = 0;
3239 /* Set offload features */
3240 if (feat->offload.tx &
3241 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3242 dev_features |= NETIF_F_IP_CSUM;
3244 if (feat->offload.tx &
3245 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3246 dev_features |= NETIF_F_IPV6_CSUM;
3248 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3249 dev_features |= NETIF_F_TSO;
3251 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3252 dev_features |= NETIF_F_TSO6;
3254 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3255 dev_features |= NETIF_F_TSO_ECN;
3257 if (feat->offload.rx_supported &
3258 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3259 dev_features |= NETIF_F_RXCSUM;
3261 if (feat->offload.rx_supported &
3262 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3263 dev_features |= NETIF_F_RXCSUM;
3271 netdev->hw_features |= netdev->features;
3272 netdev->vlan_features |= netdev->features;
3275 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3276 struct ena_com_dev_get_features_ctx *feat)
3278 struct net_device *netdev = adapter->netdev;
3280 /* Copy mac address */
3281 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3282 eth_hw_addr_random(netdev);
3283 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3285 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3286 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3289 /* Set offload features */
3290 ena_set_dev_offloads(feat, netdev);
3292 adapter->max_mtu = feat->dev_attr.max_mtu;
3293 netdev->max_mtu = adapter->max_mtu;
3294 netdev->min_mtu = ENA_MIN_MTU;
3297 static int ena_rss_init_default(struct ena_adapter *adapter)
3299 struct ena_com_dev *ena_dev = adapter->ena_dev;
3300 struct device *dev = &adapter->pdev->dev;
3304 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3306 dev_err(dev, "Cannot init indirect table\n");
3310 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3311 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
3312 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3313 ENA_IO_RXQ_IDX(val));
3314 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3315 dev_err(dev, "Cannot fill indirect table\n");
3316 goto err_fill_indir;
3320 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3321 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3322 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3323 dev_err(dev, "Cannot fill hash function\n");
3324 goto err_fill_indir;
3327 rc = ena_com_set_default_hash_ctrl(ena_dev);
3328 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3329 dev_err(dev, "Cannot fill hash control\n");
3330 goto err_fill_indir;
3336 ena_com_rss_destroy(ena_dev);
3342 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3344 int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3346 pci_release_selected_regions(pdev, release_bars);
3349 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3351 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3352 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3353 llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3354 llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3355 llq_config->llq_ring_entry_size_value = 128;
3358 static int ena_calc_queue_size(struct ena_calc_queue_size_ctx *ctx)
3360 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
3361 struct ena_com_dev *ena_dev = ctx->ena_dev;
3362 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
3363 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
3364 u32 max_tx_queue_size;
3365 u32 max_rx_queue_size;
3367 if (ctx->ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3368 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3369 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
3370 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
3371 max_queue_ext->max_rx_sq_depth);
3372 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
3374 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3375 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3376 llq->max_llq_depth);
3378 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3379 max_queue_ext->max_tx_sq_depth);
3381 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3382 max_queue_ext->max_per_packet_tx_descs);
3383 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3384 max_queue_ext->max_per_packet_rx_descs);
3386 struct ena_admin_queue_feature_desc *max_queues =
3387 &ctx->get_feat_ctx->max_queues;
3388 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
3389 max_queues->max_sq_depth);
3390 max_tx_queue_size = max_queues->max_cq_depth;
3392 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3393 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3394 llq->max_llq_depth);
3396 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3397 max_queues->max_sq_depth);
3399 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3400 max_queues->max_packet_tx_descs);
3401 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3402 max_queues->max_packet_rx_descs);
3405 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
3406 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
3408 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
3410 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
3413 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
3414 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
3416 ctx->max_tx_queue_size = max_tx_queue_size;
3417 ctx->max_rx_queue_size = max_rx_queue_size;
3418 ctx->tx_queue_size = tx_queue_size;
3419 ctx->rx_queue_size = rx_queue_size;
3424 /* ena_probe - Device Initialization Routine
3425 * @pdev: PCI device information struct
3426 * @ent: entry in ena_pci_tbl
3428 * Returns 0 on success, negative on failure
3430 * ena_probe initializes an adapter identified by a pci_dev structure.
3431 * The OS initialization, configuring of the adapter private structure,
3432 * and a hardware reset occur.
3434 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3436 struct ena_com_dev_get_features_ctx get_feat_ctx;
3437 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3438 struct ena_llq_configurations llq_config;
3439 struct ena_com_dev *ena_dev = NULL;
3440 struct ena_adapter *adapter;
3441 int io_queue_num, bars, rc;
3442 struct net_device *netdev;
3443 static int adapters_found;
3444 char *queue_type_str;
3447 dev_dbg(&pdev->dev, "%s\n", __func__);
3449 dev_info_once(&pdev->dev, "%s", version);
3451 rc = pci_enable_device_mem(pdev);
3453 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
3457 pci_set_master(pdev);
3459 ena_dev = vzalloc(sizeof(*ena_dev));
3462 goto err_disable_device;
3465 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3466 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
3468 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
3470 goto err_free_ena_dev;
3473 ena_dev->reg_bar = devm_ioremap(&pdev->dev,
3474 pci_resource_start(pdev, ENA_REG_BAR),
3475 pci_resource_len(pdev, ENA_REG_BAR));
3476 if (!ena_dev->reg_bar) {
3477 dev_err(&pdev->dev, "failed to remap regs bar\n");
3479 goto err_free_region;
3482 ena_dev->dmadev = &pdev->dev;
3484 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
3486 dev_err(&pdev->dev, "ena device init failed\n");
3489 goto err_free_region;
3492 set_default_llq_configurations(&llq_config);
3494 rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
3497 dev_err(&pdev->dev, "ena device init failed\n");
3498 goto err_device_destroy;
3501 calc_queue_ctx.ena_dev = ena_dev;
3502 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
3503 calc_queue_ctx.pdev = pdev;
3505 /* Initial Tx and RX interrupt delay. Assumes 1 usec granularity.
3506 * Updated during device initialization with the real granularity
3508 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3509 ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
3510 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
3511 rc = ena_calc_queue_size(&calc_queue_ctx);
3512 if (rc || io_queue_num <= 0) {
3514 goto err_device_destroy;
3517 dev_info(&pdev->dev, "creating %d io queues. rx queue size: %d tx queue size. %d LLQ is %s\n",
3519 calc_queue_ctx.rx_queue_size,
3520 calc_queue_ctx.tx_queue_size,
3521 (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
3522 "ENABLED" : "DISABLED");
3524 /* dev zeroed in init_etherdev */
3525 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
3527 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
3529 goto err_device_destroy;
3532 SET_NETDEV_DEV(netdev, &pdev->dev);
3534 adapter = netdev_priv(netdev);
3535 pci_set_drvdata(pdev, adapter);
3537 adapter->ena_dev = ena_dev;
3538 adapter->netdev = netdev;
3539 adapter->pdev = pdev;
3541 ena_set_conf_feat_params(adapter, &get_feat_ctx);
3543 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3544 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3546 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
3547 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
3548 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
3549 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
3550 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3551 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3553 adapter->num_queues = io_queue_num;
3554 adapter->last_monitored_tx_qid = 0;
3556 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3557 adapter->wd_state = wd_state;
3559 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3561 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3564 "Failed to query interrupt moderation feature\n");
3565 goto err_netdev_destroy;
3567 ena_init_io_rings(adapter);
3569 netdev->netdev_ops = &ena_netdev_ops;
3570 netdev->watchdog_timeo = TX_TIMEOUT;
3571 ena_set_ethtool_ops(netdev);
3573 netdev->priv_flags |= IFF_UNICAST_FLT;
3575 u64_stats_init(&adapter->syncp);
3577 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3580 "Failed to enable and set the admin interrupts\n");
3581 goto err_worker_destroy;
3583 rc = ena_rss_init_default(adapter);
3584 if (rc && (rc != -EOPNOTSUPP)) {
3585 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3589 ena_config_debug_area(adapter);
3591 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3593 netif_carrier_off(netdev);
3595 rc = register_netdev(netdev);
3597 dev_err(&pdev->dev, "Cannot register net device\n");
3601 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3603 adapter->last_keep_alive_jiffies = jiffies;
3604 adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
3605 adapter->missing_tx_completion_to = TX_TIMEOUT;
3606 adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
3608 ena_update_hints(adapter, &get_feat_ctx.hw_hints);
3610 timer_setup(&adapter->timer_service, ena_timer_service, 0);
3611 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3613 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3614 queue_type_str = "Regular";
3616 queue_type_str = "Low Latency";
3618 dev_info(&pdev->dev,
3619 "%s found at mem %lx, mac addr %pM Queues %d, Placement policy: %s\n",
3620 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3621 netdev->dev_addr, io_queue_num, queue_type_str);
3623 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3630 ena_com_delete_debug_area(ena_dev);
3631 ena_com_rss_destroy(ena_dev);
3633 ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
3634 /* stop submitting admin commands on a device that was reset */
3635 ena_com_set_admin_running_state(ena_dev, false);
3636 ena_free_mgmnt_irq(adapter);
3637 ena_disable_msix(adapter);
3639 del_timer(&adapter->timer_service);
3641 free_netdev(netdev);
3643 ena_com_delete_host_info(ena_dev);
3644 ena_com_admin_destroy(ena_dev);
3646 ena_release_bars(ena_dev, pdev);
3650 pci_disable_device(pdev);
3654 /*****************************************************************************/
3656 /* ena_remove - Device Removal Routine
3657 * @pdev: PCI device information struct
3659 * ena_remove is called by the PCI subsystem to alert the driver
3660 * that it should release a PCI device.
3662 static void ena_remove(struct pci_dev *pdev)
3664 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3665 struct ena_com_dev *ena_dev;
3666 struct net_device *netdev;
3668 ena_dev = adapter->ena_dev;
3669 netdev = adapter->netdev;
3671 #ifdef CONFIG_RFS_ACCEL
3672 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3673 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3674 netdev->rx_cpu_rmap = NULL;
3676 #endif /* CONFIG_RFS_ACCEL */
3677 del_timer_sync(&adapter->timer_service);
3679 cancel_work_sync(&adapter->reset_task);
3682 ena_destroy_device(adapter, true);
3685 unregister_netdev(netdev);
3687 free_netdev(netdev);
3689 ena_com_rss_destroy(ena_dev);
3691 ena_com_delete_debug_area(ena_dev);
3693 ena_com_delete_host_info(ena_dev);
3695 ena_release_bars(ena_dev, pdev);
3697 pci_disable_device(pdev);
3703 /* ena_suspend - PM suspend callback
3704 * @pdev: PCI device information struct
3705 * @state:power state
3707 static int ena_suspend(struct pci_dev *pdev, pm_message_t state)
3709 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3711 u64_stats_update_begin(&adapter->syncp);
3712 adapter->dev_stats.suspend++;
3713 u64_stats_update_end(&adapter->syncp);
3716 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3718 "ignoring device reset request as the device is being suspended\n");
3719 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3721 ena_destroy_device(adapter, true);
3726 /* ena_resume - PM resume callback
3727 * @pdev: PCI device information struct
3730 static int ena_resume(struct pci_dev *pdev)
3732 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3735 u64_stats_update_begin(&adapter->syncp);
3736 adapter->dev_stats.resume++;
3737 u64_stats_update_end(&adapter->syncp);
3740 rc = ena_restore_device(adapter);
3746 static struct pci_driver ena_pci_driver = {
3747 .name = DRV_MODULE_NAME,
3748 .id_table = ena_pci_tbl,
3750 .remove = ena_remove,
3752 .suspend = ena_suspend,
3753 .resume = ena_resume,
3755 .sriov_configure = pci_sriov_configure_simple,
3758 static int __init ena_init(void)
3760 pr_info("%s", version);
3762 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3764 pr_err("Failed to create workqueue\n");
3768 return pci_register_driver(&ena_pci_driver);
3771 static void __exit ena_cleanup(void)
3773 pci_unregister_driver(&ena_pci_driver);
3776 destroy_workqueue(ena_wq);
3781 /******************************************************************************
3782 ******************************** AENQ Handlers *******************************
3783 *****************************************************************************/
3784 /* ena_update_on_link_change:
3785 * Notify the network interface about the change in link status
3787 static void ena_update_on_link_change(void *adapter_data,
3788 struct ena_admin_aenq_entry *aenq_e)
3790 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3791 struct ena_admin_aenq_link_change_desc *aenq_desc =
3792 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3793 int status = aenq_desc->flags &
3794 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3797 netdev_dbg(adapter->netdev, "%s\n", __func__);
3798 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3799 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
3800 netif_carrier_on(adapter->netdev);
3802 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3803 netif_carrier_off(adapter->netdev);
3807 static void ena_keep_alive_wd(void *adapter_data,
3808 struct ena_admin_aenq_entry *aenq_e)
3810 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3811 struct ena_admin_aenq_keep_alive_desc *desc;
3814 desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3815 adapter->last_keep_alive_jiffies = jiffies;
3817 rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
3819 u64_stats_update_begin(&adapter->syncp);
3820 adapter->dev_stats.rx_drops = rx_drops;
3821 u64_stats_update_end(&adapter->syncp);
3824 static void ena_notification(void *adapter_data,
3825 struct ena_admin_aenq_entry *aenq_e)
3827 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3828 struct ena_admin_ena_hw_hints *hints;
3830 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3831 "Invalid group(%x) expected %x\n",
3832 aenq_e->aenq_common_desc.group,
3833 ENA_ADMIN_NOTIFICATION);
3835 switch (aenq_e->aenq_common_desc.syndrom) {
3836 case ENA_ADMIN_UPDATE_HINTS:
3837 hints = (struct ena_admin_ena_hw_hints *)
3838 (&aenq_e->inline_data_w4);
3839 ena_update_hints(adapter, hints);
3842 netif_err(adapter, drv, adapter->netdev,
3843 "Invalid aenq notification link state %d\n",
3844 aenq_e->aenq_common_desc.syndrom);
3848 /* This handler will called for unknown event group or unimplemented handlers*/
3849 static void unimplemented_aenq_handler(void *data,
3850 struct ena_admin_aenq_entry *aenq_e)
3852 struct ena_adapter *adapter = (struct ena_adapter *)data;
3854 netif_err(adapter, drv, adapter->netdev,
3855 "Unknown event was received or event with unimplemented handler\n");
3858 static struct ena_aenq_handlers aenq_handlers = {
3860 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3861 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3862 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3864 .unimplemented_handler = unimplemented_aenq_handler
3867 module_init(ena_init);
3868 module_exit(ena_cleanup);