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1 /*
2  * Copyright 2015 Amazon.com, Inc. or its affiliates.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/numa.h>
43 #include <linux/pci.h>
44 #include <linux/utsname.h>
45 #include <linux/version.h>
46 #include <linux/vmalloc.h>
47 #include <net/ip.h>
48
49 #include "ena_netdev.h"
50 #include "ena_pci_id_tbl.h"
51
52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
53
54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
55 MODULE_DESCRIPTION(DEVICE_NAME);
56 MODULE_LICENSE("GPL");
57 MODULE_VERSION(DRV_MODULE_VERSION);
58
59 /* Time in jiffies before concluding the transmitter is hung. */
60 #define TX_TIMEOUT  (5 * HZ)
61
62 #define ENA_NAPI_BUDGET 64
63
64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
65                 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
66 static int debug = -1;
67 module_param(debug, int, 0);
68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
69
70 static struct ena_aenq_handlers aenq_handlers;
71
72 static struct workqueue_struct *ena_wq;
73
74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
75
76 static int ena_rss_init_default(struct ena_adapter *adapter);
77 static void check_for_admin_com_state(struct ena_adapter *adapter);
78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
79 static int ena_restore_device(struct ena_adapter *adapter);
80
81 static void ena_tx_timeout(struct net_device *dev)
82 {
83         struct ena_adapter *adapter = netdev_priv(dev);
84
85         /* Change the state of the device to trigger reset
86          * Check that we are not in the middle or a trigger already
87          */
88
89         if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
90                 return;
91
92         adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
93         u64_stats_update_begin(&adapter->syncp);
94         adapter->dev_stats.tx_timeout++;
95         u64_stats_update_end(&adapter->syncp);
96
97         netif_err(adapter, tx_err, dev, "Transmit time out\n");
98 }
99
100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
101 {
102         int i;
103
104         for (i = 0; i < adapter->num_queues; i++)
105                 adapter->rx_ring[i].mtu = mtu;
106 }
107
108 static int ena_change_mtu(struct net_device *dev, int new_mtu)
109 {
110         struct ena_adapter *adapter = netdev_priv(dev);
111         int ret;
112
113         ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
114         if (!ret) {
115                 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
116                 update_rx_ring_mtu(adapter, new_mtu);
117                 dev->mtu = new_mtu;
118         } else {
119                 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
120                           new_mtu);
121         }
122
123         return ret;
124 }
125
126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
127 {
128 #ifdef CONFIG_RFS_ACCEL
129         u32 i;
130         int rc;
131
132         adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
133         if (!adapter->netdev->rx_cpu_rmap)
134                 return -ENOMEM;
135         for (i = 0; i < adapter->num_queues; i++) {
136                 int irq_idx = ENA_IO_IRQ_IDX(i);
137
138                 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
139                                       pci_irq_vector(adapter->pdev, irq_idx));
140                 if (rc) {
141                         free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
142                         adapter->netdev->rx_cpu_rmap = NULL;
143                         return rc;
144                 }
145         }
146 #endif /* CONFIG_RFS_ACCEL */
147         return 0;
148 }
149
150 static void ena_init_io_rings_common(struct ena_adapter *adapter,
151                                      struct ena_ring *ring, u16 qid)
152 {
153         ring->qid = qid;
154         ring->pdev = adapter->pdev;
155         ring->dev = &adapter->pdev->dev;
156         ring->netdev = adapter->netdev;
157         ring->napi = &adapter->ena_napi[qid].napi;
158         ring->adapter = adapter;
159         ring->ena_dev = adapter->ena_dev;
160         ring->per_napi_packets = 0;
161         ring->per_napi_bytes = 0;
162         ring->cpu = 0;
163         ring->first_interrupt = false;
164         ring->no_interrupt_event_cnt = 0;
165         u64_stats_init(&ring->syncp);
166 }
167
168 static void ena_init_io_rings(struct ena_adapter *adapter)
169 {
170         struct ena_com_dev *ena_dev;
171         struct ena_ring *txr, *rxr;
172         int i;
173
174         ena_dev = adapter->ena_dev;
175
176         for (i = 0; i < adapter->num_queues; i++) {
177                 txr = &adapter->tx_ring[i];
178                 rxr = &adapter->rx_ring[i];
179
180                 /* TX/RX common ring state */
181                 ena_init_io_rings_common(adapter, txr, i);
182                 ena_init_io_rings_common(adapter, rxr, i);
183
184                 /* TX specific ring state */
185                 txr->ring_size = adapter->tx_ring_size;
186                 txr->tx_max_header_size = ena_dev->tx_max_header_size;
187                 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
188                 txr->sgl_size = adapter->max_tx_sgl_size;
189                 txr->smoothed_interval =
190                         ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
191
192                 /* RX specific ring state */
193                 rxr->ring_size = adapter->rx_ring_size;
194                 rxr->rx_copybreak = adapter->rx_copybreak;
195                 rxr->sgl_size = adapter->max_rx_sgl_size;
196                 rxr->smoothed_interval =
197                         ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
198                 rxr->empty_rx_queue = 0;
199         }
200 }
201
202 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
203  * @adapter: network interface device structure
204  * @qid: queue index
205  *
206  * Return 0 on success, negative on failure
207  */
208 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
209 {
210         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
211         struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
212         int size, i, node;
213
214         if (tx_ring->tx_buffer_info) {
215                 netif_err(adapter, ifup,
216                           adapter->netdev, "tx_buffer_info info is not NULL");
217                 return -EEXIST;
218         }
219
220         size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
221         node = cpu_to_node(ena_irq->cpu);
222
223         tx_ring->tx_buffer_info = vzalloc_node(size, node);
224         if (!tx_ring->tx_buffer_info) {
225                 tx_ring->tx_buffer_info = vzalloc(size);
226                 if (!tx_ring->tx_buffer_info)
227                         return -ENOMEM;
228         }
229
230         size = sizeof(u16) * tx_ring->ring_size;
231         tx_ring->free_tx_ids = vzalloc_node(size, node);
232         if (!tx_ring->free_tx_ids) {
233                 tx_ring->free_tx_ids = vzalloc(size);
234                 if (!tx_ring->free_tx_ids) {
235                         vfree(tx_ring->tx_buffer_info);
236                         return -ENOMEM;
237                 }
238         }
239
240         size = tx_ring->tx_max_header_size;
241         tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
242         if (!tx_ring->push_buf_intermediate_buf) {
243                 tx_ring->push_buf_intermediate_buf = vzalloc(size);
244                 if (!tx_ring->push_buf_intermediate_buf) {
245                         vfree(tx_ring->tx_buffer_info);
246                         vfree(tx_ring->free_tx_ids);
247                         return -ENOMEM;
248                 }
249         }
250
251         /* Req id ring for TX out of order completions */
252         for (i = 0; i < tx_ring->ring_size; i++)
253                 tx_ring->free_tx_ids[i] = i;
254
255         /* Reset tx statistics */
256         memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
257
258         tx_ring->next_to_use = 0;
259         tx_ring->next_to_clean = 0;
260         tx_ring->cpu = ena_irq->cpu;
261         return 0;
262 }
263
264 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
265  * @adapter: network interface device structure
266  * @qid: queue index
267  *
268  * Free all transmit software resources
269  */
270 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
271 {
272         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
273
274         vfree(tx_ring->tx_buffer_info);
275         tx_ring->tx_buffer_info = NULL;
276
277         vfree(tx_ring->free_tx_ids);
278         tx_ring->free_tx_ids = NULL;
279
280         vfree(tx_ring->push_buf_intermediate_buf);
281         tx_ring->push_buf_intermediate_buf = NULL;
282 }
283
284 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
285  * @adapter: private structure
286  *
287  * Return 0 on success, negative on failure
288  */
289 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
290 {
291         int i, rc = 0;
292
293         for (i = 0; i < adapter->num_queues; i++) {
294                 rc = ena_setup_tx_resources(adapter, i);
295                 if (rc)
296                         goto err_setup_tx;
297         }
298
299         return 0;
300
301 err_setup_tx:
302
303         netif_err(adapter, ifup, adapter->netdev,
304                   "Tx queue %d: allocation failed\n", i);
305
306         /* rewind the index freeing the rings as we go */
307         while (i--)
308                 ena_free_tx_resources(adapter, i);
309         return rc;
310 }
311
312 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
313  * @adapter: board private structure
314  *
315  * Free all transmit software resources
316  */
317 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
318 {
319         int i;
320
321         for (i = 0; i < adapter->num_queues; i++)
322                 ena_free_tx_resources(adapter, i);
323 }
324
325 static inline int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
326 {
327         if (likely(req_id < rx_ring->ring_size))
328                 return 0;
329
330         netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
331                   "Invalid rx req_id: %hu\n", req_id);
332
333         u64_stats_update_begin(&rx_ring->syncp);
334         rx_ring->rx_stats.bad_req_id++;
335         u64_stats_update_end(&rx_ring->syncp);
336
337         /* Trigger device reset */
338         rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
339         set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
340         return -EFAULT;
341 }
342
343 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
344  * @adapter: network interface device structure
345  * @qid: queue index
346  *
347  * Returns 0 on success, negative on failure
348  */
349 static int ena_setup_rx_resources(struct ena_adapter *adapter,
350                                   u32 qid)
351 {
352         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
353         struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
354         int size, node, i;
355
356         if (rx_ring->rx_buffer_info) {
357                 netif_err(adapter, ifup, adapter->netdev,
358                           "rx_buffer_info is not NULL");
359                 return -EEXIST;
360         }
361
362         /* alloc extra element so in rx path
363          * we can always prefetch rx_info + 1
364          */
365         size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
366         node = cpu_to_node(ena_irq->cpu);
367
368         rx_ring->rx_buffer_info = vzalloc_node(size, node);
369         if (!rx_ring->rx_buffer_info) {
370                 rx_ring->rx_buffer_info = vzalloc(size);
371                 if (!rx_ring->rx_buffer_info)
372                         return -ENOMEM;
373         }
374
375         size = sizeof(u16) * rx_ring->ring_size;
376         rx_ring->free_rx_ids = vzalloc_node(size, node);
377         if (!rx_ring->free_rx_ids) {
378                 rx_ring->free_rx_ids = vzalloc(size);
379                 if (!rx_ring->free_rx_ids) {
380                         vfree(rx_ring->rx_buffer_info);
381                         return -ENOMEM;
382                 }
383         }
384
385         /* Req id ring for receiving RX pkts out of order */
386         for (i = 0; i < rx_ring->ring_size; i++)
387                 rx_ring->free_rx_ids[i] = i;
388
389         /* Reset rx statistics */
390         memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
391
392         rx_ring->next_to_clean = 0;
393         rx_ring->next_to_use = 0;
394         rx_ring->cpu = ena_irq->cpu;
395
396         return 0;
397 }
398
399 /* ena_free_rx_resources - Free I/O Rx Resources
400  * @adapter: network interface device structure
401  * @qid: queue index
402  *
403  * Free all receive software resources
404  */
405 static void ena_free_rx_resources(struct ena_adapter *adapter,
406                                   u32 qid)
407 {
408         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
409
410         vfree(rx_ring->rx_buffer_info);
411         rx_ring->rx_buffer_info = NULL;
412
413         vfree(rx_ring->free_rx_ids);
414         rx_ring->free_rx_ids = NULL;
415 }
416
417 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
418  * @adapter: board private structure
419  *
420  * Return 0 on success, negative on failure
421  */
422 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
423 {
424         int i, rc = 0;
425
426         for (i = 0; i < adapter->num_queues; i++) {
427                 rc = ena_setup_rx_resources(adapter, i);
428                 if (rc)
429                         goto err_setup_rx;
430         }
431
432         return 0;
433
434 err_setup_rx:
435
436         netif_err(adapter, ifup, adapter->netdev,
437                   "Rx queue %d: allocation failed\n", i);
438
439         /* rewind the index freeing the rings as we go */
440         while (i--)
441                 ena_free_rx_resources(adapter, i);
442         return rc;
443 }
444
445 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
446  * @adapter: board private structure
447  *
448  * Free all receive software resources
449  */
450 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
451 {
452         int i;
453
454         for (i = 0; i < adapter->num_queues; i++)
455                 ena_free_rx_resources(adapter, i);
456 }
457
458 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,
459                                     struct ena_rx_buffer *rx_info, gfp_t gfp)
460 {
461         struct ena_com_buf *ena_buf;
462         struct page *page;
463         dma_addr_t dma;
464
465         /* if previous allocated page is not used */
466         if (unlikely(rx_info->page))
467                 return 0;
468
469         page = alloc_page(gfp);
470         if (unlikely(!page)) {
471                 u64_stats_update_begin(&rx_ring->syncp);
472                 rx_ring->rx_stats.page_alloc_fail++;
473                 u64_stats_update_end(&rx_ring->syncp);
474                 return -ENOMEM;
475         }
476
477         dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
478                            DMA_FROM_DEVICE);
479         if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
480                 u64_stats_update_begin(&rx_ring->syncp);
481                 rx_ring->rx_stats.dma_mapping_err++;
482                 u64_stats_update_end(&rx_ring->syncp);
483
484                 __free_page(page);
485                 return -EIO;
486         }
487         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
488                   "alloc page %p, rx_info %p\n", page, rx_info);
489
490         rx_info->page = page;
491         rx_info->page_offset = 0;
492         ena_buf = &rx_info->ena_buf;
493         ena_buf->paddr = dma;
494         ena_buf->len = ENA_PAGE_SIZE;
495
496         return 0;
497 }
498
499 static void ena_free_rx_page(struct ena_ring *rx_ring,
500                              struct ena_rx_buffer *rx_info)
501 {
502         struct page *page = rx_info->page;
503         struct ena_com_buf *ena_buf = &rx_info->ena_buf;
504
505         if (unlikely(!page)) {
506                 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
507                            "Trying to free unallocated buffer\n");
508                 return;
509         }
510
511         dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE,
512                        DMA_FROM_DEVICE);
513
514         __free_page(page);
515         rx_info->page = NULL;
516 }
517
518 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
519 {
520         u16 next_to_use, req_id;
521         u32 i;
522         int rc;
523
524         next_to_use = rx_ring->next_to_use;
525
526         for (i = 0; i < num; i++) {
527                 struct ena_rx_buffer *rx_info;
528
529                 req_id = rx_ring->free_rx_ids[next_to_use];
530                 rc = validate_rx_req_id(rx_ring, req_id);
531                 if (unlikely(rc < 0))
532                         break;
533
534                 rx_info = &rx_ring->rx_buffer_info[req_id];
535
536
537                 rc = ena_alloc_rx_page(rx_ring, rx_info,
538                                        GFP_ATOMIC | __GFP_COMP);
539                 if (unlikely(rc < 0)) {
540                         netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
541                                    "failed to alloc buffer for rx queue %d\n",
542                                    rx_ring->qid);
543                         break;
544                 }
545                 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
546                                                 &rx_info->ena_buf,
547                                                 req_id);
548                 if (unlikely(rc)) {
549                         netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
550                                    "failed to add buffer for rx queue %d\n",
551                                    rx_ring->qid);
552                         break;
553                 }
554                 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
555                                                    rx_ring->ring_size);
556         }
557
558         if (unlikely(i < num)) {
559                 u64_stats_update_begin(&rx_ring->syncp);
560                 rx_ring->rx_stats.refil_partial++;
561                 u64_stats_update_end(&rx_ring->syncp);
562                 netdev_warn(rx_ring->netdev,
563                             "refilled rx qid %d with only %d buffers (from %d)\n",
564                             rx_ring->qid, i, num);
565         }
566
567         /* ena_com_write_sq_doorbell issues a wmb() */
568         if (likely(i))
569                 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
570
571         rx_ring->next_to_use = next_to_use;
572
573         return i;
574 }
575
576 static void ena_free_rx_bufs(struct ena_adapter *adapter,
577                              u32 qid)
578 {
579         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
580         u32 i;
581
582         for (i = 0; i < rx_ring->ring_size; i++) {
583                 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
584
585                 if (rx_info->page)
586                         ena_free_rx_page(rx_ring, rx_info);
587         }
588 }
589
590 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
591  * @adapter: board private structure
592  *
593  */
594 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
595 {
596         struct ena_ring *rx_ring;
597         int i, rc, bufs_num;
598
599         for (i = 0; i < adapter->num_queues; i++) {
600                 rx_ring = &adapter->rx_ring[i];
601                 bufs_num = rx_ring->ring_size - 1;
602                 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
603
604                 if (unlikely(rc != bufs_num))
605                         netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
606                                    "refilling Queue %d failed. allocated %d buffers from: %d\n",
607                                    i, rc, bufs_num);
608         }
609 }
610
611 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
612 {
613         int i;
614
615         for (i = 0; i < adapter->num_queues; i++)
616                 ena_free_rx_bufs(adapter, i);
617 }
618
619 static inline void ena_unmap_tx_skb(struct ena_ring *tx_ring,
620                                     struct ena_tx_buffer *tx_info)
621 {
622         struct ena_com_buf *ena_buf;
623         u32 cnt;
624         int i;
625
626         ena_buf = tx_info->bufs;
627         cnt = tx_info->num_of_bufs;
628
629         if (unlikely(!cnt))
630                 return;
631
632         if (tx_info->map_linear_data) {
633                 dma_unmap_single(tx_ring->dev,
634                                  dma_unmap_addr(ena_buf, paddr),
635                                  dma_unmap_len(ena_buf, len),
636                                  DMA_TO_DEVICE);
637                 ena_buf++;
638                 cnt--;
639         }
640
641         /* unmap remaining mapped pages */
642         for (i = 0; i < cnt; i++) {
643                 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
644                                dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
645                 ena_buf++;
646         }
647 }
648
649 /* ena_free_tx_bufs - Free Tx Buffers per Queue
650  * @tx_ring: TX ring for which buffers be freed
651  */
652 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
653 {
654         bool print_once = true;
655         u32 i;
656
657         for (i = 0; i < tx_ring->ring_size; i++) {
658                 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
659
660                 if (!tx_info->skb)
661                         continue;
662
663                 if (print_once) {
664                         netdev_notice(tx_ring->netdev,
665                                       "free uncompleted tx skb qid %d idx 0x%x\n",
666                                       tx_ring->qid, i);
667                         print_once = false;
668                 } else {
669                         netdev_dbg(tx_ring->netdev,
670                                    "free uncompleted tx skb qid %d idx 0x%x\n",
671                                    tx_ring->qid, i);
672                 }
673
674                 ena_unmap_tx_skb(tx_ring, tx_info);
675
676                 dev_kfree_skb_any(tx_info->skb);
677         }
678         netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
679                                                   tx_ring->qid));
680 }
681
682 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
683 {
684         struct ena_ring *tx_ring;
685         int i;
686
687         for (i = 0; i < adapter->num_queues; i++) {
688                 tx_ring = &adapter->tx_ring[i];
689                 ena_free_tx_bufs(tx_ring);
690         }
691 }
692
693 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
694 {
695         u16 ena_qid;
696         int i;
697
698         for (i = 0; i < adapter->num_queues; i++) {
699                 ena_qid = ENA_IO_TXQ_IDX(i);
700                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
701         }
702 }
703
704 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
705 {
706         u16 ena_qid;
707         int i;
708
709         for (i = 0; i < adapter->num_queues; i++) {
710                 ena_qid = ENA_IO_RXQ_IDX(i);
711                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
712         }
713 }
714
715 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
716 {
717         ena_destroy_all_tx_queues(adapter);
718         ena_destroy_all_rx_queues(adapter);
719 }
720
721 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
722 {
723         struct ena_tx_buffer *tx_info = NULL;
724
725         if (likely(req_id < tx_ring->ring_size)) {
726                 tx_info = &tx_ring->tx_buffer_info[req_id];
727                 if (likely(tx_info->skb))
728                         return 0;
729         }
730
731         if (tx_info)
732                 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
733                           "tx_info doesn't have valid skb\n");
734         else
735                 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
736                           "Invalid req_id: %hu\n", req_id);
737
738         u64_stats_update_begin(&tx_ring->syncp);
739         tx_ring->tx_stats.bad_req_id++;
740         u64_stats_update_end(&tx_ring->syncp);
741
742         /* Trigger device reset */
743         tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
744         set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
745         return -EFAULT;
746 }
747
748 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
749 {
750         struct netdev_queue *txq;
751         bool above_thresh;
752         u32 tx_bytes = 0;
753         u32 total_done = 0;
754         u16 next_to_clean;
755         u16 req_id;
756         int tx_pkts = 0;
757         int rc;
758
759         next_to_clean = tx_ring->next_to_clean;
760         txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
761
762         while (tx_pkts < budget) {
763                 struct ena_tx_buffer *tx_info;
764                 struct sk_buff *skb;
765
766                 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
767                                                 &req_id);
768                 if (rc)
769                         break;
770
771                 rc = validate_tx_req_id(tx_ring, req_id);
772                 if (rc)
773                         break;
774
775                 tx_info = &tx_ring->tx_buffer_info[req_id];
776                 skb = tx_info->skb;
777
778                 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
779                 prefetch(&skb->end);
780
781                 tx_info->skb = NULL;
782                 tx_info->last_jiffies = 0;
783
784                 ena_unmap_tx_skb(tx_ring, tx_info);
785
786                 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
787                           "tx_poll: q %d skb %p completed\n", tx_ring->qid,
788                           skb);
789
790                 tx_bytes += skb->len;
791                 dev_kfree_skb(skb);
792                 tx_pkts++;
793                 total_done += tx_info->tx_descs;
794
795                 tx_ring->free_tx_ids[next_to_clean] = req_id;
796                 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
797                                                      tx_ring->ring_size);
798         }
799
800         tx_ring->next_to_clean = next_to_clean;
801         ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
802         ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
803
804         netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
805
806         netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
807                   "tx_poll: q %d done. total pkts: %d\n",
808                   tx_ring->qid, tx_pkts);
809
810         /* need to make the rings circular update visible to
811          * ena_start_xmit() before checking for netif_queue_stopped().
812          */
813         smp_mb();
814
815         above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
816                                                     ENA_TX_WAKEUP_THRESH);
817         if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
818                 __netif_tx_lock(txq, smp_processor_id());
819                 above_thresh =
820                         ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
821                                                      ENA_TX_WAKEUP_THRESH);
822                 if (netif_tx_queue_stopped(txq) && above_thresh) {
823                         netif_tx_wake_queue(txq);
824                         u64_stats_update_begin(&tx_ring->syncp);
825                         tx_ring->tx_stats.queue_wakeup++;
826                         u64_stats_update_end(&tx_ring->syncp);
827                 }
828                 __netif_tx_unlock(txq);
829         }
830
831         tx_ring->per_napi_bytes += tx_bytes;
832         tx_ring->per_napi_packets += tx_pkts;
833
834         return tx_pkts;
835 }
836
837 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
838 {
839         struct sk_buff *skb;
840
841         if (frags)
842                 skb = napi_get_frags(rx_ring->napi);
843         else
844                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
845                                                 rx_ring->rx_copybreak);
846
847         if (unlikely(!skb)) {
848                 u64_stats_update_begin(&rx_ring->syncp);
849                 rx_ring->rx_stats.skb_alloc_fail++;
850                 u64_stats_update_end(&rx_ring->syncp);
851                 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
852                           "Failed to allocate skb. frags: %d\n", frags);
853                 return NULL;
854         }
855
856         return skb;
857 }
858
859 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
860                                   struct ena_com_rx_buf_info *ena_bufs,
861                                   u32 descs,
862                                   u16 *next_to_clean)
863 {
864         struct sk_buff *skb;
865         struct ena_rx_buffer *rx_info;
866         u16 len, req_id, buf = 0;
867         void *va;
868
869         len = ena_bufs[buf].len;
870         req_id = ena_bufs[buf].req_id;
871         rx_info = &rx_ring->rx_buffer_info[req_id];
872
873         if (unlikely(!rx_info->page)) {
874                 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
875                           "Page is NULL\n");
876                 return NULL;
877         }
878
879         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
880                   "rx_info %p page %p\n",
881                   rx_info, rx_info->page);
882
883         /* save virt address of first buffer */
884         va = page_address(rx_info->page) + rx_info->page_offset;
885         prefetch(va + NET_IP_ALIGN);
886
887         if (len <= rx_ring->rx_copybreak) {
888                 skb = ena_alloc_skb(rx_ring, false);
889                 if (unlikely(!skb))
890                         return NULL;
891
892                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
893                           "rx allocated small packet. len %d. data_len %d\n",
894                           skb->len, skb->data_len);
895
896                 /* sync this buffer for CPU use */
897                 dma_sync_single_for_cpu(rx_ring->dev,
898                                         dma_unmap_addr(&rx_info->ena_buf, paddr),
899                                         len,
900                                         DMA_FROM_DEVICE);
901                 skb_copy_to_linear_data(skb, va, len);
902                 dma_sync_single_for_device(rx_ring->dev,
903                                            dma_unmap_addr(&rx_info->ena_buf, paddr),
904                                            len,
905                                            DMA_FROM_DEVICE);
906
907                 skb_put(skb, len);
908                 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
909                 rx_ring->free_rx_ids[*next_to_clean] = req_id;
910                 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
911                                                      rx_ring->ring_size);
912                 return skb;
913         }
914
915         skb = ena_alloc_skb(rx_ring, true);
916         if (unlikely(!skb))
917                 return NULL;
918
919         do {
920                 dma_unmap_page(rx_ring->dev,
921                                dma_unmap_addr(&rx_info->ena_buf, paddr),
922                                ENA_PAGE_SIZE, DMA_FROM_DEVICE);
923
924                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
925                                 rx_info->page_offset, len, ENA_PAGE_SIZE);
926
927                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
928                           "rx skb updated. len %d. data_len %d\n",
929                           skb->len, skb->data_len);
930
931                 rx_info->page = NULL;
932
933                 rx_ring->free_rx_ids[*next_to_clean] = req_id;
934                 *next_to_clean =
935                         ENA_RX_RING_IDX_NEXT(*next_to_clean,
936                                              rx_ring->ring_size);
937                 if (likely(--descs == 0))
938                         break;
939
940                 buf++;
941                 len = ena_bufs[buf].len;
942                 req_id = ena_bufs[buf].req_id;
943                 rx_info = &rx_ring->rx_buffer_info[req_id];
944         } while (1);
945
946         return skb;
947 }
948
949 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
950  * @adapter: structure containing adapter specific data
951  * @ena_rx_ctx: received packet context/metadata
952  * @skb: skb currently being received and modified
953  */
954 static inline void ena_rx_checksum(struct ena_ring *rx_ring,
955                                    struct ena_com_rx_ctx *ena_rx_ctx,
956                                    struct sk_buff *skb)
957 {
958         /* Rx csum disabled */
959         if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
960                 skb->ip_summed = CHECKSUM_NONE;
961                 return;
962         }
963
964         /* For fragmented packets the checksum isn't valid */
965         if (ena_rx_ctx->frag) {
966                 skb->ip_summed = CHECKSUM_NONE;
967                 return;
968         }
969
970         /* if IP and error */
971         if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
972                      (ena_rx_ctx->l3_csum_err))) {
973                 /* ipv4 checksum error */
974                 skb->ip_summed = CHECKSUM_NONE;
975                 u64_stats_update_begin(&rx_ring->syncp);
976                 rx_ring->rx_stats.bad_csum++;
977                 u64_stats_update_end(&rx_ring->syncp);
978                 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
979                           "RX IPv4 header checksum error\n");
980                 return;
981         }
982
983         /* if TCP/UDP */
984         if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
985                    (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
986                 if (unlikely(ena_rx_ctx->l4_csum_err)) {
987                         /* TCP/UDP checksum error */
988                         u64_stats_update_begin(&rx_ring->syncp);
989                         rx_ring->rx_stats.bad_csum++;
990                         u64_stats_update_end(&rx_ring->syncp);
991                         netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
992                                   "RX L4 checksum error\n");
993                         skb->ip_summed = CHECKSUM_NONE;
994                         return;
995                 }
996
997                 if (likely(ena_rx_ctx->l4_csum_checked)) {
998                         skb->ip_summed = CHECKSUM_UNNECESSARY;
999                 } else {
1000                         u64_stats_update_begin(&rx_ring->syncp);
1001                         rx_ring->rx_stats.csum_unchecked++;
1002                         u64_stats_update_end(&rx_ring->syncp);
1003                         skb->ip_summed = CHECKSUM_NONE;
1004                 }
1005         } else {
1006                 skb->ip_summed = CHECKSUM_NONE;
1007                 return;
1008         }
1009
1010 }
1011
1012 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1013                             struct ena_com_rx_ctx *ena_rx_ctx,
1014                             struct sk_buff *skb)
1015 {
1016         enum pkt_hash_types hash_type;
1017
1018         if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1019                 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1020                            (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1021
1022                         hash_type = PKT_HASH_TYPE_L4;
1023                 else
1024                         hash_type = PKT_HASH_TYPE_NONE;
1025
1026                 /* Override hash type if the packet is fragmented */
1027                 if (ena_rx_ctx->frag)
1028                         hash_type = PKT_HASH_TYPE_NONE;
1029
1030                 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1031         }
1032 }
1033
1034 /* ena_clean_rx_irq - Cleanup RX irq
1035  * @rx_ring: RX ring to clean
1036  * @napi: napi handler
1037  * @budget: how many packets driver is allowed to clean
1038  *
1039  * Returns the number of cleaned buffers.
1040  */
1041 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1042                             u32 budget)
1043 {
1044         u16 next_to_clean = rx_ring->next_to_clean;
1045         u32 res_budget, work_done;
1046
1047         struct ena_com_rx_ctx ena_rx_ctx;
1048         struct ena_adapter *adapter;
1049         struct sk_buff *skb;
1050         int refill_required;
1051         int refill_threshold;
1052         int rc = 0;
1053         int total_len = 0;
1054         int rx_copybreak_pkt = 0;
1055         int i;
1056
1057         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1058                   "%s qid %d\n", __func__, rx_ring->qid);
1059         res_budget = budget;
1060
1061         do {
1062                 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1063                 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1064                 ena_rx_ctx.descs = 0;
1065                 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1066                                     rx_ring->ena_com_io_sq,
1067                                     &ena_rx_ctx);
1068                 if (unlikely(rc))
1069                         goto error;
1070
1071                 if (unlikely(ena_rx_ctx.descs == 0))
1072                         break;
1073
1074                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1075                           "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1076                           rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1077                           ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1078
1079                 /* allocate skb and fill it */
1080                 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
1081                                  &next_to_clean);
1082
1083                 /* exit if we failed to retrieve a buffer */
1084                 if (unlikely(!skb)) {
1085                         for (i = 0; i < ena_rx_ctx.descs; i++) {
1086                                 rx_ring->free_tx_ids[next_to_clean] =
1087                                         rx_ring->ena_bufs[i].req_id;
1088                                 next_to_clean =
1089                                         ENA_RX_RING_IDX_NEXT(next_to_clean,
1090                                                              rx_ring->ring_size);
1091                         }
1092                         break;
1093                 }
1094
1095                 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1096
1097                 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1098
1099                 skb_record_rx_queue(skb, rx_ring->qid);
1100
1101                 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1102                         total_len += rx_ring->ena_bufs[0].len;
1103                         rx_copybreak_pkt++;
1104                         napi_gro_receive(napi, skb);
1105                 } else {
1106                         total_len += skb->len;
1107                         napi_gro_frags(napi);
1108                 }
1109
1110                 res_budget--;
1111         } while (likely(res_budget));
1112
1113         work_done = budget - res_budget;
1114         rx_ring->per_napi_bytes += total_len;
1115         rx_ring->per_napi_packets += work_done;
1116         u64_stats_update_begin(&rx_ring->syncp);
1117         rx_ring->rx_stats.bytes += total_len;
1118         rx_ring->rx_stats.cnt += work_done;
1119         rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1120         u64_stats_update_end(&rx_ring->syncp);
1121
1122         rx_ring->next_to_clean = next_to_clean;
1123
1124         refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1125         refill_threshold =
1126                 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1127                       ENA_RX_REFILL_THRESH_PACKET);
1128
1129         /* Optimization, try to batch new rx buffers */
1130         if (refill_required > refill_threshold) {
1131                 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1132                 ena_refill_rx_bufs(rx_ring, refill_required);
1133         }
1134
1135         return work_done;
1136
1137 error:
1138         adapter = netdev_priv(rx_ring->netdev);
1139
1140         u64_stats_update_begin(&rx_ring->syncp);
1141         rx_ring->rx_stats.bad_desc_num++;
1142         u64_stats_update_end(&rx_ring->syncp);
1143
1144         /* Too many desc from the device. Trigger reset */
1145         adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1146         set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1147
1148         return 0;
1149 }
1150
1151 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1152                                        struct ena_ring *tx_ring)
1153 {
1154         /* We apply adaptive moderation on Rx path only.
1155          * Tx uses static interrupt moderation.
1156          */
1157         ena_com_calculate_interrupt_delay(rx_ring->ena_dev,
1158                                           rx_ring->per_napi_packets,
1159                                           rx_ring->per_napi_bytes,
1160                                           &rx_ring->smoothed_interval,
1161                                           &rx_ring->moder_tbl_idx);
1162
1163         /* Reset per napi packets/bytes */
1164         tx_ring->per_napi_packets = 0;
1165         tx_ring->per_napi_bytes = 0;
1166         rx_ring->per_napi_packets = 0;
1167         rx_ring->per_napi_bytes = 0;
1168 }
1169
1170 static inline void ena_unmask_interrupt(struct ena_ring *tx_ring,
1171                                         struct ena_ring *rx_ring)
1172 {
1173         struct ena_eth_io_intr_reg intr_reg;
1174
1175         /* Update intr register: rx intr delay,
1176          * tx intr delay and interrupt unmask
1177          */
1178         ena_com_update_intr_reg(&intr_reg,
1179                                 rx_ring->smoothed_interval,
1180                                 tx_ring->smoothed_interval,
1181                                 true);
1182
1183         /* It is a shared MSI-X.
1184          * Tx and Rx CQ have pointer to it.
1185          * So we use one of them to reach the intr reg
1186          */
1187         ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1188 }
1189
1190 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1191                                              struct ena_ring *rx_ring)
1192 {
1193         int cpu = get_cpu();
1194         int numa_node;
1195
1196         /* Check only one ring since the 2 rings are running on the same cpu */
1197         if (likely(tx_ring->cpu == cpu))
1198                 goto out;
1199
1200         numa_node = cpu_to_node(cpu);
1201         put_cpu();
1202
1203         if (numa_node != NUMA_NO_NODE) {
1204                 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1205                 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1206         }
1207
1208         tx_ring->cpu = cpu;
1209         rx_ring->cpu = cpu;
1210
1211         return;
1212 out:
1213         put_cpu();
1214 }
1215
1216 static int ena_io_poll(struct napi_struct *napi, int budget)
1217 {
1218         struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1219         struct ena_ring *tx_ring, *rx_ring;
1220
1221         u32 tx_work_done;
1222         u32 rx_work_done;
1223         int tx_budget;
1224         int napi_comp_call = 0;
1225         int ret;
1226
1227         tx_ring = ena_napi->tx_ring;
1228         rx_ring = ena_napi->rx_ring;
1229
1230         tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1231
1232         if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1233             test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1234                 napi_complete_done(napi, 0);
1235                 return 0;
1236         }
1237
1238         tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1239         rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1240
1241         /* If the device is about to reset or down, avoid unmask
1242          * the interrupt and return 0 so NAPI won't reschedule
1243          */
1244         if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1245                      test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1246                 napi_complete_done(napi, 0);
1247                 ret = 0;
1248
1249         } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1250                 napi_comp_call = 1;
1251
1252                 /* Update numa and unmask the interrupt only when schedule
1253                  * from the interrupt context (vs from sk_busy_loop)
1254                  */
1255                 if (napi_complete_done(napi, rx_work_done)) {
1256                         /* Tx and Rx share the same interrupt vector */
1257                         if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1258                                 ena_adjust_intr_moderation(rx_ring, tx_ring);
1259
1260                         ena_unmask_interrupt(tx_ring, rx_ring);
1261                 }
1262
1263                 ena_update_ring_numa_node(tx_ring, rx_ring);
1264
1265                 ret = rx_work_done;
1266         } else {
1267                 ret = budget;
1268         }
1269
1270         u64_stats_update_begin(&tx_ring->syncp);
1271         tx_ring->tx_stats.napi_comp += napi_comp_call;
1272         tx_ring->tx_stats.tx_poll++;
1273         u64_stats_update_end(&tx_ring->syncp);
1274
1275         return ret;
1276 }
1277
1278 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1279 {
1280         struct ena_adapter *adapter = (struct ena_adapter *)data;
1281
1282         ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1283
1284         /* Don't call the aenq handler before probe is done */
1285         if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1286                 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1287
1288         return IRQ_HANDLED;
1289 }
1290
1291 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1292  * @irq: interrupt number
1293  * @data: pointer to a network interface private napi device structure
1294  */
1295 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1296 {
1297         struct ena_napi *ena_napi = data;
1298
1299         ena_napi->tx_ring->first_interrupt = true;
1300         ena_napi->rx_ring->first_interrupt = true;
1301
1302         napi_schedule_irqoff(&ena_napi->napi);
1303
1304         return IRQ_HANDLED;
1305 }
1306
1307 /* Reserve a single MSI-X vector for management (admin + aenq).
1308  * plus reserve one vector for each potential io queue.
1309  * the number of potential io queues is the minimum of what the device
1310  * supports and the number of vCPUs.
1311  */
1312 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1313 {
1314         int msix_vecs, irq_cnt;
1315
1316         if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1317                 netif_err(adapter, probe, adapter->netdev,
1318                           "Error, MSI-X is already enabled\n");
1319                 return -EPERM;
1320         }
1321
1322         /* Reserved the max msix vectors we might need */
1323         msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1324         netif_dbg(adapter, probe, adapter->netdev,
1325                   "trying to enable MSI-X, vectors %d\n", msix_vecs);
1326
1327         irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1328                                         msix_vecs, PCI_IRQ_MSIX);
1329
1330         if (irq_cnt < 0) {
1331                 netif_err(adapter, probe, adapter->netdev,
1332                           "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1333                 return -ENOSPC;
1334         }
1335
1336         if (irq_cnt != msix_vecs) {
1337                 netif_notice(adapter, probe, adapter->netdev,
1338                              "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1339                              irq_cnt, msix_vecs);
1340                 adapter->num_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1341         }
1342
1343         if (ena_init_rx_cpu_rmap(adapter))
1344                 netif_warn(adapter, probe, adapter->netdev,
1345                            "Failed to map IRQs to CPUs\n");
1346
1347         adapter->msix_vecs = irq_cnt;
1348         set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1349
1350         return 0;
1351 }
1352
1353 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1354 {
1355         u32 cpu;
1356
1357         snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1358                  ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1359                  pci_name(adapter->pdev));
1360         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1361                 ena_intr_msix_mgmnt;
1362         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1363         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1364                 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1365         cpu = cpumask_first(cpu_online_mask);
1366         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1367         cpumask_set_cpu(cpu,
1368                         &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1369 }
1370
1371 static void ena_setup_io_intr(struct ena_adapter *adapter)
1372 {
1373         struct net_device *netdev;
1374         int irq_idx, i, cpu;
1375
1376         netdev = adapter->netdev;
1377
1378         for (i = 0; i < adapter->num_queues; i++) {
1379                 irq_idx = ENA_IO_IRQ_IDX(i);
1380                 cpu = i % num_online_cpus();
1381
1382                 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1383                          "%s-Tx-Rx-%d", netdev->name, i);
1384                 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1385                 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1386                 adapter->irq_tbl[irq_idx].vector =
1387                         pci_irq_vector(adapter->pdev, irq_idx);
1388                 adapter->irq_tbl[irq_idx].cpu = cpu;
1389
1390                 cpumask_set_cpu(cpu,
1391                                 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1392         }
1393 }
1394
1395 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1396 {
1397         unsigned long flags = 0;
1398         struct ena_irq *irq;
1399         int rc;
1400
1401         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1402         rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1403                          irq->data);
1404         if (rc) {
1405                 netif_err(adapter, probe, adapter->netdev,
1406                           "failed to request admin irq\n");
1407                 return rc;
1408         }
1409
1410         netif_dbg(adapter, probe, adapter->netdev,
1411                   "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1412                   irq->affinity_hint_mask.bits[0], irq->vector);
1413
1414         irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1415
1416         return rc;
1417 }
1418
1419 static int ena_request_io_irq(struct ena_adapter *adapter)
1420 {
1421         unsigned long flags = 0;
1422         struct ena_irq *irq;
1423         int rc = 0, i, k;
1424
1425         if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1426                 netif_err(adapter, ifup, adapter->netdev,
1427                           "Failed to request I/O IRQ: MSI-X is not enabled\n");
1428                 return -EINVAL;
1429         }
1430
1431         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1432                 irq = &adapter->irq_tbl[i];
1433                 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1434                                  irq->data);
1435                 if (rc) {
1436                         netif_err(adapter, ifup, adapter->netdev,
1437                                   "Failed to request I/O IRQ. index %d rc %d\n",
1438                                    i, rc);
1439                         goto err;
1440                 }
1441
1442                 netif_dbg(adapter, ifup, adapter->netdev,
1443                           "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1444                           i, irq->affinity_hint_mask.bits[0], irq->vector);
1445
1446                 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1447         }
1448
1449         return rc;
1450
1451 err:
1452         for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1453                 irq = &adapter->irq_tbl[k];
1454                 free_irq(irq->vector, irq->data);
1455         }
1456
1457         return rc;
1458 }
1459
1460 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1461 {
1462         struct ena_irq *irq;
1463
1464         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1465         synchronize_irq(irq->vector);
1466         irq_set_affinity_hint(irq->vector, NULL);
1467         free_irq(irq->vector, irq->data);
1468 }
1469
1470 static void ena_free_io_irq(struct ena_adapter *adapter)
1471 {
1472         struct ena_irq *irq;
1473         int i;
1474
1475 #ifdef CONFIG_RFS_ACCEL
1476         if (adapter->msix_vecs >= 1) {
1477                 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1478                 adapter->netdev->rx_cpu_rmap = NULL;
1479         }
1480 #endif /* CONFIG_RFS_ACCEL */
1481
1482         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1483                 irq = &adapter->irq_tbl[i];
1484                 irq_set_affinity_hint(irq->vector, NULL);
1485                 free_irq(irq->vector, irq->data);
1486         }
1487 }
1488
1489 static void ena_disable_msix(struct ena_adapter *adapter)
1490 {
1491         if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1492                 pci_free_irq_vectors(adapter->pdev);
1493 }
1494
1495 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1496 {
1497         int i;
1498
1499         if (!netif_running(adapter->netdev))
1500                 return;
1501
1502         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1503                 synchronize_irq(adapter->irq_tbl[i].vector);
1504 }
1505
1506 static void ena_del_napi(struct ena_adapter *adapter)
1507 {
1508         int i;
1509
1510         for (i = 0; i < adapter->num_queues; i++)
1511                 netif_napi_del(&adapter->ena_napi[i].napi);
1512 }
1513
1514 static void ena_init_napi(struct ena_adapter *adapter)
1515 {
1516         struct ena_napi *napi;
1517         int i;
1518
1519         for (i = 0; i < adapter->num_queues; i++) {
1520                 napi = &adapter->ena_napi[i];
1521
1522                 netif_napi_add(adapter->netdev,
1523                                &adapter->ena_napi[i].napi,
1524                                ena_io_poll,
1525                                ENA_NAPI_BUDGET);
1526                 napi->rx_ring = &adapter->rx_ring[i];
1527                 napi->tx_ring = &adapter->tx_ring[i];
1528                 napi->qid = i;
1529         }
1530 }
1531
1532 static void ena_napi_disable_all(struct ena_adapter *adapter)
1533 {
1534         int i;
1535
1536         for (i = 0; i < adapter->num_queues; i++)
1537                 napi_disable(&adapter->ena_napi[i].napi);
1538 }
1539
1540 static void ena_napi_enable_all(struct ena_adapter *adapter)
1541 {
1542         int i;
1543
1544         for (i = 0; i < adapter->num_queues; i++)
1545                 napi_enable(&adapter->ena_napi[i].napi);
1546 }
1547
1548 static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1549 {
1550         adapter->tx_usecs = 0;
1551         adapter->rx_usecs = 0;
1552         adapter->tx_frames = 1;
1553         adapter->rx_frames = 1;
1554 }
1555
1556 /* Configure the Rx forwarding */
1557 static int ena_rss_configure(struct ena_adapter *adapter)
1558 {
1559         struct ena_com_dev *ena_dev = adapter->ena_dev;
1560         int rc;
1561
1562         /* In case the RSS table wasn't initialized by probe */
1563         if (!ena_dev->rss.tbl_log_size) {
1564                 rc = ena_rss_init_default(adapter);
1565                 if (rc && (rc != -EOPNOTSUPP)) {
1566                         netif_err(adapter, ifup, adapter->netdev,
1567                                   "Failed to init RSS rc: %d\n", rc);
1568                         return rc;
1569                 }
1570         }
1571
1572         /* Set indirect table */
1573         rc = ena_com_indirect_table_set(ena_dev);
1574         if (unlikely(rc && rc != -EOPNOTSUPP))
1575                 return rc;
1576
1577         /* Configure hash function (if supported) */
1578         rc = ena_com_set_hash_function(ena_dev);
1579         if (unlikely(rc && (rc != -EOPNOTSUPP)))
1580                 return rc;
1581
1582         /* Configure hash inputs (if supported) */
1583         rc = ena_com_set_hash_ctrl(ena_dev);
1584         if (unlikely(rc && (rc != -EOPNOTSUPP)))
1585                 return rc;
1586
1587         return 0;
1588 }
1589
1590 static int ena_up_complete(struct ena_adapter *adapter)
1591 {
1592         int rc;
1593
1594         rc = ena_rss_configure(adapter);
1595         if (rc)
1596                 return rc;
1597
1598         ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1599
1600         ena_refill_all_rx_bufs(adapter);
1601
1602         /* enable transmits */
1603         netif_tx_start_all_queues(adapter->netdev);
1604
1605         ena_restore_ethtool_params(adapter);
1606
1607         ena_napi_enable_all(adapter);
1608
1609         return 0;
1610 }
1611
1612 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1613 {
1614         struct ena_com_create_io_ctx ctx;
1615         struct ena_com_dev *ena_dev;
1616         struct ena_ring *tx_ring;
1617         u32 msix_vector;
1618         u16 ena_qid;
1619         int rc;
1620
1621         ena_dev = adapter->ena_dev;
1622
1623         tx_ring = &adapter->tx_ring[qid];
1624         msix_vector = ENA_IO_IRQ_IDX(qid);
1625         ena_qid = ENA_IO_TXQ_IDX(qid);
1626
1627         memset(&ctx, 0x0, sizeof(ctx));
1628
1629         ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1630         ctx.qid = ena_qid;
1631         ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1632         ctx.msix_vector = msix_vector;
1633         ctx.queue_size = adapter->tx_ring_size;
1634         ctx.numa_node = cpu_to_node(tx_ring->cpu);
1635
1636         rc = ena_com_create_io_queue(ena_dev, &ctx);
1637         if (rc) {
1638                 netif_err(adapter, ifup, adapter->netdev,
1639                           "Failed to create I/O TX queue num %d rc: %d\n",
1640                           qid, rc);
1641                 return rc;
1642         }
1643
1644         rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1645                                      &tx_ring->ena_com_io_sq,
1646                                      &tx_ring->ena_com_io_cq);
1647         if (rc) {
1648                 netif_err(adapter, ifup, adapter->netdev,
1649                           "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1650                           qid, rc);
1651                 ena_com_destroy_io_queue(ena_dev, ena_qid);
1652                 return rc;
1653         }
1654
1655         ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1656         return rc;
1657 }
1658
1659 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1660 {
1661         struct ena_com_dev *ena_dev = adapter->ena_dev;
1662         int rc, i;
1663
1664         for (i = 0; i < adapter->num_queues; i++) {
1665                 rc = ena_create_io_tx_queue(adapter, i);
1666                 if (rc)
1667                         goto create_err;
1668         }
1669
1670         return 0;
1671
1672 create_err:
1673         while (i--)
1674                 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1675
1676         return rc;
1677 }
1678
1679 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1680 {
1681         struct ena_com_dev *ena_dev;
1682         struct ena_com_create_io_ctx ctx;
1683         struct ena_ring *rx_ring;
1684         u32 msix_vector;
1685         u16 ena_qid;
1686         int rc;
1687
1688         ena_dev = adapter->ena_dev;
1689
1690         rx_ring = &adapter->rx_ring[qid];
1691         msix_vector = ENA_IO_IRQ_IDX(qid);
1692         ena_qid = ENA_IO_RXQ_IDX(qid);
1693
1694         memset(&ctx, 0x0, sizeof(ctx));
1695
1696         ctx.qid = ena_qid;
1697         ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1698         ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1699         ctx.msix_vector = msix_vector;
1700         ctx.queue_size = adapter->rx_ring_size;
1701         ctx.numa_node = cpu_to_node(rx_ring->cpu);
1702
1703         rc = ena_com_create_io_queue(ena_dev, &ctx);
1704         if (rc) {
1705                 netif_err(adapter, ifup, adapter->netdev,
1706                           "Failed to create I/O RX queue num %d rc: %d\n",
1707                           qid, rc);
1708                 return rc;
1709         }
1710
1711         rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1712                                      &rx_ring->ena_com_io_sq,
1713                                      &rx_ring->ena_com_io_cq);
1714         if (rc) {
1715                 netif_err(adapter, ifup, adapter->netdev,
1716                           "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1717                           qid, rc);
1718                 ena_com_destroy_io_queue(ena_dev, ena_qid);
1719                 return rc;
1720         }
1721
1722         ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1723
1724         return rc;
1725 }
1726
1727 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1728 {
1729         struct ena_com_dev *ena_dev = adapter->ena_dev;
1730         int rc, i;
1731
1732         for (i = 0; i < adapter->num_queues; i++) {
1733                 rc = ena_create_io_rx_queue(adapter, i);
1734                 if (rc)
1735                         goto create_err;
1736         }
1737
1738         return 0;
1739
1740 create_err:
1741         while (i--)
1742                 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1743
1744         return rc;
1745 }
1746
1747 static int ena_up(struct ena_adapter *adapter)
1748 {
1749         int rc, i;
1750
1751         netdev_dbg(adapter->netdev, "%s\n", __func__);
1752
1753         ena_setup_io_intr(adapter);
1754
1755         /* napi poll functions should be initialized before running
1756          * request_irq(), to handle a rare condition where there is a pending
1757          * interrupt, causing the ISR to fire immediately while the poll
1758          * function wasn't set yet, causing a null dereference
1759          */
1760         ena_init_napi(adapter);
1761
1762         rc = ena_request_io_irq(adapter);
1763         if (rc)
1764                 goto err_req_irq;
1765
1766         /* allocate transmit descriptors */
1767         rc = ena_setup_all_tx_resources(adapter);
1768         if (rc)
1769                 goto err_setup_tx;
1770
1771         /* allocate receive descriptors */
1772         rc = ena_setup_all_rx_resources(adapter);
1773         if (rc)
1774                 goto err_setup_rx;
1775
1776         /* Create TX queues */
1777         rc = ena_create_all_io_tx_queues(adapter);
1778         if (rc)
1779                 goto err_create_tx_queues;
1780
1781         /* Create RX queues */
1782         rc = ena_create_all_io_rx_queues(adapter);
1783         if (rc)
1784                 goto err_create_rx_queues;
1785
1786         rc = ena_up_complete(adapter);
1787         if (rc)
1788                 goto err_up;
1789
1790         if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1791                 netif_carrier_on(adapter->netdev);
1792
1793         u64_stats_update_begin(&adapter->syncp);
1794         adapter->dev_stats.interface_up++;
1795         u64_stats_update_end(&adapter->syncp);
1796
1797         set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1798
1799         /* Enable completion queues interrupt */
1800         for (i = 0; i < adapter->num_queues; i++)
1801                 ena_unmask_interrupt(&adapter->tx_ring[i],
1802                                      &adapter->rx_ring[i]);
1803
1804         /* schedule napi in case we had pending packets
1805          * from the last time we disable napi
1806          */
1807         for (i = 0; i < adapter->num_queues; i++)
1808                 napi_schedule(&adapter->ena_napi[i].napi);
1809
1810         return rc;
1811
1812 err_up:
1813         ena_destroy_all_rx_queues(adapter);
1814 err_create_rx_queues:
1815         ena_destroy_all_tx_queues(adapter);
1816 err_create_tx_queues:
1817         ena_free_all_io_rx_resources(adapter);
1818 err_setup_rx:
1819         ena_free_all_io_tx_resources(adapter);
1820 err_setup_tx:
1821         ena_free_io_irq(adapter);
1822 err_req_irq:
1823
1824         return rc;
1825 }
1826
1827 static void ena_down(struct ena_adapter *adapter)
1828 {
1829         netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1830
1831         clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1832
1833         u64_stats_update_begin(&adapter->syncp);
1834         adapter->dev_stats.interface_down++;
1835         u64_stats_update_end(&adapter->syncp);
1836
1837         netif_carrier_off(adapter->netdev);
1838         netif_tx_disable(adapter->netdev);
1839
1840         /* After this point the napi handler won't enable the tx queue */
1841         ena_napi_disable_all(adapter);
1842
1843         /* After destroy the queue there won't be any new interrupts */
1844
1845         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1846                 int rc;
1847
1848                 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
1849                 if (rc)
1850                         dev_err(&adapter->pdev->dev, "Device reset failed\n");
1851                 /* stop submitting admin commands on a device that was reset */
1852                 ena_com_set_admin_running_state(adapter->ena_dev, false);
1853         }
1854
1855         ena_destroy_all_io_queues(adapter);
1856
1857         ena_disable_io_intr_sync(adapter);
1858         ena_free_io_irq(adapter);
1859         ena_del_napi(adapter);
1860
1861         ena_free_all_tx_bufs(adapter);
1862         ena_free_all_rx_bufs(adapter);
1863         ena_free_all_io_tx_resources(adapter);
1864         ena_free_all_io_rx_resources(adapter);
1865 }
1866
1867 /* ena_open - Called when a network interface is made active
1868  * @netdev: network interface device structure
1869  *
1870  * Returns 0 on success, negative value on failure
1871  *
1872  * The open entry point is called when a network interface is made
1873  * active by the system (IFF_UP).  At this point all resources needed
1874  * for transmit and receive operations are allocated, the interrupt
1875  * handler is registered with the OS, the watchdog timer is started,
1876  * and the stack is notified that the interface is ready.
1877  */
1878 static int ena_open(struct net_device *netdev)
1879 {
1880         struct ena_adapter *adapter = netdev_priv(netdev);
1881         int rc;
1882
1883         /* Notify the stack of the actual queue counts. */
1884         rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1885         if (rc) {
1886                 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1887                 return rc;
1888         }
1889
1890         rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
1891         if (rc) {
1892                 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1893                 return rc;
1894         }
1895
1896         rc = ena_up(adapter);
1897         if (rc)
1898                 return rc;
1899
1900         return rc;
1901 }
1902
1903 /* ena_close - Disables a network interface
1904  * @netdev: network interface device structure
1905  *
1906  * Returns 0, this is not allowed to fail
1907  *
1908  * The close entry point is called when an interface is de-activated
1909  * by the OS.  The hardware is still under the drivers control, but
1910  * needs to be disabled.  A global MAC reset is issued to stop the
1911  * hardware, and all transmit and receive resources are freed.
1912  */
1913 static int ena_close(struct net_device *netdev)
1914 {
1915         struct ena_adapter *adapter = netdev_priv(netdev);
1916
1917         netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
1918
1919         if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
1920                 return 0;
1921
1922         if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
1923                 ena_down(adapter);
1924
1925         /* Check for device status and issue reset if needed*/
1926         check_for_admin_com_state(adapter);
1927         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
1928                 netif_err(adapter, ifdown, adapter->netdev,
1929                           "Destroy failure, restarting device\n");
1930                 ena_dump_stats_to_dmesg(adapter);
1931                 /* rtnl lock already obtained in dev_ioctl() layer */
1932                 ena_destroy_device(adapter, false);
1933                 ena_restore_device(adapter);
1934         }
1935
1936         return 0;
1937 }
1938
1939 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1940 {
1941         u32 mss = skb_shinfo(skb)->gso_size;
1942         struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
1943         u8 l4_protocol = 0;
1944
1945         if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
1946                 ena_tx_ctx->l4_csum_enable = 1;
1947                 if (mss) {
1948                         ena_tx_ctx->tso_enable = 1;
1949                         ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
1950                         ena_tx_ctx->l4_csum_partial = 0;
1951                 } else {
1952                         ena_tx_ctx->tso_enable = 0;
1953                         ena_meta->l4_hdr_len = 0;
1954                         ena_tx_ctx->l4_csum_partial = 1;
1955                 }
1956
1957                 switch (ip_hdr(skb)->version) {
1958                 case IPVERSION:
1959                         ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
1960                         if (ip_hdr(skb)->frag_off & htons(IP_DF))
1961                                 ena_tx_ctx->df = 1;
1962                         if (mss)
1963                                 ena_tx_ctx->l3_csum_enable = 1;
1964                         l4_protocol = ip_hdr(skb)->protocol;
1965                         break;
1966                 case 6:
1967                         ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
1968                         l4_protocol = ipv6_hdr(skb)->nexthdr;
1969                         break;
1970                 default:
1971                         break;
1972                 }
1973
1974                 if (l4_protocol == IPPROTO_TCP)
1975                         ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
1976                 else
1977                         ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
1978
1979                 ena_meta->mss = mss;
1980                 ena_meta->l3_hdr_len = skb_network_header_len(skb);
1981                 ena_meta->l3_hdr_offset = skb_network_offset(skb);
1982                 ena_tx_ctx->meta_valid = 1;
1983
1984         } else {
1985                 ena_tx_ctx->meta_valid = 0;
1986         }
1987 }
1988
1989 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
1990                                        struct sk_buff *skb)
1991 {
1992         int num_frags, header_len, rc;
1993
1994         num_frags = skb_shinfo(skb)->nr_frags;
1995         header_len = skb_headlen(skb);
1996
1997         if (num_frags < tx_ring->sgl_size)
1998                 return 0;
1999
2000         if ((num_frags == tx_ring->sgl_size) &&
2001             (header_len < tx_ring->tx_max_header_size))
2002                 return 0;
2003
2004         u64_stats_update_begin(&tx_ring->syncp);
2005         tx_ring->tx_stats.linearize++;
2006         u64_stats_update_end(&tx_ring->syncp);
2007
2008         rc = skb_linearize(skb);
2009         if (unlikely(rc)) {
2010                 u64_stats_update_begin(&tx_ring->syncp);
2011                 tx_ring->tx_stats.linearize_failed++;
2012                 u64_stats_update_end(&tx_ring->syncp);
2013         }
2014
2015         return rc;
2016 }
2017
2018 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2019                           struct ena_tx_buffer *tx_info,
2020                           struct sk_buff *skb,
2021                           void **push_hdr,
2022                           u16 *header_len)
2023 {
2024         struct ena_adapter *adapter = tx_ring->adapter;
2025         struct ena_com_buf *ena_buf;
2026         dma_addr_t dma;
2027         u32 skb_head_len, frag_len, last_frag;
2028         u16 push_len = 0;
2029         u16 delta = 0;
2030         int i = 0;
2031
2032         skb_head_len = skb_headlen(skb);
2033         tx_info->skb = skb;
2034         ena_buf = tx_info->bufs;
2035
2036         if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2037                 /* When the device is LLQ mode, the driver will copy
2038                  * the header into the device memory space.
2039                  * the ena_com layer assume the header is in a linear
2040                  * memory space.
2041                  * This assumption might be wrong since part of the header
2042                  * can be in the fragmented buffers.
2043                  * Use skb_header_pointer to make sure the header is in a
2044                  * linear memory space.
2045                  */
2046
2047                 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2048                 *push_hdr = skb_header_pointer(skb, 0, push_len,
2049                                                tx_ring->push_buf_intermediate_buf);
2050                 *header_len = push_len;
2051                 if (unlikely(skb->data != *push_hdr)) {
2052                         u64_stats_update_begin(&tx_ring->syncp);
2053                         tx_ring->tx_stats.llq_buffer_copy++;
2054                         u64_stats_update_end(&tx_ring->syncp);
2055
2056                         delta = push_len - skb_head_len;
2057                 }
2058         } else {
2059                 *push_hdr = NULL;
2060                 *header_len = min_t(u32, skb_head_len,
2061                                     tx_ring->tx_max_header_size);
2062         }
2063
2064         netif_dbg(adapter, tx_queued, adapter->netdev,
2065                   "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2066                   *push_hdr, push_len);
2067
2068         if (skb_head_len > push_len) {
2069                 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2070                                      skb_head_len - push_len, DMA_TO_DEVICE);
2071                 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2072                         goto error_report_dma_error;
2073
2074                 ena_buf->paddr = dma;
2075                 ena_buf->len = skb_head_len - push_len;
2076
2077                 ena_buf++;
2078                 tx_info->num_of_bufs++;
2079                 tx_info->map_linear_data = 1;
2080         } else {
2081                 tx_info->map_linear_data = 0;
2082         }
2083
2084         last_frag = skb_shinfo(skb)->nr_frags;
2085
2086         for (i = 0; i < last_frag; i++) {
2087                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2088
2089                 frag_len = skb_frag_size(frag);
2090
2091                 if (unlikely(delta >= frag_len)) {
2092                         delta -= frag_len;
2093                         continue;
2094                 }
2095
2096                 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2097                                        frag_len - delta, DMA_TO_DEVICE);
2098                 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2099                         goto error_report_dma_error;
2100
2101                 ena_buf->paddr = dma;
2102                 ena_buf->len = frag_len - delta;
2103                 ena_buf++;
2104                 tx_info->num_of_bufs++;
2105                 delta = 0;
2106         }
2107
2108         return 0;
2109
2110 error_report_dma_error:
2111         u64_stats_update_begin(&tx_ring->syncp);
2112         tx_ring->tx_stats.dma_mapping_err++;
2113         u64_stats_update_end(&tx_ring->syncp);
2114         netdev_warn(adapter->netdev, "failed to map skb\n");
2115
2116         tx_info->skb = NULL;
2117
2118         tx_info->num_of_bufs += i;
2119         ena_unmap_tx_skb(tx_ring, tx_info);
2120
2121         return -EINVAL;
2122 }
2123
2124 /* Called with netif_tx_lock. */
2125 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2126 {
2127         struct ena_adapter *adapter = netdev_priv(dev);
2128         struct ena_tx_buffer *tx_info;
2129         struct ena_com_tx_ctx ena_tx_ctx;
2130         struct ena_ring *tx_ring;
2131         struct netdev_queue *txq;
2132         void *push_hdr;
2133         u16 next_to_use, req_id, header_len;
2134         int qid, rc, nb_hw_desc;
2135
2136         netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2137         /*  Determine which tx ring we will be placed on */
2138         qid = skb_get_queue_mapping(skb);
2139         tx_ring = &adapter->tx_ring[qid];
2140         txq = netdev_get_tx_queue(dev, qid);
2141
2142         rc = ena_check_and_linearize_skb(tx_ring, skb);
2143         if (unlikely(rc))
2144                 goto error_drop_packet;
2145
2146         skb_tx_timestamp(skb);
2147
2148         next_to_use = tx_ring->next_to_use;
2149         req_id = tx_ring->free_tx_ids[next_to_use];
2150         tx_info = &tx_ring->tx_buffer_info[req_id];
2151         tx_info->num_of_bufs = 0;
2152
2153         WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2154
2155         rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2156         if (unlikely(rc))
2157                 goto error_drop_packet;
2158
2159         memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2160         ena_tx_ctx.ena_bufs = tx_info->bufs;
2161         ena_tx_ctx.push_header = push_hdr;
2162         ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2163         ena_tx_ctx.req_id = req_id;
2164         ena_tx_ctx.header_len = header_len;
2165
2166         /* set flags and meta data */
2167         ena_tx_csum(&ena_tx_ctx, skb);
2168
2169         /* prepare the packet's descriptors to dma engine */
2170         rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
2171                                 &nb_hw_desc);
2172
2173         /* ena_com_prepare_tx() can't fail due to overflow of tx queue,
2174          * since the number of free descriptors in the queue is checked
2175          * after sending the previous packet. In case there isn't enough
2176          * space in the queue for the next packet, it is stopped
2177          * until there is again enough available space in the queue.
2178          * All other failure reasons of ena_com_prepare_tx() are fatal
2179          * and therefore require a device reset.
2180          */
2181         if (unlikely(rc)) {
2182                 netif_err(adapter, tx_queued, dev,
2183                           "failed to prepare tx bufs\n");
2184                 u64_stats_update_begin(&tx_ring->syncp);
2185                 tx_ring->tx_stats.prepare_ctx_err++;
2186                 u64_stats_update_end(&tx_ring->syncp);
2187                 adapter->reset_reason = ENA_REGS_RESET_DRIVER_INVALID_STATE;
2188                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2189                 goto error_unmap_dma;
2190         }
2191
2192         netdev_tx_sent_queue(txq, skb->len);
2193
2194         u64_stats_update_begin(&tx_ring->syncp);
2195         tx_ring->tx_stats.cnt++;
2196         tx_ring->tx_stats.bytes += skb->len;
2197         u64_stats_update_end(&tx_ring->syncp);
2198
2199         tx_info->tx_descs = nb_hw_desc;
2200         tx_info->last_jiffies = jiffies;
2201         tx_info->print_once = 0;
2202
2203         tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2204                 tx_ring->ring_size);
2205
2206         /* stop the queue when no more space available, the packet can have up
2207          * to sgl_size + 2. one for the meta descriptor and one for header
2208          * (if the header is larger than tx_max_header_size).
2209          */
2210         if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2211                                                    tx_ring->sgl_size + 2))) {
2212                 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2213                           __func__, qid);
2214
2215                 netif_tx_stop_queue(txq);
2216                 u64_stats_update_begin(&tx_ring->syncp);
2217                 tx_ring->tx_stats.queue_stop++;
2218                 u64_stats_update_end(&tx_ring->syncp);
2219
2220                 /* There is a rare condition where this function decide to
2221                  * stop the queue but meanwhile clean_tx_irq updates
2222                  * next_to_completion and terminates.
2223                  * The queue will remain stopped forever.
2224                  * To solve this issue add a mb() to make sure that
2225                  * netif_tx_stop_queue() write is vissible before checking if
2226                  * there is additional space in the queue.
2227                  */
2228                 smp_mb();
2229
2230                 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2231                                                  ENA_TX_WAKEUP_THRESH)) {
2232                         netif_tx_wake_queue(txq);
2233                         u64_stats_update_begin(&tx_ring->syncp);
2234                         tx_ring->tx_stats.queue_wakeup++;
2235                         u64_stats_update_end(&tx_ring->syncp);
2236                 }
2237         }
2238
2239         if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
2240                 /* trigger the dma engine. ena_com_write_sq_doorbell()
2241                  * has a mb
2242                  */
2243                 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2244                 u64_stats_update_begin(&tx_ring->syncp);
2245                 tx_ring->tx_stats.doorbells++;
2246                 u64_stats_update_end(&tx_ring->syncp);
2247         }
2248
2249         return NETDEV_TX_OK;
2250
2251 error_unmap_dma:
2252         ena_unmap_tx_skb(tx_ring, tx_info);
2253         tx_info->skb = NULL;
2254
2255 error_drop_packet:
2256         dev_kfree_skb(skb);
2257         return NETDEV_TX_OK;
2258 }
2259
2260 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2261                             struct net_device *sb_dev)
2262 {
2263         u16 qid;
2264         /* we suspect that this is good for in--kernel network services that
2265          * want to loop incoming skb rx to tx in normal user generated traffic,
2266          * most probably we will not get to this
2267          */
2268         if (skb_rx_queue_recorded(skb))
2269                 qid = skb_get_rx_queue(skb);
2270         else
2271                 qid = netdev_pick_tx(dev, skb, NULL);
2272
2273         return qid;
2274 }
2275
2276 static void ena_config_host_info(struct ena_com_dev *ena_dev,
2277                                  struct pci_dev *pdev)
2278 {
2279         struct ena_admin_host_info *host_info;
2280         int rc;
2281
2282         /* Allocate only the host info */
2283         rc = ena_com_allocate_host_info(ena_dev);
2284         if (rc) {
2285                 pr_err("Cannot allocate host info\n");
2286                 return;
2287         }
2288
2289         host_info = ena_dev->host_attr.host_info;
2290
2291         host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
2292         host_info->os_type = ENA_ADMIN_OS_LINUX;
2293         host_info->kernel_ver = LINUX_VERSION_CODE;
2294         strncpy(host_info->kernel_ver_str, utsname()->version,
2295                 sizeof(host_info->kernel_ver_str) - 1);
2296         host_info->os_dist = 0;
2297         strncpy(host_info->os_dist_str, utsname()->release,
2298                 sizeof(host_info->os_dist_str) - 1);
2299         host_info->driver_version =
2300                 (DRV_MODULE_VER_MAJOR) |
2301                 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2302                 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
2303                 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
2304         host_info->num_cpus = num_online_cpus();
2305
2306         rc = ena_com_set_host_attributes(ena_dev);
2307         if (rc) {
2308                 if (rc == -EOPNOTSUPP)
2309                         pr_warn("Cannot set host attributes\n");
2310                 else
2311                         pr_err("Cannot set host attributes\n");
2312
2313                 goto err;
2314         }
2315
2316         return;
2317
2318 err:
2319         ena_com_delete_host_info(ena_dev);
2320 }
2321
2322 static void ena_config_debug_area(struct ena_adapter *adapter)
2323 {
2324         u32 debug_area_size;
2325         int rc, ss_count;
2326
2327         ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2328         if (ss_count <= 0) {
2329                 netif_err(adapter, drv, adapter->netdev,
2330                           "SS count is negative\n");
2331                 return;
2332         }
2333
2334         /* allocate 32 bytes for each string and 64bit for the value */
2335         debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2336
2337         rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2338         if (rc) {
2339                 pr_err("Cannot allocate debug area\n");
2340                 return;
2341         }
2342
2343         rc = ena_com_set_host_attributes(adapter->ena_dev);
2344         if (rc) {
2345                 if (rc == -EOPNOTSUPP)
2346                         netif_warn(adapter, drv, adapter->netdev,
2347                                    "Cannot set host attributes\n");
2348                 else
2349                         netif_err(adapter, drv, adapter->netdev,
2350                                   "Cannot set host attributes\n");
2351                 goto err;
2352         }
2353
2354         return;
2355 err:
2356         ena_com_delete_debug_area(adapter->ena_dev);
2357 }
2358
2359 static void ena_get_stats64(struct net_device *netdev,
2360                             struct rtnl_link_stats64 *stats)
2361 {
2362         struct ena_adapter *adapter = netdev_priv(netdev);
2363         struct ena_ring *rx_ring, *tx_ring;
2364         unsigned int start;
2365         u64 rx_drops;
2366         int i;
2367
2368         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2369                 return;
2370
2371         for (i = 0; i < adapter->num_queues; i++) {
2372                 u64 bytes, packets;
2373
2374                 tx_ring = &adapter->tx_ring[i];
2375
2376                 do {
2377                         start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2378                         packets = tx_ring->tx_stats.cnt;
2379                         bytes = tx_ring->tx_stats.bytes;
2380                 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
2381
2382                 stats->tx_packets += packets;
2383                 stats->tx_bytes += bytes;
2384
2385                 rx_ring = &adapter->rx_ring[i];
2386
2387                 do {
2388                         start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2389                         packets = rx_ring->rx_stats.cnt;
2390                         bytes = rx_ring->rx_stats.bytes;
2391                 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2392
2393                 stats->rx_packets += packets;
2394                 stats->rx_bytes += bytes;
2395         }
2396
2397         do {
2398                 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2399                 rx_drops = adapter->dev_stats.rx_drops;
2400         } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
2401
2402         stats->rx_dropped = rx_drops;
2403
2404         stats->multicast = 0;
2405         stats->collisions = 0;
2406
2407         stats->rx_length_errors = 0;
2408         stats->rx_crc_errors = 0;
2409         stats->rx_frame_errors = 0;
2410         stats->rx_fifo_errors = 0;
2411         stats->rx_missed_errors = 0;
2412         stats->tx_window_errors = 0;
2413
2414         stats->rx_errors = 0;
2415         stats->tx_errors = 0;
2416 }
2417
2418 static const struct net_device_ops ena_netdev_ops = {
2419         .ndo_open               = ena_open,
2420         .ndo_stop               = ena_close,
2421         .ndo_start_xmit         = ena_start_xmit,
2422         .ndo_select_queue       = ena_select_queue,
2423         .ndo_get_stats64        = ena_get_stats64,
2424         .ndo_tx_timeout         = ena_tx_timeout,
2425         .ndo_change_mtu         = ena_change_mtu,
2426         .ndo_set_mac_address    = NULL,
2427         .ndo_validate_addr      = eth_validate_addr,
2428 };
2429
2430 static int ena_device_validate_params(struct ena_adapter *adapter,
2431                                       struct ena_com_dev_get_features_ctx *get_feat_ctx)
2432 {
2433         struct net_device *netdev = adapter->netdev;
2434         int rc;
2435
2436         rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2437                               adapter->mac_addr);
2438         if (!rc) {
2439                 netif_err(adapter, drv, netdev,
2440                           "Error, mac address are different\n");
2441                 return -EINVAL;
2442         }
2443
2444         if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2445             (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2446                 netif_err(adapter, drv, netdev,
2447                           "Error, device doesn't support enough queues\n");
2448                 return -EINVAL;
2449         }
2450
2451         if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2452                 netif_err(adapter, drv, netdev,
2453                           "Error, device max mtu is smaller than netdev MTU\n");
2454                 return -EINVAL;
2455         }
2456
2457         return 0;
2458 }
2459
2460 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2461                            struct ena_com_dev_get_features_ctx *get_feat_ctx,
2462                            bool *wd_state)
2463 {
2464         struct device *dev = &pdev->dev;
2465         bool readless_supported;
2466         u32 aenq_groups;
2467         int dma_width;
2468         int rc;
2469
2470         rc = ena_com_mmio_reg_read_request_init(ena_dev);
2471         if (rc) {
2472                 dev_err(dev, "failed to init mmio read less\n");
2473                 return rc;
2474         }
2475
2476         /* The PCIe configuration space revision id indicate if mmio reg
2477          * read is disabled
2478          */
2479         readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2480         ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2481
2482         rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
2483         if (rc) {
2484                 dev_err(dev, "Can not reset device\n");
2485                 goto err_mmio_read_less;
2486         }
2487
2488         rc = ena_com_validate_version(ena_dev);
2489         if (rc) {
2490                 dev_err(dev, "device version is too low\n");
2491                 goto err_mmio_read_less;
2492         }
2493
2494         dma_width = ena_com_get_dma_width(ena_dev);
2495         if (dma_width < 0) {
2496                 dev_err(dev, "Invalid dma width value %d", dma_width);
2497                 rc = dma_width;
2498                 goto err_mmio_read_less;
2499         }
2500
2501         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2502         if (rc) {
2503                 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2504                 goto err_mmio_read_less;
2505         }
2506
2507         rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2508         if (rc) {
2509                 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2510                         rc);
2511                 goto err_mmio_read_less;
2512         }
2513
2514         /* ENA admin level init */
2515         rc = ena_com_admin_init(ena_dev, &aenq_handlers);
2516         if (rc) {
2517                 dev_err(dev,
2518                         "Can not initialize ena admin queue with device\n");
2519                 goto err_mmio_read_less;
2520         }
2521
2522         /* To enable the msix interrupts the driver needs to know the number
2523          * of queues. So the driver uses polling mode to retrieve this
2524          * information
2525          */
2526         ena_com_set_admin_polling_mode(ena_dev, true);
2527
2528         ena_config_host_info(ena_dev, pdev);
2529
2530         /* Get Device Attributes*/
2531         rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2532         if (rc) {
2533                 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2534                 goto err_admin_init;
2535         }
2536
2537         /* Try to turn all the available aenq groups */
2538         aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2539                 BIT(ENA_ADMIN_FATAL_ERROR) |
2540                 BIT(ENA_ADMIN_WARNING) |
2541                 BIT(ENA_ADMIN_NOTIFICATION) |
2542                 BIT(ENA_ADMIN_KEEP_ALIVE);
2543
2544         aenq_groups &= get_feat_ctx->aenq.supported_groups;
2545
2546         rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2547         if (rc) {
2548                 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2549                 goto err_admin_init;
2550         }
2551
2552         *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2553
2554         return 0;
2555
2556 err_admin_init:
2557         ena_com_delete_host_info(ena_dev);
2558         ena_com_admin_destroy(ena_dev);
2559 err_mmio_read_less:
2560         ena_com_mmio_reg_read_request_destroy(ena_dev);
2561
2562         return rc;
2563 }
2564
2565 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2566                                                     int io_vectors)
2567 {
2568         struct ena_com_dev *ena_dev = adapter->ena_dev;
2569         struct device *dev = &adapter->pdev->dev;
2570         int rc;
2571
2572         rc = ena_enable_msix(adapter, io_vectors);
2573         if (rc) {
2574                 dev_err(dev, "Can not reserve msix vectors\n");
2575                 return rc;
2576         }
2577
2578         ena_setup_mgmnt_intr(adapter);
2579
2580         rc = ena_request_mgmnt_irq(adapter);
2581         if (rc) {
2582                 dev_err(dev, "Can not setup management interrupts\n");
2583                 goto err_disable_msix;
2584         }
2585
2586         ena_com_set_admin_polling_mode(ena_dev, false);
2587
2588         ena_com_admin_aenq_enable(ena_dev);
2589
2590         return 0;
2591
2592 err_disable_msix:
2593         ena_disable_msix(adapter);
2594
2595         return rc;
2596 }
2597
2598 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
2599 {
2600         struct net_device *netdev = adapter->netdev;
2601         struct ena_com_dev *ena_dev = adapter->ena_dev;
2602         bool dev_up;
2603
2604         if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2605                 return;
2606
2607         netif_carrier_off(netdev);
2608
2609         del_timer_sync(&adapter->timer_service);
2610
2611         dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2612         adapter->dev_up_before_reset = dev_up;
2613         if (!graceful)
2614                 ena_com_set_admin_running_state(ena_dev, false);
2615
2616         if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2617                 ena_down(adapter);
2618
2619         /* Stop the device from sending AENQ events (in case reset flag is set
2620          *  and device is up, ena_down() already reset the device.
2621          */
2622         if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
2623                 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2624
2625         ena_free_mgmnt_irq(adapter);
2626
2627         ena_disable_msix(adapter);
2628
2629         ena_com_abort_admin_commands(ena_dev);
2630
2631         ena_com_wait_for_abort_completion(ena_dev);
2632
2633         ena_com_admin_destroy(ena_dev);
2634
2635         ena_com_mmio_reg_read_request_destroy(ena_dev);
2636
2637         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
2638
2639         clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2640         clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2641 }
2642
2643 static int ena_restore_device(struct ena_adapter *adapter)
2644 {
2645         struct ena_com_dev_get_features_ctx get_feat_ctx;
2646         struct ena_com_dev *ena_dev = adapter->ena_dev;
2647         struct pci_dev *pdev = adapter->pdev;
2648         bool wd_state;
2649         int rc;
2650
2651         set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2652         rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2653         if (rc) {
2654                 dev_err(&pdev->dev, "Can not initialize device\n");
2655                 goto err;
2656         }
2657         adapter->wd_state = wd_state;
2658
2659         rc = ena_device_validate_params(adapter, &get_feat_ctx);
2660         if (rc) {
2661                 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2662                 goto err_device_destroy;
2663         }
2664
2665         rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2666                                                       adapter->num_queues);
2667         if (rc) {
2668                 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2669                 goto err_device_destroy;
2670         }
2671         /* If the interface was up before the reset bring it up */
2672         if (adapter->dev_up_before_reset) {
2673                 rc = ena_up(adapter);
2674                 if (rc) {
2675                         dev_err(&pdev->dev, "Failed to create I/O queues\n");
2676                         goto err_disable_msix;
2677                 }
2678         }
2679
2680         set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2681
2682         clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2683         if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2684                 netif_carrier_on(adapter->netdev);
2685
2686         mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2687         dev_err(&pdev->dev,
2688                 "Device reset completed successfully, Driver info: %s\n",
2689                 version);
2690
2691         return rc;
2692 err_disable_msix:
2693         ena_free_mgmnt_irq(adapter);
2694         ena_disable_msix(adapter);
2695 err_device_destroy:
2696         ena_com_abort_admin_commands(ena_dev);
2697         ena_com_wait_for_abort_completion(ena_dev);
2698         ena_com_admin_destroy(ena_dev);
2699         ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
2700         ena_com_mmio_reg_read_request_destroy(ena_dev);
2701 err:
2702         clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2703         clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2704         dev_err(&pdev->dev,
2705                 "Reset attempt failed. Can not reset the device\n");
2706
2707         return rc;
2708 }
2709
2710 static void ena_fw_reset_device(struct work_struct *work)
2711 {
2712         struct ena_adapter *adapter =
2713                 container_of(work, struct ena_adapter, reset_task);
2714         struct pci_dev *pdev = adapter->pdev;
2715
2716         if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2717                 dev_err(&pdev->dev,
2718                         "device reset schedule while reset bit is off\n");
2719                 return;
2720         }
2721         rtnl_lock();
2722         ena_destroy_device(adapter, false);
2723         ena_restore_device(adapter);
2724         rtnl_unlock();
2725 }
2726
2727 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
2728                                         struct ena_ring *rx_ring)
2729 {
2730         if (likely(rx_ring->first_interrupt))
2731                 return 0;
2732
2733         if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
2734                 return 0;
2735
2736         rx_ring->no_interrupt_event_cnt++;
2737
2738         if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
2739                 netif_err(adapter, rx_err, adapter->netdev,
2740                           "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
2741                           rx_ring->qid);
2742                 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2743                 smp_mb__before_atomic();
2744                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2745                 return -EIO;
2746         }
2747
2748         return 0;
2749 }
2750
2751 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
2752                                           struct ena_ring *tx_ring)
2753 {
2754         struct ena_tx_buffer *tx_buf;
2755         unsigned long last_jiffies;
2756         u32 missed_tx = 0;
2757         int i, rc = 0;
2758
2759         for (i = 0; i < tx_ring->ring_size; i++) {
2760                 tx_buf = &tx_ring->tx_buffer_info[i];
2761                 last_jiffies = tx_buf->last_jiffies;
2762
2763                 if (last_jiffies == 0)
2764                         /* no pending Tx at this location */
2765                         continue;
2766
2767                 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
2768                              2 * adapter->missing_tx_completion_to))) {
2769                         /* If after graceful period interrupt is still not
2770                          * received, we schedule a reset
2771                          */
2772                         netif_err(adapter, tx_err, adapter->netdev,
2773                                   "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
2774                                   tx_ring->qid);
2775                         adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2776                         smp_mb__before_atomic();
2777                         set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2778                         return -EIO;
2779                 }
2780
2781                 if (unlikely(time_is_before_jiffies(last_jiffies +
2782                                 adapter->missing_tx_completion_to))) {
2783                         if (!tx_buf->print_once)
2784                                 netif_notice(adapter, tx_err, adapter->netdev,
2785                                              "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2786                                              tx_ring->qid, i);
2787
2788                         tx_buf->print_once = 1;
2789                         missed_tx++;
2790                 }
2791         }
2792
2793         if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
2794                 netif_err(adapter, tx_err, adapter->netdev,
2795                           "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
2796                           missed_tx,
2797                           adapter->missing_tx_completion_threshold);
2798                 adapter->reset_reason =
2799                         ENA_REGS_RESET_MISS_TX_CMPL;
2800                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2801                 rc = -EIO;
2802         }
2803
2804         u64_stats_update_begin(&tx_ring->syncp);
2805         tx_ring->tx_stats.missed_tx = missed_tx;
2806         u64_stats_update_end(&tx_ring->syncp);
2807
2808         return rc;
2809 }
2810
2811 static void check_for_missing_completions(struct ena_adapter *adapter)
2812 {
2813         struct ena_ring *tx_ring;
2814         struct ena_ring *rx_ring;
2815         int i, budget, rc;
2816
2817         /* Make sure the driver doesn't turn the device in other process */
2818         smp_rmb();
2819
2820         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2821                 return;
2822
2823         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2824                 return;
2825
2826         if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
2827                 return;
2828
2829         budget = ENA_MONITORED_TX_QUEUES;
2830
2831         for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2832                 tx_ring = &adapter->tx_ring[i];
2833                 rx_ring = &adapter->rx_ring[i];
2834
2835                 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
2836                 if (unlikely(rc))
2837                         return;
2838
2839                 rc = check_for_rx_interrupt_queue(adapter, rx_ring);
2840                 if (unlikely(rc))
2841                         return;
2842
2843                 budget--;
2844                 if (!budget)
2845                         break;
2846         }
2847
2848         adapter->last_monitored_tx_qid = i % adapter->num_queues;
2849 }
2850
2851 /* trigger napi schedule after 2 consecutive detections */
2852 #define EMPTY_RX_REFILL 2
2853 /* For the rare case where the device runs out of Rx descriptors and the
2854  * napi handler failed to refill new Rx descriptors (due to a lack of memory
2855  * for example).
2856  * This case will lead to a deadlock:
2857  * The device won't send interrupts since all the new Rx packets will be dropped
2858  * The napi handler won't allocate new Rx descriptors so the device will be
2859  * able to send new packets.
2860  *
2861  * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
2862  * It is recommended to have at least 512MB, with a minimum of 128MB for
2863  * constrained environment).
2864  *
2865  * When such a situation is detected - Reschedule napi
2866  */
2867 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
2868 {
2869         struct ena_ring *rx_ring;
2870         int i, refill_required;
2871
2872         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2873                 return;
2874
2875         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2876                 return;
2877
2878         for (i = 0; i < adapter->num_queues; i++) {
2879                 rx_ring = &adapter->rx_ring[i];
2880
2881                 refill_required =
2882                         ena_com_free_desc(rx_ring->ena_com_io_sq);
2883                 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
2884                         rx_ring->empty_rx_queue++;
2885
2886                         if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
2887                                 u64_stats_update_begin(&rx_ring->syncp);
2888                                 rx_ring->rx_stats.empty_rx_ring++;
2889                                 u64_stats_update_end(&rx_ring->syncp);
2890
2891                                 netif_err(adapter, drv, adapter->netdev,
2892                                           "trigger refill for ring %d\n", i);
2893
2894                                 napi_schedule(rx_ring->napi);
2895                                 rx_ring->empty_rx_queue = 0;
2896                         }
2897                 } else {
2898                         rx_ring->empty_rx_queue = 0;
2899                 }
2900         }
2901 }
2902
2903 /* Check for keep alive expiration */
2904 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
2905 {
2906         unsigned long keep_alive_expired;
2907
2908         if (!adapter->wd_state)
2909                 return;
2910
2911         if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2912                 return;
2913
2914         keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies +
2915                                            adapter->keep_alive_timeout);
2916         if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
2917                 netif_err(adapter, drv, adapter->netdev,
2918                           "Keep alive watchdog timeout.\n");
2919                 u64_stats_update_begin(&adapter->syncp);
2920                 adapter->dev_stats.wd_expired++;
2921                 u64_stats_update_end(&adapter->syncp);
2922                 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
2923                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2924         }
2925 }
2926
2927 static void check_for_admin_com_state(struct ena_adapter *adapter)
2928 {
2929         if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
2930                 netif_err(adapter, drv, adapter->netdev,
2931                           "ENA admin queue is not in running state!\n");
2932                 u64_stats_update_begin(&adapter->syncp);
2933                 adapter->dev_stats.admin_q_pause++;
2934                 u64_stats_update_end(&adapter->syncp);
2935                 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
2936                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2937         }
2938 }
2939
2940 static void ena_update_hints(struct ena_adapter *adapter,
2941                              struct ena_admin_ena_hw_hints *hints)
2942 {
2943         struct net_device *netdev = adapter->netdev;
2944
2945         if (hints->admin_completion_tx_timeout)
2946                 adapter->ena_dev->admin_queue.completion_timeout =
2947                         hints->admin_completion_tx_timeout * 1000;
2948
2949         if (hints->mmio_read_timeout)
2950                 /* convert to usec */
2951                 adapter->ena_dev->mmio_read.reg_read_to =
2952                         hints->mmio_read_timeout * 1000;
2953
2954         if (hints->missed_tx_completion_count_threshold_to_reset)
2955                 adapter->missing_tx_completion_threshold =
2956                         hints->missed_tx_completion_count_threshold_to_reset;
2957
2958         if (hints->missing_tx_completion_timeout) {
2959                 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2960                         adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
2961                 else
2962                         adapter->missing_tx_completion_to =
2963                                 msecs_to_jiffies(hints->missing_tx_completion_timeout);
2964         }
2965
2966         if (hints->netdev_wd_timeout)
2967                 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
2968
2969         if (hints->driver_watchdog_timeout) {
2970                 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
2971                         adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
2972                 else
2973                         adapter->keep_alive_timeout =
2974                                 msecs_to_jiffies(hints->driver_watchdog_timeout);
2975         }
2976 }
2977
2978 static void ena_update_host_info(struct ena_admin_host_info *host_info,
2979                                  struct net_device *netdev)
2980 {
2981         host_info->supported_network_features[0] =
2982                 netdev->features & GENMASK_ULL(31, 0);
2983         host_info->supported_network_features[1] =
2984                 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
2985 }
2986
2987 static void ena_timer_service(struct timer_list *t)
2988 {
2989         struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
2990         u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
2991         struct ena_admin_host_info *host_info =
2992                 adapter->ena_dev->host_attr.host_info;
2993
2994         check_for_missing_keep_alive(adapter);
2995
2996         check_for_admin_com_state(adapter);
2997
2998         check_for_missing_completions(adapter);
2999
3000         check_for_empty_rx_ring(adapter);
3001
3002         if (debug_area)
3003                 ena_dump_stats_to_buf(adapter, debug_area);
3004
3005         if (host_info)
3006                 ena_update_host_info(host_info, adapter->netdev);
3007
3008         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3009                 netif_err(adapter, drv, adapter->netdev,
3010                           "Trigger reset is on\n");
3011                 ena_dump_stats_to_dmesg(adapter);
3012                 queue_work(ena_wq, &adapter->reset_task);
3013                 return;
3014         }
3015
3016         /* Reset the timer */
3017         mod_timer(&adapter->timer_service, jiffies + HZ);
3018 }
3019
3020 static int ena_calc_io_queue_num(struct pci_dev *pdev,
3021                                  struct ena_com_dev *ena_dev,
3022                                  struct ena_com_dev_get_features_ctx *get_feat_ctx)
3023 {
3024         int io_sq_num, io_queue_num;
3025
3026         /* In case of LLQ use the llq number in the get feature cmd */
3027         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3028                 io_sq_num = get_feat_ctx->llq.max_llq_num;
3029         else
3030                 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
3031
3032         io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3033         io_queue_num = min_t(int, io_queue_num, io_sq_num);
3034         io_queue_num = min_t(int, io_queue_num,
3035                              get_feat_ctx->max_queues.max_cq_num);
3036         /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3037         io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
3038         if (unlikely(!io_queue_num)) {
3039                 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3040                 return -EFAULT;
3041         }
3042
3043         return io_queue_num;
3044 }
3045
3046 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3047                                            struct ena_com_dev *ena_dev,
3048                                            struct ena_admin_feature_llq_desc *llq,
3049                                            struct ena_llq_configurations *llq_default_configurations)
3050 {
3051         bool has_mem_bar;
3052         int rc;
3053         u32 llq_feature_mask;
3054
3055         llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3056         if (!(ena_dev->supported_features & llq_feature_mask)) {
3057                 dev_err(&pdev->dev,
3058                         "LLQ is not supported Fallback to host mode policy.\n");
3059                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3060                 return 0;
3061         }
3062
3063         has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3064
3065         rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3066         if (unlikely(rc)) {
3067                 dev_err(&pdev->dev,
3068                         "Failed to configure the device mode.  Fallback to host mode policy.\n");
3069                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3070                 return 0;
3071         }
3072
3073         /* Nothing to config, exit */
3074         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3075                 return 0;
3076
3077         if (!has_mem_bar) {
3078                 dev_err(&pdev->dev,
3079                         "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3080                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3081                 return 0;
3082         }
3083
3084         ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3085                                            pci_resource_start(pdev, ENA_MEM_BAR),
3086                                            pci_resource_len(pdev, ENA_MEM_BAR));
3087
3088         if (!ena_dev->mem_bar)
3089                 return -EFAULT;
3090
3091         return 0;
3092 }
3093
3094 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3095                                  struct net_device *netdev)
3096 {
3097         netdev_features_t dev_features = 0;
3098
3099         /* Set offload features */
3100         if (feat->offload.tx &
3101                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3102                 dev_features |= NETIF_F_IP_CSUM;
3103
3104         if (feat->offload.tx &
3105                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3106                 dev_features |= NETIF_F_IPV6_CSUM;
3107
3108         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3109                 dev_features |= NETIF_F_TSO;
3110
3111         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3112                 dev_features |= NETIF_F_TSO6;
3113
3114         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3115                 dev_features |= NETIF_F_TSO_ECN;
3116
3117         if (feat->offload.rx_supported &
3118                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3119                 dev_features |= NETIF_F_RXCSUM;
3120
3121         if (feat->offload.rx_supported &
3122                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3123                 dev_features |= NETIF_F_RXCSUM;
3124
3125         netdev->features =
3126                 dev_features |
3127                 NETIF_F_SG |
3128                 NETIF_F_RXHASH |
3129                 NETIF_F_HIGHDMA;
3130
3131         netdev->hw_features |= netdev->features;
3132         netdev->vlan_features |= netdev->features;
3133 }
3134
3135 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3136                                      struct ena_com_dev_get_features_ctx *feat)
3137 {
3138         struct net_device *netdev = adapter->netdev;
3139
3140         /* Copy mac address */
3141         if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3142                 eth_hw_addr_random(netdev);
3143                 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3144         } else {
3145                 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3146                 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3147         }
3148
3149         /* Set offload features */
3150         ena_set_dev_offloads(feat, netdev);
3151
3152         adapter->max_mtu = feat->dev_attr.max_mtu;
3153         netdev->max_mtu = adapter->max_mtu;
3154         netdev->min_mtu = ENA_MIN_MTU;
3155 }
3156
3157 static int ena_rss_init_default(struct ena_adapter *adapter)
3158 {
3159         struct ena_com_dev *ena_dev = adapter->ena_dev;
3160         struct device *dev = &adapter->pdev->dev;
3161         int rc, i;
3162         u32 val;
3163
3164         rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3165         if (unlikely(rc)) {
3166                 dev_err(dev, "Cannot init indirect table\n");
3167                 goto err_rss_init;
3168         }
3169
3170         for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3171                 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
3172                 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3173                                                        ENA_IO_RXQ_IDX(val));
3174                 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3175                         dev_err(dev, "Cannot fill indirect table\n");
3176                         goto err_fill_indir;
3177                 }
3178         }
3179
3180         rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3181                                         ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3182         if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3183                 dev_err(dev, "Cannot fill hash function\n");
3184                 goto err_fill_indir;
3185         }
3186
3187         rc = ena_com_set_default_hash_ctrl(ena_dev);
3188         if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3189                 dev_err(dev, "Cannot fill hash control\n");
3190                 goto err_fill_indir;
3191         }
3192
3193         return 0;
3194
3195 err_fill_indir:
3196         ena_com_rss_destroy(ena_dev);
3197 err_rss_init:
3198
3199         return rc;
3200 }
3201
3202 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3203 {
3204         int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3205
3206         pci_release_selected_regions(pdev, release_bars);
3207 }
3208
3209 static inline void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3210 {
3211         llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3212         llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3213         llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3214         llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3215         llq_config->llq_ring_entry_size_value = 128;
3216 }
3217
3218 static int ena_calc_queue_size(struct pci_dev *pdev,
3219                                struct ena_com_dev *ena_dev,
3220                                u16 *max_tx_sgl_size,
3221                                u16 *max_rx_sgl_size,
3222                                struct ena_com_dev_get_features_ctx *get_feat_ctx)
3223 {
3224         u32 queue_size = ENA_DEFAULT_RING_SIZE;
3225
3226         queue_size = min_t(u32, queue_size,
3227                            get_feat_ctx->max_queues.max_cq_depth);
3228         queue_size = min_t(u32, queue_size,
3229                            get_feat_ctx->max_queues.max_sq_depth);
3230
3231         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3232                 queue_size = min_t(u32, queue_size,
3233                                    get_feat_ctx->llq.max_llq_depth);
3234
3235         queue_size = rounddown_pow_of_two(queue_size);
3236
3237         if (unlikely(!queue_size)) {
3238                 dev_err(&pdev->dev, "Invalid queue size\n");
3239                 return -EFAULT;
3240         }
3241
3242         *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3243                                  get_feat_ctx->max_queues.max_packet_tx_descs);
3244         *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3245                                  get_feat_ctx->max_queues.max_packet_rx_descs);
3246
3247         return queue_size;
3248 }
3249
3250 /* ena_probe - Device Initialization Routine
3251  * @pdev: PCI device information struct
3252  * @ent: entry in ena_pci_tbl
3253  *
3254  * Returns 0 on success, negative on failure
3255  *
3256  * ena_probe initializes an adapter identified by a pci_dev structure.
3257  * The OS initialization, configuring of the adapter private structure,
3258  * and a hardware reset occur.
3259  */
3260 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3261 {
3262         struct ena_com_dev_get_features_ctx get_feat_ctx;
3263         static int version_printed;
3264         struct net_device *netdev;
3265         struct ena_adapter *adapter;
3266         struct ena_llq_configurations llq_config;
3267         struct ena_com_dev *ena_dev = NULL;
3268         char *queue_type_str;
3269         static int adapters_found;
3270         int io_queue_num, bars, rc;
3271         int queue_size;
3272         u16 tx_sgl_size = 0;
3273         u16 rx_sgl_size = 0;
3274         bool wd_state;
3275
3276         dev_dbg(&pdev->dev, "%s\n", __func__);
3277
3278         if (version_printed++ == 0)
3279                 dev_info(&pdev->dev, "%s", version);
3280
3281         rc = pci_enable_device_mem(pdev);
3282         if (rc) {
3283                 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
3284                 return rc;
3285         }
3286
3287         pci_set_master(pdev);
3288
3289         ena_dev = vzalloc(sizeof(*ena_dev));
3290         if (!ena_dev) {
3291                 rc = -ENOMEM;
3292                 goto err_disable_device;
3293         }
3294
3295         bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3296         rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
3297         if (rc) {
3298                 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
3299                         rc);
3300                 goto err_free_ena_dev;
3301         }
3302
3303         ena_dev->reg_bar = devm_ioremap(&pdev->dev,
3304                                         pci_resource_start(pdev, ENA_REG_BAR),
3305                                         pci_resource_len(pdev, ENA_REG_BAR));
3306         if (!ena_dev->reg_bar) {
3307                 dev_err(&pdev->dev, "failed to remap regs bar\n");
3308                 rc = -EFAULT;
3309                 goto err_free_region;
3310         }
3311
3312         ena_dev->dmadev = &pdev->dev;
3313
3314         rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
3315         if (rc) {
3316                 dev_err(&pdev->dev, "ena device init failed\n");
3317                 if (rc == -ETIME)
3318                         rc = -EPROBE_DEFER;
3319                 goto err_free_region;
3320         }
3321
3322         set_default_llq_configurations(&llq_config);
3323
3324         rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
3325                                              &llq_config);
3326         if (rc) {
3327                 dev_err(&pdev->dev, "ena device init failed\n");
3328                 goto err_device_destroy;
3329         }
3330
3331         /* initial Tx interrupt delay, Assumes 1 usec granularity.
3332         * Updated during device initialization with the real granularity
3333         */
3334         ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3335         io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
3336         queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
3337                                          &rx_sgl_size, &get_feat_ctx);
3338         if ((queue_size <= 0) || (io_queue_num <= 0)) {
3339                 rc = -EFAULT;
3340                 goto err_device_destroy;
3341         }
3342
3343         dev_info(&pdev->dev, "creating %d io queues. queue size: %d. LLQ is %s\n",
3344                  io_queue_num, queue_size,
3345                  (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
3346                  "ENABLED" : "DISABLED");
3347
3348         /* dev zeroed in init_etherdev */
3349         netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
3350         if (!netdev) {
3351                 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
3352                 rc = -ENOMEM;
3353                 goto err_device_destroy;
3354         }
3355
3356         SET_NETDEV_DEV(netdev, &pdev->dev);
3357
3358         adapter = netdev_priv(netdev);
3359         pci_set_drvdata(pdev, adapter);
3360
3361         adapter->ena_dev = ena_dev;
3362         adapter->netdev = netdev;
3363         adapter->pdev = pdev;
3364
3365         ena_set_conf_feat_params(adapter, &get_feat_ctx);
3366
3367         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3368         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3369
3370         adapter->tx_ring_size = queue_size;
3371         adapter->rx_ring_size = queue_size;
3372
3373         adapter->max_tx_sgl_size = tx_sgl_size;
3374         adapter->max_rx_sgl_size = rx_sgl_size;
3375
3376         adapter->num_queues = io_queue_num;
3377         adapter->last_monitored_tx_qid = 0;
3378
3379         adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3380         adapter->wd_state = wd_state;
3381
3382         snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3383
3384         rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3385         if (rc) {
3386                 dev_err(&pdev->dev,
3387                         "Failed to query interrupt moderation feature\n");
3388                 goto err_netdev_destroy;
3389         }
3390         ena_init_io_rings(adapter);
3391
3392         netdev->netdev_ops = &ena_netdev_ops;
3393         netdev->watchdog_timeo = TX_TIMEOUT;
3394         ena_set_ethtool_ops(netdev);
3395
3396         netdev->priv_flags |= IFF_UNICAST_FLT;
3397
3398         u64_stats_init(&adapter->syncp);
3399
3400         rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3401         if (rc) {
3402                 dev_err(&pdev->dev,
3403                         "Failed to enable and set the admin interrupts\n");
3404                 goto err_worker_destroy;
3405         }
3406         rc = ena_rss_init_default(adapter);
3407         if (rc && (rc != -EOPNOTSUPP)) {
3408                 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3409                 goto err_free_msix;
3410         }
3411
3412         ena_config_debug_area(adapter);
3413
3414         memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3415
3416         netif_carrier_off(netdev);
3417
3418         rc = register_netdev(netdev);
3419         if (rc) {
3420                 dev_err(&pdev->dev, "Cannot register net device\n");
3421                 goto err_rss;
3422         }
3423
3424         INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3425
3426         adapter->last_keep_alive_jiffies = jiffies;
3427         adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
3428         adapter->missing_tx_completion_to = TX_TIMEOUT;
3429         adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
3430
3431         ena_update_hints(adapter, &get_feat_ctx.hw_hints);
3432
3433         timer_setup(&adapter->timer_service, ena_timer_service, 0);
3434         mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3435
3436         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3437                 queue_type_str = "Regular";
3438         else
3439                 queue_type_str = "Low Latency";
3440
3441         dev_info(&pdev->dev,
3442                  "%s found at mem %lx, mac addr %pM Queues %d, Placement policy: %s\n",
3443                  DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3444                  netdev->dev_addr, io_queue_num, queue_type_str);
3445
3446         set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3447
3448         adapters_found++;
3449
3450         return 0;
3451
3452 err_rss:
3453         ena_com_delete_debug_area(ena_dev);
3454         ena_com_rss_destroy(ena_dev);
3455 err_free_msix:
3456         ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
3457         /* stop submitting admin commands on a device that was reset */
3458         ena_com_set_admin_running_state(ena_dev, false);
3459         ena_free_mgmnt_irq(adapter);
3460         ena_disable_msix(adapter);
3461 err_worker_destroy:
3462         ena_com_destroy_interrupt_moderation(ena_dev);
3463         del_timer(&adapter->timer_service);
3464 err_netdev_destroy:
3465         free_netdev(netdev);
3466 err_device_destroy:
3467         ena_com_delete_host_info(ena_dev);
3468         ena_com_admin_destroy(ena_dev);
3469 err_free_region:
3470         ena_release_bars(ena_dev, pdev);
3471 err_free_ena_dev:
3472         vfree(ena_dev);
3473 err_disable_device:
3474         pci_disable_device(pdev);
3475         return rc;
3476 }
3477
3478 /*****************************************************************************/
3479
3480 /* ena_remove - Device Removal Routine
3481  * @pdev: PCI device information struct
3482  *
3483  * ena_remove is called by the PCI subsystem to alert the driver
3484  * that it should release a PCI device.
3485  */
3486 static void ena_remove(struct pci_dev *pdev)
3487 {
3488         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3489         struct ena_com_dev *ena_dev;
3490         struct net_device *netdev;
3491
3492         ena_dev = adapter->ena_dev;
3493         netdev = adapter->netdev;
3494
3495 #ifdef CONFIG_RFS_ACCEL
3496         if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3497                 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3498                 netdev->rx_cpu_rmap = NULL;
3499         }
3500 #endif /* CONFIG_RFS_ACCEL */
3501         del_timer_sync(&adapter->timer_service);
3502
3503         cancel_work_sync(&adapter->reset_task);
3504
3505         rtnl_lock();
3506         ena_destroy_device(adapter, true);
3507         rtnl_unlock();
3508
3509         unregister_netdev(netdev);
3510
3511         free_netdev(netdev);
3512
3513         ena_com_rss_destroy(ena_dev);
3514
3515         ena_com_delete_debug_area(ena_dev);
3516
3517         ena_com_delete_host_info(ena_dev);
3518
3519         ena_release_bars(ena_dev, pdev);
3520
3521         pci_disable_device(pdev);
3522
3523         ena_com_destroy_interrupt_moderation(ena_dev);
3524
3525         vfree(ena_dev);
3526 }
3527
3528 #ifdef CONFIG_PM
3529 /* ena_suspend - PM suspend callback
3530  * @pdev: PCI device information struct
3531  * @state:power state
3532  */
3533 static int ena_suspend(struct pci_dev *pdev,  pm_message_t state)
3534 {
3535         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3536
3537         u64_stats_update_begin(&adapter->syncp);
3538         adapter->dev_stats.suspend++;
3539         u64_stats_update_end(&adapter->syncp);
3540
3541         rtnl_lock();
3542         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3543                 dev_err(&pdev->dev,
3544                         "ignoring device reset request as the device is being suspended\n");
3545                 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3546         }
3547         ena_destroy_device(adapter, true);
3548         rtnl_unlock();
3549         return 0;
3550 }
3551
3552 /* ena_resume - PM resume callback
3553  * @pdev: PCI device information struct
3554  *
3555  */
3556 static int ena_resume(struct pci_dev *pdev)
3557 {
3558         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3559         int rc;
3560
3561         u64_stats_update_begin(&adapter->syncp);
3562         adapter->dev_stats.resume++;
3563         u64_stats_update_end(&adapter->syncp);
3564
3565         rtnl_lock();
3566         rc = ena_restore_device(adapter);
3567         rtnl_unlock();
3568         return rc;
3569 }
3570 #endif
3571
3572 static struct pci_driver ena_pci_driver = {
3573         .name           = DRV_MODULE_NAME,
3574         .id_table       = ena_pci_tbl,
3575         .probe          = ena_probe,
3576         .remove         = ena_remove,
3577 #ifdef CONFIG_PM
3578         .suspend    = ena_suspend,
3579         .resume     = ena_resume,
3580 #endif
3581         .sriov_configure = pci_sriov_configure_simple,
3582 };
3583
3584 static int __init ena_init(void)
3585 {
3586         pr_info("%s", version);
3587
3588         ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3589         if (!ena_wq) {
3590                 pr_err("Failed to create workqueue\n");
3591                 return -ENOMEM;
3592         }
3593
3594         return pci_register_driver(&ena_pci_driver);
3595 }
3596
3597 static void __exit ena_cleanup(void)
3598 {
3599         pci_unregister_driver(&ena_pci_driver);
3600
3601         if (ena_wq) {
3602                 destroy_workqueue(ena_wq);
3603                 ena_wq = NULL;
3604         }
3605 }
3606
3607 /******************************************************************************
3608  ******************************** AENQ Handlers *******************************
3609  *****************************************************************************/
3610 /* ena_update_on_link_change:
3611  * Notify the network interface about the change in link status
3612  */
3613 static void ena_update_on_link_change(void *adapter_data,
3614                                       struct ena_admin_aenq_entry *aenq_e)
3615 {
3616         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3617         struct ena_admin_aenq_link_change_desc *aenq_desc =
3618                 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3619         int status = aenq_desc->flags &
3620                 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3621
3622         if (status) {
3623                 netdev_dbg(adapter->netdev, "%s\n", __func__);
3624                 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3625                 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
3626                         netif_carrier_on(adapter->netdev);
3627         } else {
3628                 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3629                 netif_carrier_off(adapter->netdev);
3630         }
3631 }
3632
3633 static void ena_keep_alive_wd(void *adapter_data,
3634                               struct ena_admin_aenq_entry *aenq_e)
3635 {
3636         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3637         struct ena_admin_aenq_keep_alive_desc *desc;
3638         u64 rx_drops;
3639
3640         desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3641         adapter->last_keep_alive_jiffies = jiffies;
3642
3643         rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
3644
3645         u64_stats_update_begin(&adapter->syncp);
3646         adapter->dev_stats.rx_drops = rx_drops;
3647         u64_stats_update_end(&adapter->syncp);
3648 }
3649
3650 static void ena_notification(void *adapter_data,
3651                              struct ena_admin_aenq_entry *aenq_e)
3652 {
3653         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3654         struct ena_admin_ena_hw_hints *hints;
3655
3656         WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3657              "Invalid group(%x) expected %x\n",
3658              aenq_e->aenq_common_desc.group,
3659              ENA_ADMIN_NOTIFICATION);
3660
3661         switch (aenq_e->aenq_common_desc.syndrom) {
3662         case ENA_ADMIN_UPDATE_HINTS:
3663                 hints = (struct ena_admin_ena_hw_hints *)
3664                         (&aenq_e->inline_data_w4);
3665                 ena_update_hints(adapter, hints);
3666                 break;
3667         default:
3668                 netif_err(adapter, drv, adapter->netdev,
3669                           "Invalid aenq notification link state %d\n",
3670                           aenq_e->aenq_common_desc.syndrom);
3671         }
3672 }
3673
3674 /* This handler will called for unknown event group or unimplemented handlers*/
3675 static void unimplemented_aenq_handler(void *data,
3676                                        struct ena_admin_aenq_entry *aenq_e)
3677 {
3678         struct ena_adapter *adapter = (struct ena_adapter *)data;
3679
3680         netif_err(adapter, drv, adapter->netdev,
3681                   "Unknown event was received or event with unimplemented handler\n");
3682 }
3683
3684 static struct ena_aenq_handlers aenq_handlers = {
3685         .handlers = {
3686                 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3687                 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3688                 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3689         },
3690         .unimplemented_handler = unimplemented_aenq_handler
3691 };
3692
3693 module_init(ena_init);
3694 module_exit(ena_cleanup);